jcs.org
qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
hw/xtensa: add virt machine
virt machine is a sim machine with generic PCI host controller.
Make common parts of sim machine initialization reusable.
Add PCI controller at 0xf0000000 with PIO space at its base address,
ECAM space at base address + 1M and MMIO space at base address + 64M.
Connect IRQ lines to consecutive CPU external IRQ pins starting from 0.
Instantiate network interfaces on virt machine.
Xtensa linux kernel configuration virt_defconfig can successfully boot
on this machine.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
+208
-15
+5
MAINTAINERS
+5
MAINTAINERS
+1
default-configs/xtensa-softmmu.mak
+1
default-configs/xtensa-softmmu.mak
+6
hw/xtensa/Kconfig
+6
hw/xtensa/Kconfig
+1
hw/xtensa/Makefile.objs
+1
hw/xtensa/Makefile.objs
+26
-15
hw/xtensa/sim.c
+26
-15
hw/xtensa/sim.c
···
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37
#include "exec/address-spaces.h"
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#include "qemu/error-report.h"
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#include "xtensa_memory.h"
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#include "xtensa_sim.h"
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static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
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{
···
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cpu_reset(CPU(cpu));
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}
54
55
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-
static void xtensa_sim_init(MachineState *machine)
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XtensaCPU *xtensa_sim_common_init(MachineState *machine)
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{
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XtensaCPU *cpu = NULL;
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CPUXtensaState *env = NULL;
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ram_addr_t ram_size = machine->ram_size;
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const char *kernel_filename = machine->kernel_filename;
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int n;
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for (n = 0; n < machine->smp.cpus; n++) {
···
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xtensa_create_memory_regions(&sysram, "xtensa.sysram",
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get_system_memory());
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}
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-
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if (serial_hd(0)) {
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xtensa_sim_open_console(serial_hd(0));
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}
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return cpu;
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}
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void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine)
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{
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const char *kernel_filename = machine->kernel_filename;
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#ifdef TARGET_WORDS_BIGENDIAN
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int big_endian = true;
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#else
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int big_endian = false;
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#endif
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if (kernel_filename) {
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uint64_t elf_entry;
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uint64_t elf_lowaddr;
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-
#ifdef TARGET_WORDS_BIGENDIAN
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int success = load_elf(kernel_filename, NULL,
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translate_phys_addr, cpu,
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&elf_entry, &elf_lowaddr,
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NULL, 1, EM_XTENSA, 0, 0);
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#else
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int success = load_elf(kernel_filename, NULL,
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translate_phys_addr, cpu,
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&elf_entry, &elf_lowaddr,
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-
NULL, 0, EM_XTENSA, 0, 0);
109
-
#endif
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int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
111
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&elf_entry, &elf_lowaddr, NULL, big_endian,
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EM_XTENSA, 0, 0);
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+
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if (success > 0) {
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-
env->pc = elf_entry;
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cpu->env.pc = elf_entry;
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}
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}
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+
}
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+
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static void xtensa_sim_init(MachineState *machine)
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{
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XtensaCPU *cpu = xtensa_sim_common_init(machine);
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xtensa_sim_load_kernel(cpu, machine);
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}
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static void xtensa_sim_machine_init(MachineClass *mc)
+135
hw/xtensa/virt.c
+135
hw/xtensa/virt.c
···
1
+
/*
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+
* Copyright (c) 2019, Max Filippov, Open Source and Linux Lab.
3
+
* All rights reserved.
4
+
*
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* Redistribution and use in source and binary forms, with or without
6
+
* modification, are permitted provided that the following conditions are met:
7
+
* * Redistributions of source code must retain the above copyright
8
+
* notice, this list of conditions and the following disclaimer.
9
+
* * Redistributions in binary form must reproduce the above copyright
10
+
* notice, this list of conditions and the following disclaimer in the
11
+
* documentation and/or other materials provided with the distribution.
12
+
* * Neither the name of the Open Source and Linux Lab nor the
13
+
* names of its contributors may be used to endorse or promote products
14
+
* derived from this software without specific prior written permission.
15
+
*
16
+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17
+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18
+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19
+
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20
+
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21
+
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22
+
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23
+
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
+
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25
+
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
+
*/
27
+
28
+
#include "qemu/osdep.h"
29
+
#include "qapi/error.h"
30
+
#include "cpu.h"
31
+
#include "sysemu/reset.h"
32
+
#include "sysemu/sysemu.h"
33
+
#include "hw/boards.h"
34
+
#include "hw/loader.h"
35
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#include "hw/pci-host/gpex.h"
36
+
#include "net/net.h"
37
+
#include "elf.h"
38
+
#include "exec/memory.h"
39
+
#include "exec/address-spaces.h"
40
+
#include "qemu/error-report.h"
41
+
#include "xtensa_memory.h"
42
+
#include "xtensa_sim.h"
43
+
44
+
static void create_pcie(CPUXtensaState *env, int irq_base, hwaddr addr_base)
45
+
{
46
+
hwaddr base_ecam = addr_base + 0x00100000;
47
+
hwaddr size_ecam = 0x03f00000;
48
+
hwaddr base_pio = addr_base + 0x00000000;
49
+
hwaddr size_pio = 0x00010000;
50
+
hwaddr base_mmio = addr_base + 0x04000000;
51
+
hwaddr size_mmio = 0x08000000;
52
+
53
+
MemoryRegion *ecam_alias;
54
+
MemoryRegion *ecam_reg;
55
+
MemoryRegion *pio_alias;
56
+
MemoryRegion *pio_reg;
57
+
MemoryRegion *mmio_alias;
58
+
MemoryRegion *mmio_reg;
59
+
60
+
DeviceState *dev;
61
+
PCIHostState *pci;
62
+
qemu_irq *extints;
63
+
int i;
64
+
65
+
dev = qdev_create(NULL, TYPE_GPEX_HOST);
66
+
qdev_init_nofail(dev);
67
+
68
+
/* Map only the first size_ecam bytes of ECAM space. */
69
+
ecam_alias = g_new0(MemoryRegion, 1);
70
+
ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
71
+
memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
72
+
ecam_reg, 0, size_ecam);
73
+
memory_region_add_subregion(get_system_memory(), base_ecam, ecam_alias);
74
+
75
+
/*
76
+
* Map the MMIO window into system address space so as to expose
77
+
* the section of PCI MMIO space which starts at the same base address
78
+
* (ie 1:1 mapping for that part of PCI MMIO space visible through
79
+
* the window).
80
+
*/
81
+
mmio_alias = g_new0(MemoryRegion, 1);
82
+
mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
83
+
memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio",
84
+
mmio_reg, base_mmio, size_mmio);
85
+
memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
86
+
87
+
/* Map IO port space. */
88
+
pio_alias = g_new0(MemoryRegion, 1);
89
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pio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 2);
90
+
memory_region_init_alias(pio_alias, OBJECT(dev), "pcie-pio",
91
+
pio_reg, 0, size_pio);
92
+
memory_region_add_subregion(get_system_memory(), base_pio, pio_alias);
93
+
94
+
/* Connect IRQ lines. */
95
+
extints = xtensa_get_extints(env);
96
+
97
+
for (i = 0; i < GPEX_NUM_IRQS; i++) {
98
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void *q = extints[irq_base + i];
99
+
100
+
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, q);
101
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gpex_set_irq_num(GPEX_HOST(dev), i, irq_base + i);
102
+
}
103
+
104
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pci = PCI_HOST_BRIDGE(dev);
105
+
if (pci->bus) {
106
+
for (i = 0; i < nb_nics; i++) {
107
+
NICInfo *nd = &nd_table[i];
108
+
109
+
if (!nd->model) {
110
+
nd->model = g_strdup("virtio");
111
+
}
112
+
113
+
pci_nic_init_nofail(nd, pci->bus, nd->model, NULL);
114
+
}
115
+
}
116
+
}
117
+
118
+
static void xtensa_virt_init(MachineState *machine)
119
+
{
120
+
XtensaCPU *cpu = xtensa_sim_common_init(machine);
121
+
CPUXtensaState *env = &cpu->env;
122
+
123
+
create_pcie(env, 0, 0xf0000000);
124
+
xtensa_sim_load_kernel(cpu, machine);
125
+
}
126
+
127
+
static void xtensa_virt_machine_init(MachineClass *mc)
128
+
{
129
+
mc->desc = "virt machine (" XTENSA_DEFAULT_CPU_MODEL ")";
130
+
mc->init = xtensa_virt_init;
131
+
mc->max_cpus = 32;
132
+
mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
133
+
}
134
+
135
+
DEFINE_MACHINE("virt", xtensa_virt_machine_init)
+34
hw/xtensa/xtensa_sim.h
+34
hw/xtensa/xtensa_sim.h
···
1
+
/*
2
+
* Copyright (c) 2019, Max Filippov, Open Source and Linux Lab.
3
+
* All rights reserved.
4
+
*
5
+
* Redistribution and use in source and binary forms, with or without
6
+
* modification, are permitted provided that the following conditions are met:
7
+
* * Redistributions of source code must retain the above copyright
8
+
* notice, this list of conditions and the following disclaimer.
9
+
* * Redistributions in binary form must reproduce the above copyright
10
+
* notice, this list of conditions and the following disclaimer in the
11
+
* documentation and/or other materials provided with the distribution.
12
+
* * Neither the name of the Open Source and Linux Lab nor the
13
+
* names of its contributors may be used to endorse or promote products
14
+
* derived from this software without specific prior written permission.
15
+
*
16
+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17
+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18
+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19
+
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20
+
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21
+
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22
+
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23
+
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
+
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25
+
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
+
*/
27
+
28
+
#ifndef XTENSA_SIM_H
29
+
#define XTENSA_SIM_H
30
+
31
+
XtensaCPU *xtensa_sim_common_init(MachineState *machine);
32
+
void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine);
33
+
34
+
#endif