jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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tcg/aarch64: Support vector absolute value

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Richard Henderson a456394a 18f9b65f

+7 -1
+1 -1
tcg/aarch64/tcg-target.h
··· 132 132 #define TCG_TARGET_HAS_orc_vec 1 133 133 #define TCG_TARGET_HAS_not_vec 1 134 134 #define TCG_TARGET_HAS_neg_vec 1 135 - #define TCG_TARGET_HAS_abs_vec 0 135 + #define TCG_TARGET_HAS_abs_vec 1 136 136 #define TCG_TARGET_HAS_shi_vec 1 137 137 #define TCG_TARGET_HAS_shs_vec 0 138 138 #define TCG_TARGET_HAS_shv_vec 1
+6
tcg/aarch64/tcg-target.inc.c
··· 552 552 I3617_CMGE0 = 0x2e208800, 553 553 I3617_CMLE0 = 0x2e20a800, 554 554 I3617_NOT = 0x2e205800, 555 + I3617_ABS = 0x0e20b800, 555 556 I3617_NEG = 0x2e20b800, 556 557 557 558 /* System instructions. */ ··· 2208 2209 case INDEX_op_neg_vec: 2209 2210 tcg_out_insn(s, 3617, NEG, is_q, vece, a0, a1); 2210 2211 break; 2212 + case INDEX_op_abs_vec: 2213 + tcg_out_insn(s, 3617, ABS, is_q, vece, a0, a1); 2214 + break; 2211 2215 case INDEX_op_and_vec: 2212 2216 tcg_out_insn(s, 3616, AND, is_q, 0, a0, a1, a2); 2213 2217 break; ··· 2319 2323 case INDEX_op_andc_vec: 2320 2324 case INDEX_op_orc_vec: 2321 2325 case INDEX_op_neg_vec: 2326 + case INDEX_op_abs_vec: 2322 2327 case INDEX_op_not_vec: 2323 2328 case INDEX_op_cmp_vec: 2324 2329 case INDEX_op_shli_vec: ··· 2562 2567 return &w_w_w; 2563 2568 case INDEX_op_not_vec: 2564 2569 case INDEX_op_neg_vec: 2570 + case INDEX_op_abs_vec: 2565 2571 case INDEX_op_shli_vec: 2566 2572 case INDEX_op_shri_vec: 2567 2573 case INDEX_op_sari_vec: