qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

misc fixes and cleanups

A bunch of fixes all over the place, some of the
bugs fixed are actually regressions.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Wed Mar 11 17:48:30 2015 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (25 commits)
virtio-scsi: remove empty wrapper for cmd
virtio-scsi: clean out duplicate cdb field
virtio-scsi: fix cdb/sense size
uapi/virtio_scsi: allow overriding CDB/SENSE size
virtio-scsi: drop duplicate CDB/SENSE SIZE
exec: don't include hw/boards for linux-user
acpi: specify format for build_append_namestring
MAINTAINERS: drop aliguori@amazon.com
tpm: Move memory subregion function into realize function
virtio-pci: Convert to realize()
pci: Convert pci_nic_init() to Error to avoid qdev_init()
machine: query mem-merge machine property
machine: query dump-guest-core machine property
hw/boards: make it safe to include for linux-user
machine: query phandle-start machine property
machine: query kvm-shadow-mem machine property
kvm: add machine state to kvm_arch_init
machine: query kernel-irqchip property
machine: allowed/required kernel-irqchip support
machine: replace qemu opts with iommu property
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

+170 -147
-9
MAINTAINERS
··· 50 50 51 51 General Project Administration 52 52 ------------------------------ 53 - M: Anthony Liguori <aliguori@amazon.com> 54 53 M: Peter Maydell <peter.maydell@linaro.org> 55 54 56 55 Responsible Disclosure, Reporting Security Issues 57 56 ------------------------------ 58 57 W: http://wiki.qemu.org/SecurityProcess 59 58 M: Michael S. Tsirkin <mst@redhat.com> 60 - M: Anthony Liguori <aliguori@amazon.com> 61 59 L: secalert@redhat.com 62 60 63 61 Guest CPU cores (TCG): ··· 568 566 X86 Machines 569 567 ------------ 570 568 PC 571 - M: Anthony Liguori <aliguori@amazon.com> 572 569 M: Michael S. Tsirkin <mst@redhat.com> 573 570 S: Supported 574 571 F: include/hw/i386/ ··· 693 690 F: hw/*/*vhost* 694 691 695 692 virtio 696 - M: Anthony Liguori <aliguori@amazon.com> 697 693 M: Michael S. Tsirkin <mst@redhat.com> 698 694 S: Supported 699 695 F: hw/*/virtio* ··· 800 796 T: git git://github.com/codyprime/qemu-kvm-jtc.git block 801 797 802 798 Character Devices 803 - M: Anthony Liguori <aliguori@amazon.com> 804 799 M: Paolo Bonzini <pbonzini@redhat.com> 805 800 S: Maintained 806 801 F: qemu-char.c ··· 861 856 F: hw/display/qxl* 862 857 863 858 Graphics 864 - M: Anthony Liguori <aliguori@amazon.com> 865 859 M: Gerd Hoffmann <kraxel@redhat.com> 866 860 S: Odd Fixes 867 861 F: ui/ ··· 873 867 F: ui/cocoa.m 874 868 875 869 Main loop 876 - M: Anthony Liguori <aliguori@amazon.com> 877 870 M: Paolo Bonzini <pbonzini@redhat.com> 878 871 S: Maintained 879 872 F: cpus.c ··· 890 883 T: git git://repo.or.cz/qemu/qmp-unstable.git queue/qmp 891 884 892 885 Network device layer 893 - M: Anthony Liguori <aliguori@amazon.com> 894 886 M: Stefan Hajnoczi <stefanha@redhat.com> 895 887 M: Jason Wang <jasowang@redhat.com> 896 888 S: Maintained ··· 942 934 T: git git://github.com/mdroth/qemu.git qga 943 935 944 936 QOM 945 - M: Anthony Liguori <aliguori@amazon.com> 946 937 M: Andreas Färber <afaerber@suse.de> 947 938 S: Supported 948 939 T: git git://github.com/afaerber/qemu-cpu.git qom-next
+2 -3
device_tree.c
··· 24 24 #include "sysemu/device_tree.h" 25 25 #include "sysemu/sysemu.h" 26 26 #include "hw/loader.h" 27 - #include "qemu/option.h" 27 + #include "hw/boards.h" 28 28 #include "qemu/config-file.h" 29 29 30 30 #include <libfdt.h> ··· 245 245 * which phandle id to start allocting phandles. 246 246 */ 247 247 if (!phandle) { 248 - phandle = qemu_opt_get_number(qemu_get_machine_opts(), 249 - "phandle_start", 0); 248 + phandle = machine_phandle_start(current_machine); 250 249 } 251 250 252 251 if (!phandle) {
+5 -3
exec.c
··· 26 26 #include "cpu.h" 27 27 #include "tcg.h" 28 28 #include "hw/hw.h" 29 + #if !defined(CONFIG_USER_ONLY) 30 + #include "hw/boards.h" 31 + #endif 29 32 #include "hw/qdev.h" 30 33 #include "qemu/osdep.h" 31 34 #include "sysemu/kvm.h" ··· 1251 1254 int ret; 1252 1255 1253 1256 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */ 1254 - if (!qemu_opt_get_bool(qemu_get_machine_opts(), 1255 - "dump-guest-core", true)) { 1257 + if (!machine_dump_guest_core(current_machine)) { 1256 1258 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP); 1257 1259 if (ret) { 1258 1260 perror("qemu_madvise"); ··· 1327 1329 1328 1330 static int memory_try_enable_merging(void *addr, size_t len) 1329 1331 { 1330 - if (!qemu_opt_get_bool(qemu_get_machine_opts(), "mem-merge", true)) { 1332 + if (!machine_mem_merge(current_machine)) { 1331 1333 /* disabled by the user */ 1332 1334 return 0; 1333 1335 }
+13 -9
hw/acpi/aml-build.c
··· 112 112 switch (seg_count) { 113 113 case 1: 114 114 if (!*s) { 115 - build_append_byte(array, 0x0); /* NullName */ 115 + build_append_byte(array, 0x00); /* NullName */ 116 116 } else { 117 117 build_append_nameseg(array, s); 118 118 } ··· 141 141 g_strfreev(segs); 142 142 } 143 143 144 + GCC_FMT_ATTR(2, 3) 144 145 static void build_append_namestring(GArray *array, const char *format, ...) 145 146 { 146 147 va_list ap; ··· 335 336 336 337 void aml_append(Aml *parent_ctx, Aml *child) 337 338 { 339 + GArray *buf = build_alloc_array(); 340 + build_append_array(buf, child->buf); 341 + 338 342 switch (child->block_flags) { 339 343 case AML_OPCODE: 340 344 build_append_byte(parent_ctx->buf, child->op); 341 345 break; 342 346 case AML_EXT_PACKAGE: 343 - build_extop_package(child->buf, child->op); 347 + build_extop_package(buf, child->op); 344 348 break; 345 349 case AML_PACKAGE: 346 - build_package(child->buf, child->op); 350 + build_package(buf, child->op); 347 351 break; 348 352 case AML_RES_TEMPLATE: 349 - build_append_byte(child->buf, 0x79); /* EndTag */ 353 + build_append_byte(buf, 0x79); /* EndTag */ 350 354 /* 351 355 * checksum operations are treated as succeeded if checksum 352 356 * field is zero. [ACPI Spec 1.0b, 6.4.2.8 End Tag] 353 357 */ 354 - build_append_byte(child->buf, 0); 358 + build_append_byte(buf, 0); 355 359 /* fall through, to pack resources in buffer */ 356 360 case AML_BUFFER: 357 - build_buffer(child->buf, child->op); 361 + build_buffer(buf, child->op); 358 362 break; 359 363 case AML_NO_OPCODE: 360 364 break; ··· 362 366 assert(0); 363 367 break; 364 368 } 365 - build_append_array(parent_ctx->buf, child->buf); 369 + build_append_array(parent_ctx->buf, buf); 370 + build_free_array(buf); 366 371 } 367 372 368 373 /* ACPI 1.0b: 16.2.5.1 Namespace Modifier Objects Encoding: DefScope */ ··· 444 449 Aml *var = aml_opcode(0x7B /* AndOp */); 445 450 aml_append(var, arg1); 446 451 aml_append(var, arg2); 447 - build_append_int(var->buf, 0x00 /* NullNameOp */); 452 + build_append_byte(var->buf, 0x00 /* NullNameOp */); 448 453 return var; 449 454 } 450 455 ··· 542 547 Aml *var = aml_opcode(0x93 /* LequalOp */); 543 548 aml_append(var, arg1); 544 549 aml_append(var, arg2); 545 - build_append_int(var->buf, 0x00); /* NullNameOp */ 546 550 return var; 547 551 } 548 552
+43 -9
hw/core/machine.c
··· 31 31 ms->accel = g_strdup(value); 32 32 } 33 33 34 - static bool machine_get_kernel_irqchip(Object *obj, Error **errp) 35 - { 36 - MachineState *ms = MACHINE(obj); 37 - 38 - return ms->kernel_irqchip; 39 - } 40 - 41 34 static void machine_set_kernel_irqchip(Object *obj, bool value, Error **errp) 42 35 { 43 36 MachineState *ms = MACHINE(obj); 44 37 45 - ms->kernel_irqchip = value; 38 + ms->kernel_irqchip_allowed = value; 39 + ms->kernel_irqchip_required = value; 46 40 } 47 41 48 42 static void machine_get_kvm_shadow_mem(Object *obj, Visitor *v, ··· 289 283 { 290 284 MachineState *ms = MACHINE(obj); 291 285 286 + ms->kernel_irqchip_allowed = true; 287 + ms->kvm_shadow_mem = -1; 288 + ms->dump_guest_core = true; 289 + ms->mem_merge = true; 290 + 292 291 object_property_add_str(obj, "accel", 293 292 machine_get_accel, machine_set_accel, NULL); 294 293 object_property_set_description(obj, "accel", 295 294 "Accelerator list", 296 295 NULL); 297 296 object_property_add_bool(obj, "kernel-irqchip", 298 - machine_get_kernel_irqchip, 297 + NULL, 299 298 machine_set_kernel_irqchip, 300 299 NULL); 301 300 object_property_set_description(obj, "kernel-irqchip", ··· 401 400 bool machine_usb(MachineState *machine) 402 401 { 403 402 return machine->usb; 403 + } 404 + 405 + bool machine_iommu(MachineState *machine) 406 + { 407 + return machine->iommu; 408 + } 409 + 410 + bool machine_kernel_irqchip_allowed(MachineState *machine) 411 + { 412 + return machine->kernel_irqchip_allowed; 413 + } 414 + 415 + bool machine_kernel_irqchip_required(MachineState *machine) 416 + { 417 + return machine->kernel_irqchip_required; 418 + } 419 + 420 + int machine_kvm_shadow_mem(MachineState *machine) 421 + { 422 + return machine->kvm_shadow_mem; 423 + } 424 + 425 + int machine_phandle_start(MachineState *machine) 426 + { 427 + return machine->phandle_start; 428 + } 429 + 430 + bool machine_dump_guest_core(MachineState *machine) 431 + { 432 + return machine->dump_guest_core; 433 + } 434 + 435 + bool machine_mem_merge(MachineState *machine) 436 + { 437 + return machine->mem_merge; 404 438 } 405 439 406 440 static const TypeInfo machine_info = {
+1 -1
hw/pci-host/q35.c
··· 415 415 PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); 416 416 } 417 417 /* Intel IOMMU (VT-d) */ 418 - if (qemu_opt_get_bool(qemu_get_machine_opts(), "iommu", false)) { 418 + if (machine_iommu(current_machine)) { 419 419 mch_init_dmar(mch); 420 420 } 421 421 }
+14 -4
hw/pci/pci.c
··· 1613 1613 /* Initialize a PCI NIC. */ 1614 1614 static PCIDevice *pci_nic_init(NICInfo *nd, PCIBus *rootbus, 1615 1615 const char *default_model, 1616 - const char *default_devaddr) 1616 + const char *default_devaddr, 1617 + Error **errp) 1617 1618 { 1618 1619 const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr; 1620 + Error *err = NULL; 1619 1621 PCIBus *bus; 1620 1622 int devfn; 1621 1623 PCIDevice *pci_dev; ··· 1636 1638 pci_dev = pci_create(bus, devfn, pci_nic_names[i]); 1637 1639 dev = &pci_dev->qdev; 1638 1640 qdev_set_nic_properties(dev, nd); 1639 - if (qdev_init(dev) < 0) 1641 + 1642 + object_property_set_bool(OBJECT(dev), true, "realized", &err); 1643 + if (err) { 1644 + error_propagate(errp, err); 1645 + object_unparent(OBJECT(dev)); 1640 1646 return NULL; 1647 + } 1641 1648 return pci_dev; 1642 1649 } 1643 1650 ··· 1645 1652 const char *default_model, 1646 1653 const char *default_devaddr) 1647 1654 { 1655 + Error *err = NULL; 1648 1656 PCIDevice *res; 1649 1657 1650 1658 if (qemu_show_nic_models(nd->model, pci_nic_models)) 1651 1659 exit(0); 1652 1660 1653 - res = pci_nic_init(nd, rootbus, default_model, default_devaddr); 1654 - if (!res) 1661 + res = pci_nic_init(nd, rootbus, default_model, default_devaddr, &err); 1662 + if (!res) { 1663 + error_report_err(err); 1655 1664 exit(1); 1665 + } 1656 1666 return res; 1657 1667 } 1658 1668
+1 -1
hw/pci/shpc.c
··· 159 159 for (slot = 0; slot < shpc->nslots; ++slot) { 160 160 uint8_t event = shpc->config[SHPC_SLOT_EVENT_LATCH(slot)]; 161 161 uint8_t disable = shpc->config[SHPC_SLOT_EVENT_SERR_INT_DIS(d, slot)]; 162 - uint32_t mask = 1 << SHPC_IDX_TO_LOGICAL(slot); 162 + uint32_t mask = 1U << SHPC_IDX_TO_LOGICAL(slot); 163 163 if (event & ~disable) { 164 164 int_locator |= mask; 165 165 }
+5 -10
hw/ppc/e500.c
··· 734 734 return dev; 735 735 } 736 736 737 - static qemu_irq *ppce500_init_mpic(PPCE500Params *params, MemoryRegion *ccsr, 738 - qemu_irq **irqs) 737 + static qemu_irq *ppce500_init_mpic(MachineState *machine, PPCE500Params *params, 738 + MemoryRegion *ccsr, qemu_irq **irqs) 739 739 { 740 740 qemu_irq *mpic; 741 741 DeviceState *dev = NULL; ··· 745 745 mpic = g_new0(qemu_irq, 256); 746 746 747 747 if (kvm_enabled()) { 748 - QemuOpts *machine_opts = qemu_get_machine_opts(); 749 - bool irqchip_allowed = qemu_opt_get_bool(machine_opts, 750 - "kernel_irqchip", true); 751 - bool irqchip_required = qemu_opt_get_bool(machine_opts, 752 - "kernel_irqchip", false); 753 748 Error *err = NULL; 754 749 755 - if (irqchip_allowed) { 750 + if (machine_kernel_irqchip_allowed(machine)) { 756 751 dev = ppce500_init_mpic_kvm(params, irqs, &err); 757 752 } 758 - if (irqchip_required && !dev) { 753 + if (machine_kernel_irqchip_required(machine) && !dev) { 759 754 error_report("kernel_irqchip requested but unavailable: %s", 760 755 error_get_pretty(err)); 761 756 exit(1); ··· 879 874 memory_region_add_subregion(address_space_mem, params->ccsrbar_base, 880 875 ccsr_addr_space); 881 876 882 - mpic = ppce500_init_mpic(params, ccsr_addr_space, irqs); 877 + mpic = ppce500_init_mpic(machine, params, ccsr_addr_space, irqs); 883 878 884 879 /* Serial */ 885 880 if (serial_hds[0]) {
+6 -9
hw/ppc/spapr.c
··· 127 127 return XICS_COMMON(dev); 128 128 } 129 129 130 - static XICSState *xics_system_init(int nr_servers, int nr_irqs) 130 + static XICSState *xics_system_init(MachineState *machine, 131 + int nr_servers, int nr_irqs) 131 132 { 132 133 XICSState *icp = NULL; 133 134 134 135 if (kvm_enabled()) { 135 - QemuOpts *machine_opts = qemu_get_machine_opts(); 136 - bool irqchip_allowed = qemu_opt_get_bool(machine_opts, 137 - "kernel_irqchip", true); 138 - bool irqchip_required = qemu_opt_get_bool(machine_opts, 139 - "kernel_irqchip", false); 140 136 Error *err = NULL; 141 137 142 - if (irqchip_allowed) { 138 + if (machine_kernel_irqchip_allowed(machine)) { 143 139 icp = try_create_xics(TYPE_KVM_XICS, nr_servers, nr_irqs, &err); 144 140 } 145 - if (irqchip_required && !icp) { 141 + if (machine_kernel_irqchip_required(machine) && !icp) { 146 142 error_report("kernel_irqchip requested but unavailable: %s", 147 143 error_get_pretty(err)); 148 144 } ··· 1455 1451 } 1456 1452 1457 1453 /* Set up Interrupt Controller before we create the VCPUs */ 1458 - spapr->icp = xics_system_init(smp_cpus * kvmppc_smt_threads() / smp_threads, 1454 + spapr->icp = xics_system_init(machine, 1455 + smp_cpus * kvmppc_smt_threads() / smp_threads, 1459 1456 XICS_IRQS); 1460 1457 1461 1458 /* init CPUs */
+6 -6
hw/scsi/virtio-scsi.c
··· 476 476 VirtIOSCSIReq *req = hba_private; 477 477 478 478 if (cmd->len == 0) { 479 - cmd->len = MIN(VIRTIO_SCSI_CDB_SIZE, SCSI_CMD_BUF_SIZE); 479 + cmd->len = MIN(VIRTIO_SCSI_CDB_DEFAULT_SIZE, SCSI_CMD_BUF_SIZE); 480 480 memcpy(cmd->buf, buf, cmd->len); 481 481 } 482 482 ··· 544 544 } 545 545 req->sreq = scsi_req_new(d, req->req.cmd.tag, 546 546 virtio_scsi_get_lun(req->req.cmd.lun), 547 - req->req.cdb, req); 547 + req->req.cmd.cdb, req); 548 548 549 549 if (req->sreq->cmd.mode != SCSI_XFER_NONE 550 550 && (req->sreq->cmd.mode != req->mode || ··· 642 642 qbus_reset_all(&s->bus.qbus); 643 643 s->resetting--; 644 644 645 - vs->sense_size = VIRTIO_SCSI_SENSE_SIZE; 646 - vs->cdb_size = VIRTIO_SCSI_CDB_SIZE; 645 + vs->sense_size = VIRTIO_SCSI_SENSE_DEFAULT_SIZE; 646 + vs->cdb_size = VIRTIO_SCSI_CDB_DEFAULT_SIZE; 647 647 s->events_dropped = false; 648 648 } 649 649 ··· 830 830 return; 831 831 } 832 832 s->cmd_vqs = g_new0(VirtQueue *, s->conf.num_queues); 833 - s->sense_size = VIRTIO_SCSI_SENSE_SIZE; 834 - s->cdb_size = VIRTIO_SCSI_CDB_SIZE; 833 + s->sense_size = VIRTIO_SCSI_SENSE_DEFAULT_SIZE; 834 + s->cdb_size = VIRTIO_SCSI_CDB_DEFAULT_SIZE; 835 835 836 836 s->ctrl_vq = virtio_add_queue(vdev, VIRTIO_SCSI_VQ_SIZE, 837 837 ctrl);
+3 -3
hw/tpm/tpm_tis.c
··· 959 959 tis->bh = qemu_bh_new(tpm_tis_receive_bh, s); 960 960 961 961 isa_init_irq(&s->busdev, &tis->irq, tis->irq_num); 962 + 963 + memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)), 964 + TPM_TIS_ADDR_BASE, &s->mmio); 962 965 } 963 966 964 967 static void tpm_tis_initfn(Object *obj) 965 968 { 966 - ISADevice *dev = ISA_DEVICE(obj); 967 969 TPMState *s = TPM(obj); 968 970 969 971 memory_region_init_io(&s->mmio, OBJECT(s), &tpm_tis_memory_ops, 970 972 s, "tpm-tis-mmio", 971 973 TPM_TIS_NUM_LOCALITIES << TPM_TIS_LOCALITY_SHIFT); 972 - memory_region_add_subregion(isa_address_space(dev), TPM_TIS_ADDR_BASE, 973 - &s->mmio); 974 974 } 975 975 976 976 static void tpm_tis_class_init(ObjectClass *klass, void *data)
+35 -53
hw/virtio/virtio-pci.c
··· 856 856 } 857 857 858 858 #ifdef CONFIG_VIRTFS 859 - static int virtio_9p_init_pci(VirtIOPCIProxy *vpci_dev) 859 + static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 860 860 { 861 861 V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev); 862 862 DeviceState *vdev = DEVICE(&dev->vdev); 863 863 864 864 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 865 - if (qdev_init(vdev) < 0) { 866 - return -1; 867 - } 868 - return 0; 865 + object_property_set_bool(OBJECT(vdev), true, "realized", errp); 869 866 } 870 867 871 868 static Property virtio_9p_pci_properties[] = { ··· 881 878 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 882 879 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 883 880 884 - k->init = virtio_9p_init_pci; 881 + k->realize = virtio_9p_pci_realize; 885 882 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 886 883 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P; 887 884 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; ··· 965 962 virtio_pci_stop_ioeventfd(proxy); 966 963 } 967 964 968 - static int virtio_pci_init(PCIDevice *pci_dev) 965 + static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) 969 966 { 970 967 VirtIOPCIProxy *dev = VIRTIO_PCI(pci_dev); 971 968 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev); 969 + 972 970 virtio_pci_bus_new(&dev->bus, sizeof(dev->bus), dev); 973 - if (k->init != NULL) { 974 - return k->init(dev); 971 + if (k->realize) { 972 + k->realize(dev, errp); 975 973 } 976 - return 0; 977 974 } 978 975 979 976 static void virtio_pci_exit(PCIDevice *pci_dev) ··· 1003 1000 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1004 1001 1005 1002 dc->props = virtio_pci_properties; 1006 - k->init = virtio_pci_init; 1003 + k->realize = virtio_pci_realize; 1007 1004 k->exit = virtio_pci_exit; 1008 1005 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1009 1006 k->revision = VIRTIO_PCI_ABI_VERSION; ··· 1030 1027 DEFINE_PROP_END_OF_LIST(), 1031 1028 }; 1032 1029 1033 - static int virtio_blk_pci_init(VirtIOPCIProxy *vpci_dev) 1030 + static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1034 1031 { 1035 1032 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev); 1036 1033 DeviceState *vdev = DEVICE(&dev->vdev); 1034 + 1037 1035 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1038 - if (qdev_init(vdev) < 0) { 1039 - return -1; 1040 - } 1041 - return 0; 1036 + object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1042 1037 } 1043 1038 1044 1039 static void virtio_blk_pci_class_init(ObjectClass *klass, void *data) ··· 1049 1044 1050 1045 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1051 1046 dc->props = virtio_blk_pci_properties; 1052 - k->init = virtio_blk_pci_init; 1047 + k->realize = virtio_blk_pci_realize; 1053 1048 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1054 1049 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK; 1055 1050 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; ··· 1087 1082 DEFINE_PROP_END_OF_LIST(), 1088 1083 }; 1089 1084 1090 - static int virtio_scsi_pci_init_pci(VirtIOPCIProxy *vpci_dev) 1085 + static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1091 1086 { 1092 1087 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev); 1093 1088 DeviceState *vdev = DEVICE(&dev->vdev); ··· 1110 1105 } 1111 1106 1112 1107 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1113 - if (qdev_init(vdev) < 0) { 1114 - return -1; 1115 - } 1116 - return 0; 1108 + object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1117 1109 } 1118 1110 1119 1111 static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data) ··· 1121 1113 DeviceClass *dc = DEVICE_CLASS(klass); 1122 1114 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1123 1115 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1124 - k->init = virtio_scsi_pci_init_pci; 1116 + 1117 + k->realize = virtio_scsi_pci_realize; 1125 1118 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1126 1119 dc->props = virtio_scsi_pci_properties; 1127 1120 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; ··· 1157 1150 DEFINE_PROP_END_OF_LIST(), 1158 1151 }; 1159 1152 1160 - static int vhost_scsi_pci_init_pci(VirtIOPCIProxy *vpci_dev) 1153 + static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1161 1154 { 1162 1155 VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev); 1163 1156 DeviceState *vdev = DEVICE(&dev->vdev); ··· 1168 1161 } 1169 1162 1170 1163 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1171 - if (qdev_init(vdev) < 0) { 1172 - return -1; 1173 - } 1174 - return 0; 1164 + object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1175 1165 } 1176 1166 1177 1167 static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data) ··· 1179 1169 DeviceClass *dc = DEVICE_CLASS(klass); 1180 1170 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1181 1171 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1182 - k->init = vhost_scsi_pci_init_pci; 1172 + k->realize = vhost_scsi_pci_realize; 1183 1173 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1184 1174 dc->props = vhost_scsi_pci_properties; 1185 1175 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; ··· 1240 1230 DEFINE_PROP_END_OF_LIST(), 1241 1231 }; 1242 1232 1243 - static int virtio_balloon_pci_init(VirtIOPCIProxy *vpci_dev) 1233 + static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1244 1234 { 1245 1235 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev); 1246 1236 DeviceState *vdev = DEVICE(&dev->vdev); ··· 1251 1241 } 1252 1242 1253 1243 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1254 - if (qdev_init(vdev) < 0) { 1255 - return -1; 1256 - } 1257 - return 0; 1244 + object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1258 1245 } 1259 1246 1260 1247 static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data) ··· 1262 1249 DeviceClass *dc = DEVICE_CLASS(klass); 1263 1250 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1264 1251 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1265 - k->init = virtio_balloon_pci_init; 1252 + k->realize = virtio_balloon_pci_realize; 1266 1253 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1267 1254 dc->props = virtio_balloon_pci_properties; 1268 1255 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; ··· 1296 1283 1297 1284 /* virtio-serial-pci */ 1298 1285 1299 - static int virtio_serial_pci_init(VirtIOPCIProxy *vpci_dev) 1286 + static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1300 1287 { 1301 1288 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev); 1302 1289 DeviceState *vdev = DEVICE(&dev->vdev); ··· 1326 1313 } 1327 1314 1328 1315 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1329 - if (qdev_init(vdev) < 0) { 1330 - return -1; 1331 - } 1332 - return 0; 1316 + object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1333 1317 } 1334 1318 1335 1319 static Property virtio_serial_pci_properties[] = { ··· 1345 1329 DeviceClass *dc = DEVICE_CLASS(klass); 1346 1330 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1347 1331 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1348 - k->init = virtio_serial_pci_init; 1332 + k->realize = virtio_serial_pci_realize; 1349 1333 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); 1350 1334 dc->props = virtio_serial_pci_properties; 1351 1335 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; ··· 1380 1364 DEFINE_PROP_END_OF_LIST(), 1381 1365 }; 1382 1366 1383 - static int virtio_net_pci_init(VirtIOPCIProxy *vpci_dev) 1367 + static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1384 1368 { 1385 1369 DeviceState *qdev = DEVICE(vpci_dev); 1386 1370 VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev); ··· 1390 1374 virtio_net_set_netclient_name(&dev->vdev, qdev->id, 1391 1375 object_get_typename(OBJECT(qdev))); 1392 1376 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1393 - if (qdev_init(vdev) < 0) { 1394 - return -1; 1395 - } 1396 - return 0; 1377 + object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1397 1378 } 1398 1379 1399 1380 static void virtio_net_pci_class_init(ObjectClass *klass, void *data) ··· 1409 1390 k->class_id = PCI_CLASS_NETWORK_ETHERNET; 1410 1391 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); 1411 1392 dc->props = virtio_net_properties; 1412 - vpciklass->init = virtio_net_pci_init; 1393 + vpciklass->realize = virtio_net_pci_realize; 1413 1394 } 1414 1395 1415 1396 static void virtio_net_pci_instance_init(Object *obj) ··· 1436 1417 DEFINE_PROP_END_OF_LIST(), 1437 1418 }; 1438 1419 1439 - static int virtio_rng_pci_init(VirtIOPCIProxy *vpci_dev) 1420 + static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1440 1421 { 1441 1422 VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev); 1442 1423 DeviceState *vdev = DEVICE(&vrng->vdev); 1424 + Error *err = NULL; 1443 1425 1444 1426 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1445 - if (qdev_init(vdev) < 0) { 1446 - return -1; 1427 + object_property_set_bool(OBJECT(vdev), true, "realized", &err); 1428 + if (err) { 1429 + error_propagate(errp, err); 1430 + return; 1447 1431 } 1448 1432 1449 1433 object_property_set_link(OBJECT(vrng), 1450 1434 OBJECT(vrng->vdev.conf.rng), "rng", 1451 1435 NULL); 1452 - 1453 - return 0; 1454 1436 } 1455 1437 1456 1438 static void virtio_rng_pci_class_init(ObjectClass *klass, void *data) ··· 1459 1441 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1460 1442 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1461 1443 1462 - k->init = virtio_rng_pci_init; 1444 + k->realize = virtio_rng_pci_realize; 1463 1445 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1464 1446 dc->props = virtio_rng_pci_properties; 1465 1447
+1 -1
hw/virtio/virtio-pci.h
··· 82 82 83 83 typedef struct VirtioPCIClass { 84 84 PCIDeviceClass parent_class; 85 - int (*init)(VirtIOPCIProxy *vpci_dev); 85 + void (*realize)(VirtIOPCIProxy *vpci_dev, Error **errp); 86 86 } VirtioPCIClass; 87 87 88 88 struct VirtIOPCIProxy {
+9 -1
include/hw/boards.h
··· 66 66 extern MachineState *current_machine; 67 67 68 68 bool machine_usb(MachineState *machine); 69 + bool machine_iommu(MachineState *machine); 70 + bool machine_kernel_irqchip_allowed(MachineState *machine); 71 + bool machine_kernel_irqchip_required(MachineState *machine); 72 + int machine_kvm_shadow_mem(MachineState *machine); 73 + int machine_phandle_start(MachineState *machine); 74 + bool machine_dump_guest_core(MachineState *machine); 75 + bool machine_mem_merge(MachineState *machine); 69 76 70 77 /** 71 78 * MachineClass: ··· 124 131 /*< public >*/ 125 132 126 133 char *accel; 127 - bool kernel_irqchip; 134 + bool kernel_irqchip_allowed; 135 + bool kernel_irqchip_required; 128 136 int kvm_shadow_mem; 129 137 char *dtb; 130 138 char *dumpdtb;
+5 -11
include/hw/virtio/virtio-scsi.h
··· 14 14 #ifndef _QEMU_VIRTIO_SCSI_H 15 15 #define _QEMU_VIRTIO_SCSI_H 16 16 17 + /* Override CDB/sense data size: they are dynamic (guest controlled) in QEMU */ 18 + #define VIRTIO_SCSI_CDB_SIZE 0 19 + #define VIRTIO_SCSI_SENSE_SIZE 0 17 20 #include "standard-headers/linux/virtio_scsi.h" 18 21 #include "hw/virtio/virtio.h" 19 22 #include "hw/pci/pci.h" ··· 30 33 OBJECT_CHECK(VirtIOSCSI, (obj), TYPE_VIRTIO_SCSI) 31 34 32 35 #define VIRTIO_SCSI_VQ_SIZE 128 33 - #define VIRTIO_SCSI_CDB_SIZE 32 34 - #define VIRTIO_SCSI_SENSE_SIZE 96 35 36 #define VIRTIO_SCSI_MAX_CHANNEL 0 36 37 #define VIRTIO_SCSI_MAX_TARGET 255 37 38 #define VIRTIO_SCSI_MAX_LUN 16383 ··· 108 109 /* Note: 109 110 * - fields before elem are initialized by virtio_scsi_init_req; 110 111 * - elem is uninitialized at the time of allocation. 111 - * - fields after elem (except the ending cdb[]) are zeroed by 112 - * virtio_scsi_init_req. 112 + * - fields after elem are zeroed by virtio_scsi_init_req. 113 113 * */ 114 114 115 115 VirtQueueElement elem; ··· 134 134 VirtIOSCSIEvent event; 135 135 } resp; 136 136 union { 137 - struct { 138 - VirtIOSCSICmdReq cmd; 139 - uint8_t cdb[]; 140 - } QEMU_PACKED; 137 + VirtIOSCSICmdReq cmd; 141 138 VirtIOSCSICtrlTMFReq tmf; 142 139 VirtIOSCSICtrlANReq an; 143 140 } req; 144 141 } VirtIOSCSIReq; 145 - 146 - QEMU_BUILD_BUG_ON(offsetof(VirtIOSCSIReq, req.cdb) != 147 - offsetof(VirtIOSCSIReq, req.cmd) + sizeof(VirtIOSCSICmdReq)); 148 142 149 143 #define DEFINE_VIRTIO_SCSI_PROPERTIES(_state, _conf_field) \ 150 144 DEFINE_PROP_UINT32("num_queues", _state, _conf_field.num_queues, 1), \
+10 -2
include/standard-headers/linux/virtio_scsi.h
··· 29 29 30 30 #include "standard-headers/linux/virtio_types.h" 31 31 32 - #define VIRTIO_SCSI_CDB_SIZE 32 33 - #define VIRTIO_SCSI_SENSE_SIZE 96 32 + /* Default values of the CDB and sense data size configuration fields */ 33 + #define VIRTIO_SCSI_CDB_DEFAULT_SIZE 32 34 + #define VIRTIO_SCSI_SENSE_DEFAULT_SIZE 96 35 + 36 + #ifndef VIRTIO_SCSI_CDB_SIZE 37 + #define VIRTIO_SCSI_CDB_SIZE VIRTIO_SCSI_CDB_DEFAULT_SIZE 38 + #endif 39 + #ifndef VIRTIO_SCSI_SENSE_SIZE 40 + #define VIRTIO_SCSI_SENSE_SIZE VIRTIO_SCSI_SENSE_DEFAULT_SIZE 41 + #endif 34 42 35 43 /* SCSI command request, followed by data-out */ 36 44 struct virtio_scsi_cmd_req {
+1 -1
include/sysemu/kvm.h
··· 259 259 260 260 int kvm_arch_put_registers(CPUState *cpu, int level); 261 261 262 - int kvm_arch_init(KVMState *s); 262 + int kvm_arch_init(MachineState *ms, KVMState *s); 263 263 264 264 int kvm_arch_init_vcpu(CPUState *cpu); 265 265
+4 -4
kvm-all.c
··· 1360 1360 false); 1361 1361 } 1362 1362 1363 - static int kvm_irqchip_create(KVMState *s) 1363 + static int kvm_irqchip_create(MachineState *machine, KVMState *s) 1364 1364 { 1365 1365 int ret; 1366 1366 1367 - if (!qemu_opt_get_bool(qemu_get_machine_opts(), "kernel_irqchip", true) || 1367 + if (!machine_kernel_irqchip_allowed(machine) || 1368 1368 (!kvm_check_extension(s, KVM_CAP_IRQCHIP) && 1369 1369 (kvm_vm_enable_cap(s, KVM_CAP_S390_IRQCHIP, 0) < 0))) { 1370 1370 return 0; ··· 1598 1598 kvm_resamplefds_allowed = 1599 1599 (kvm_check_extension(s, KVM_CAP_IRQFD_RESAMPLE) > 0); 1600 1600 1601 - ret = kvm_arch_init(s); 1601 + ret = kvm_arch_init(ms, s); 1602 1602 if (ret < 0) { 1603 1603 goto err; 1604 1604 } 1605 1605 1606 - ret = kvm_irqchip_create(s); 1606 + ret = kvm_irqchip_create(ms, s); 1607 1607 if (ret < 0) { 1608 1608 goto err; 1609 1609 }
+1 -1
target-arm/kvm.c
··· 150 150 .class_size = sizeof(ARMHostCPUClass), 151 151 }; 152 152 153 - int kvm_arch_init(KVMState *s) 153 + int kvm_arch_init(MachineState *ms, KVMState *s) 154 154 { 155 155 /* For ARM interrupt delivery is always asynchronous, 156 156 * whether we are using an in-kernel VGIC or not.
+2 -3
target-i386/kvm.c
··· 840 840 return ret; 841 841 } 842 842 843 - int kvm_arch_init(KVMState *s) 843 + int kvm_arch_init(MachineState *ms, KVMState *s) 844 844 { 845 845 uint64_t identity_base = 0xfffbc000; 846 846 uint64_t shadow_mem; ··· 890 890 } 891 891 qemu_register_reset(kvm_unpoison_all, NULL); 892 892 893 - shadow_mem = qemu_opt_get_size(qemu_get_machine_opts(), 894 - "kvm_shadow_mem", -1); 893 + shadow_mem = machine_kvm_shadow_mem(ms); 895 894 if (shadow_mem != -1) { 896 895 shadow_mem /= 4096; 897 896 ret = kvm_vm_ioctl(s, KVM_SET_NR_MMU_PAGES, shadow_mem);
+1 -1
target-mips/kvm.c
··· 40 40 return cs->cpu_index; 41 41 } 42 42 43 - int kvm_arch_init(KVMState *s) 43 + int kvm_arch_init(MachineState *ms, KVMState *s) 44 44 { 45 45 /* MIPS has 128 signals */ 46 46 kvm_set_sigmask_len(s, 16);
+1 -1
target-ppc/kvm.c
··· 95 95 96 96 static int kvm_ppc_register_host_cpu_type(void); 97 97 98 - int kvm_arch_init(KVMState *s) 98 + int kvm_arch_init(MachineState *ms, KVMState *s) 99 99 { 100 100 cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ); 101 101 cap_interrupt_level = kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL);
+1 -1
target-s390x/kvm.c
··· 219 219 trace_kvm_enable_cmma(rc); 220 220 } 221 221 222 - int kvm_arch_init(KVMState *s) 222 + int kvm_arch_init(MachineState *ms, KVMState *s) 223 223 { 224 224 cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); 225 225 cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF);
tests/acpi-test-data/pc/SSDT

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tests/acpi-test-data/pc/SSDT.bridge

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tests/acpi-test-data/q35/SSDT

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tests/acpi-test-data/q35/SSDT.bridge

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