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arm: add NVIC utility functions
Change-Id: I85567251fb00dec0f38be2a63261ad5509f4ec4f
authored by
Aidan MacDonald
and committed by
Solomon Peachy
d68efd33
d14ddcaf
+90
firmware/target/arm/nvic-arm.h
+90
firmware/target/arm/nvic-arm.h
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2025 by Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __NVIC_ARM_H__
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#define __NVIC_ARM_H__
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#include "system.h"
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#include "cortex-m/nvic.h"
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#define NVIC_MAX_PRIO 0xFF
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static inline void nvic_enable_irq(int nr)
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{
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int reg = nr / 32;
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int bit = nr % 32;
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cm_write(NVIC_ISER(reg), BIT_N(bit));
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}
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static inline void nvic_disable_irq(int nr)
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{
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int reg = nr / 32;
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int bit = nr % 32;
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cm_write(NVIC_ICER(reg), BIT_N(bit));
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}
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static inline void nvic_set_pending_irq(int nr)
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{
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int reg = nr / 32;
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int bit = nr % 32;
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cm_write(NVIC_ISPR(reg), BIT_N(bit));
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}
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static inline void nvic_clear_pending_irq(int nr)
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{
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int reg = nr / 32;
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int bit = nr % 32;
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cm_write(NVIC_ICPR(reg), BIT_N(bit));
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}
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static inline bool nvic_is_active_irq(int nr)
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{
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int reg = nr / 32;
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int bit = nr % 32;
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return cm_read(NVIC_IABR(reg)) & BIT_N(bit);
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}
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static inline bool nvic_is_enabled_irq(int nr)
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{
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int reg = nr / 32;
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int bit = nr % 32;
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return cm_read(NVIC_ISER(reg)) & BIT_N(bit);
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}
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static inline void nvic_set_irq_priority(int nr, int prio)
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{
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int reg = nr / 4;
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int shift = (nr % 4) * 8;
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uint32_t val = cm_read(NVIC_IPR(reg));
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val &= NVIC_MAX_PRIO << shift;
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val |= (prio & NVIC_MAX_PRIO) << shift;
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cm_write(NVIC_IPR(reg), val);
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}
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#endif /* __NVIC_ARM_H__ */