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arm: implement get_sp for Cortex-M

On Cortex-M we can just return SP directly, which will return
PSP/MSP depending on the current processor mode.

Note that unwarminder doesn't handle Cortex-M exception frames
yet, so a panic from an interrupt handler will currently stop
at the exception boundary.

Change-Id: I8818126c065c896d781bd52b877965a4094dee2a

authored by

Aidan MacDonald and committed by
Solomon Peachy
96b6a7b4 8d5fd1b2

+10 -4
+3 -1
lib/unwarminder/SOURCES
··· 1 backtrace-unwarminder.c 2 - get_sp.S 3 unwarm_arm.c 4 unwarm.c 5 unwarminder.c 6 unwarmmem.c 7 unwarm_thumb.c 8 safe_read.S
··· 1 backtrace-unwarminder.c 2 unwarm_arm.c 3 unwarm.c 4 unwarminder.c 5 unwarmmem.c 6 unwarm_thumb.c 7 safe_read.S 8 + #if defined(CPU_ARM_CLASSIC) 9 + get_sp.S 10 + #endif
+7 -3
lib/unwarminder/get_sp.S
··· 6 * 7 * On RaaA we are called in USER mode most probably and 8 * cpsr mangling is restricted. We simply copy SP value 9 - * in this situation 10 */ 11 .section .text 12 .type __get_sp,%function 13 .global __get_sp 14 15 __get_sp: 16 - #if (CONFIG_PLATFORM & PLATFORM_NATIVE) 17 mrs r1, cpsr /* save current state */ 18 orr r0, r1, #0xc0 19 msr cpsr_c, r0 /* disable IRQ and FIQ */ ··· 28 get_sp: 29 #endif 30 mov r0, sp /* get SP */ 31 - #if (CONFIG_PLATFORM & PLATFORM_NATIVE) 32 msr cpsr_c, r1 /* restore mode */ 33 #endif 34 bx lr
··· 6 * 7 * On RaaA we are called in USER mode most probably and 8 * cpsr mangling is restricted. We simply copy SP value 9 + * in this situation. 10 + * 11 + * For Cortex-M, SP is banked to MSP/PSP based on the current 12 + * processor mode. Exception stack frames can be detected and 13 + * backtraced across, so we can just return SP like RaaA does. 14 */ 15 .section .text 16 .type __get_sp,%function 17 .global __get_sp 18 19 __get_sp: 20 + #if (CONFIG_PLATFORM & PLATFORM_NATIVE) && defined(CPU_ARM_CLASSIC) 21 mrs r1, cpsr /* save current state */ 22 orr r0, r1, #0xc0 23 msr cpsr_c, r0 /* disable IRQ and FIQ */ ··· 32 get_sp: 33 #endif 34 mov r0, sp /* get SP */ 35 + #if (CONFIG_PLATFORM & PLATFORM_NATIVE) && defined(CPU_ARM_CLASSIC) 36 msr cpsr_c, r1 /* restore mode */ 37 #endif 38 bx lr