tsiry-sandratraina.com
A modern Music Player Daemon based on Rockbox open source high quality audio player
libadwaita
audio
rust
zig
deno
mpris
rockbox
mpd
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24154 a1c6a512-1295-4272-9138-f99709370657
+174
-174
+1
-1
firmware/export/as3525.h
+1
-1
firmware/export/as3525.h
···
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295
#define UART_LNSTATUS_REG (*(volatile unsigned long*)(UART0_BASE + 0x14)) /* Line status register */
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-
#define SD_MCI_POWER (*(volatile unsigned long*)(SD_MCI_BASE + 0x0))
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+
#define SD_MCI_POWER (*(volatile unsigned long*)(SD_MCI_BASE + 0x0))
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301
#define TIMER1_LOAD (*(volatile unsigned long*)(TIMER_BASE + 0x00)) /* 32-bit width */
+1
-1
firmware/export/config/ondavx767.h
+1
-1
firmware/export/config/ondavx767.h
+1
-1
firmware/export/config/zenvisionm60gb.h
+1
-1
firmware/export/config/zenvisionm60gb.h
···
158
158
#define BOOTFILE "rockbox." BOOTFILE_EXT
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159
#define BOOTDIR "/.rockbox"
160
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161
-
/* #define CONFIG_USBOTG USBOTG_ISP1761 */
161
+
/* #define CONFIG_USBOTG USBOTG_ISP1761 */
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#define CONFIG_USBOTG USBOTG_ISP1583
163
163
#define HAVE_USBSTACK
164
164
#define USE_ROCKBOX_USB
+19
-19
firmware/export/i2c-coldfire.h
+19
-19
firmware/export/i2c-coldfire.h
···
44
44
#define MAX_LOOP 0x100 /* TODO: select a better value */
45
45
46
46
/* PLLCR control */
47
-
#define QSPISEL (1 << 11) /* Selects QSPI or I2C interface */
47
+
#define QSPISEL (1 << 11) /* Selects QSPI or I2C interface */
48
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49
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/* Offsets to I2C registers from base address */
50
-
#define O_MADR 0x00 /* Slave Address */
51
-
#define O_MFDR 0x04 /* Frequency divider */
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-
#define O_MBCR 0x08 /* Control register */
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-
#define O_MBSR 0x0c /* Status register */
54
-
#define O_MBDR 0x10 /* Data register */
50
+
#define O_MADR 0x00 /* Slave Address */
51
+
#define O_MFDR 0x04 /* Frequency divider */
52
+
#define O_MBCR 0x08 /* Control register */
53
+
#define O_MBSR 0x0c /* Status register */
54
+
#define O_MBDR 0x10 /* Data register */
55
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56
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/* MBSR - Status register */
57
-
#define ICF (1 << 7) /* Transfer Complete */
58
-
#define IAAS (1 << 6) /* Addressed As Alave */
59
-
#define IBB (1 << 5) /* Bus Busy */
60
-
#define IAL (1 << 4) /* Arbitration Lost */
61
-
#define SRW (1 << 2) /* Slave R/W */
62
-
#define IIF (1 << 1) /* I2C Interrupt */
63
-
#define RXAK (1 << 0) /* No Ack bit */
57
+
#define ICF (1 << 7) /* Transfer Complete */
58
+
#define IAAS (1 << 6) /* Addressed As Alave */
59
+
#define IBB (1 << 5) /* Bus Busy */
60
+
#define IAL (1 << 4) /* Arbitration Lost */
61
+
#define SRW (1 << 2) /* Slave R/W */
62
+
#define IIF (1 << 1) /* I2C Interrupt */
63
+
#define RXAK (1 << 0) /* No Ack bit */
64
64
65
65
/* MBCR - Control register */
66
-
#define IEN (1 << 7) /* I2C Enable */
67
-
#define IIEN (1 << 6) /* Interrupt Enable */
68
-
#define MSTA (1 << 5) /* Master/Slave select */
69
-
#define MTX (1 << 4) /* Transmit/Receive */
70
-
#define TXAK (1 << 3) /* Transfer ACK */
71
-
#define RSTA (1 << 2) /* Restart.. */
66
+
#define IEN (1 << 7) /* I2C Enable */
67
+
#define IIEN (1 << 6) /* Interrupt Enable */
68
+
#define MSTA (1 << 5) /* Master/Slave select */
69
+
#define MTX (1 << 4) /* Transmit/Receive */
70
+
#define TXAK (1 << 3) /* Transfer ACK */
71
+
#define RSTA (1 << 2) /* Restart.. */
72
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73
73
74
74
#endif
+5
-5
firmware/export/lcd.h
+5
-5
firmware/export/lcd.h
···
159
159
#if defined(HAVE_LCD_MODES)
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160
void lcd_set_mode(int mode);
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#define LCD_MODE_RGB565 0x00000001
162
-
#define LCD_MODE_YUV 0x00000002
163
-
#define LCD_MODE_PAL256 0x00000004
162
+
#define LCD_MODE_YUV 0x00000002
163
+
#define LCD_MODE_PAL256 0x00000004
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165
#if HAVE_LCD_MODES & LCD_MODE_PAL256
166
-
void lcd_blit_pal256(unsigned char *src, int src_x, int src_y, int x, int y,
167
-
int width, int height);
168
-
void lcd_pal256_update_pal(fb_data *palette);
166
+
void lcd_blit_pal256(unsigned char *src, int src_x, int src_y, int x, int y,
167
+
int width, int height);
168
+
void lcd_pal256_update_pal(fb_data *palette);
169
169
#endif
170
170
#endif
171
171
+22
-22
firmware/export/mas.h
+22
-22
firmware/export/mas.h
···
27
27
#define MAX_PEAK 0x8000
28
28
29
29
/*
30
-
MAS I2C defs
30
+
MAS I2C defs
31
31
*/
32
32
#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
33
33
#define MAS_ADR 0x3c
34
-
#define MAS_DEV_WRITE (MAS_ADR | 0x00)
35
-
#define MAS_DEV_READ (MAS_ADR | 0x01)
34
+
#define MAS_DEV_WRITE (MAS_ADR | 0x00)
35
+
#define MAS_DEV_READ (MAS_ADR | 0x01)
36
36
37
37
#elif CONFIG_CODEC == MAS3507D
38
38
#define MAS_ADR 0x3a
39
-
#define MAS_DEV_WRITE (MAS_ADR | 0x00)
40
-
#define MAS_DEV_READ (MAS_ADR | 0x01)
39
+
#define MAS_DEV_WRITE (MAS_ADR | 0x00)
40
+
#define MAS_DEV_READ (MAS_ADR | 0x01)
41
41
#endif
42
42
43
43
/* registers..*/
44
44
#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
45
-
#define MAS_DATA_WRITE 0x68
45
+
#define MAS_DATA_WRITE 0x68
46
46
#define MAS_DATA_READ 0x69
47
-
#define MAS_CODEC_WRITE 0x6c
47
+
#define MAS_CODEC_WRITE 0x6c
48
48
#define MAS_CODEC_READ 0x6d
49
-
#define MAS_CONTROL 0x6a
50
-
#define MAS_DCCF 0x76
51
-
#define MAS_DCFR 0x77
49
+
#define MAS_CONTROL 0x6a
50
+
#define MAS_DCCF 0x76
51
+
#define MAS_DCFR 0x77
52
52
53
53
#elif CONFIG_CODEC == MAS3507D
54
-
#define MAS_DATA_WRITE 0x68
54
+
#define MAS_DATA_WRITE 0x68
55
55
#define MAS_DATA_READ 0x69
56
-
#define MAS_CONTROL 0x6a
56
+
#define MAS_CONTROL 0x6a
57
57
#endif
58
58
59
59
/*
60
-
* MAS register
60
+
* MAS register
61
61
*/
62
-
#define MAS_REG_DCCF 0x8e
63
-
#define MAS_REG_MUTE 0xaa
64
-
#define MAS_REG_PIODATA 0xc8
65
-
#define MAS_REG_StartUpConfig 0xe6
66
-
#define MAS_REG_KPRESCALE 0xe7
62
+
#define MAS_REG_DCCF 0x8e
63
+
#define MAS_REG_MUTE 0xaa
64
+
#define MAS_REG_PIODATA 0xc8
65
+
#define MAS_REG_StartUpConfig 0xe6
66
+
#define MAS_REG_KPRESCALE 0xe7
67
67
#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
68
68
#define MAS_REG_KMDB_SWITCH 0x21
69
69
#define MAS_REG_KMDB_STR 0x22
···
77
77
#define MAS_REG_VOLUME_CONTROL 0x10
78
78
#define MAS_REG_BALANCE 0x11
79
79
#define MAS_REG_KAVC 0x12
80
-
#define MAS_REG_KBASS 0x14
81
-
#define MAS_REG_KTREBLE 0x15
80
+
#define MAS_REG_KBASS 0x14
81
+
#define MAS_REG_KTREBLE 0x15
82
82
83
83
#elif CONFIG_CODEC == MAS3507D
84
-
#define MAS_REG_KBASS 0x6b
85
-
#define MAS_REG_KTREBLE 0x6f
84
+
#define MAS_REG_KBASS 0x6b
85
+
#define MAS_REG_KTREBLE 0x6f
86
86
#endif
87
87
88
88
/*
+113
-113
firmware/export/storage.h
+113
-113
firmware/export/storage.h
···
56
56
* pointers, which doesn't work with argument-macros.
57
57
*/
58
58
#define storage_num_drives() NUM_DRIVES
59
-
#if (CONFIG_STORAGE & STORAGE_ATA)
60
-
#define storage_spindown ata_spindown
61
-
#define storage_sleep ata_sleep
62
-
#define storage_spin ata_spin
59
+
#if (CONFIG_STORAGE & STORAGE_ATA)
60
+
#define storage_spindown ata_spindown
61
+
#define storage_sleep ata_sleep
62
+
#define storage_spin ata_spin
63
63
64
-
#define storage_enable(on) ata_enable(on)
65
-
#define storage_sleepnow() ata_sleepnow()
66
-
#define storage_disk_is_active() ata_disk_is_active()
67
-
#define storage_soft_reset() ata_soft_reset()
68
-
#define storage_init() ata_init()
69
-
#define storage_close() ata_close()
70
-
#define storage_read_sectors(drive, start, count, buf) ata_read_sectors(IF_MD2(drive,) start, count, buf)
71
-
#define storage_write_sectors(drive, start, count, buf) ata_write_sectors(IF_MD2(drive,) start, count, buf)
64
+
#define storage_enable(on) ata_enable(on)
65
+
#define storage_sleepnow() ata_sleepnow()
66
+
#define storage_disk_is_active() ata_disk_is_active()
67
+
#define storage_soft_reset() ata_soft_reset()
68
+
#define storage_init() ata_init()
69
+
#define storage_close() ata_close()
70
+
#define storage_read_sectors(drive, start, count, buf) ata_read_sectors(IF_MD2(drive,) start, count, buf)
71
+
#define storage_write_sectors(drive, start, count, buf) ata_write_sectors(IF_MD2(drive,) start, count, buf)
72
72
#ifdef HAVE_STORAGE_FLUSH
73
73
#define storage_flush() (void)0
74
74
#endif
75
-
#define storage_last_disk_activity() ata_last_disk_activity()
76
-
#define storage_spinup_time() ata_spinup_time()
77
-
#define storage_get_identify() ata_get_identify()
75
+
#define storage_last_disk_activity() ata_last_disk_activity()
76
+
#define storage_spinup_time() ata_spinup_time()
77
+
#define storage_get_identify() ata_get_identify()
78
78
79
-
#ifdef STORAGE_GET_INFO
80
-
#define storage_get_info(drive, info) ata_get_info(IF_MD2(drive,) info)
81
-
#endif
82
-
#ifdef HAVE_HOTSWAP
83
-
#define storage_removable(drive) ata_removable(IF_MD(drive))
84
-
#define storage_present(drive) ata_present(IF_MD(drive))
85
-
#endif
86
-
#elif (CONFIG_STORAGE & STORAGE_SD)
87
-
#define storage_spindown sd_spindown
88
-
#define storage_sleep sd_sleep
89
-
#define storage_spin sd_spin
79
+
#ifdef STORAGE_GET_INFO
80
+
#define storage_get_info(drive, info) ata_get_info(IF_MD2(drive,) info)
81
+
#endif
82
+
#ifdef HAVE_HOTSWAP
83
+
#define storage_removable(drive) ata_removable(IF_MD(drive))
84
+
#define storage_present(drive) ata_present(IF_MD(drive))
85
+
#endif
86
+
#elif (CONFIG_STORAGE & STORAGE_SD)
87
+
#define storage_spindown sd_spindown
88
+
#define storage_sleep sd_sleep
89
+
#define storage_spin sd_spin
90
90
91
-
#define storage_enable(on) sd_enable(on)
92
-
#define storage_sleepnow() sd_sleepnow()
93
-
#define storage_disk_is_active() 0
94
-
#define storage_soft_reset() (void)0
95
-
#define storage_init() sd_init()
96
-
#define storage_read_sectors(drive, start, count, buf) sd_read_sectors(IF_MD2(drive,) start, count, buf)
97
-
#define storage_write_sectors(drive, start, count, buf) sd_write_sectors(IF_MD2(drive,) start, count, buf)
91
+
#define storage_enable(on) sd_enable(on)
92
+
#define storage_sleepnow() sd_sleepnow()
93
+
#define storage_disk_is_active() 0
94
+
#define storage_soft_reset() (void)0
95
+
#define storage_init() sd_init()
96
+
#define storage_read_sectors(drive, start, count, buf) sd_read_sectors(IF_MD2(drive,) start, count, buf)
97
+
#define storage_write_sectors(drive, start, count, buf) sd_write_sectors(IF_MD2(drive,) start, count, buf)
98
98
#ifdef HAVE_STORAGE_FLUSH
99
99
#define storage_flush() (void)0
100
100
#endif
101
-
#define storage_last_disk_activity() sd_last_disk_activity()
102
-
#define storage_spinup_time() 0
103
-
#define storage_get_identify() sd_get_identify()
101
+
#define storage_last_disk_activity() sd_last_disk_activity()
102
+
#define storage_spinup_time() 0
103
+
#define storage_get_identify() sd_get_identify()
104
104
105
-
#ifdef STORAGE_GET_INFO
106
-
#define storage_get_info(drive, info) sd_get_info(IF_MD2(drive,) info)
107
-
#endif
108
-
#ifdef HAVE_HOTSWAP
109
-
#define storage_removable(drive) sd_removable(IF_MD(drive))
110
-
#define storage_present(drive) sd_present(IF_MD(drive))
111
-
#endif
112
-
#elif (CONFIG_STORAGE & STORAGE_MMC)
113
-
#define storage_spindown mmc_spindown
114
-
#define storage_sleep mmc_sleep
115
-
#define storage_spin mmc_spin
105
+
#ifdef STORAGE_GET_INFO
106
+
#define storage_get_info(drive, info) sd_get_info(IF_MD2(drive,) info)
107
+
#endif
108
+
#ifdef HAVE_HOTSWAP
109
+
#define storage_removable(drive) sd_removable(IF_MD(drive))
110
+
#define storage_present(drive) sd_present(IF_MD(drive))
111
+
#endif
112
+
#elif (CONFIG_STORAGE & STORAGE_MMC)
113
+
#define storage_spindown mmc_spindown
114
+
#define storage_sleep mmc_sleep
115
+
#define storage_spin mmc_spin
116
116
117
-
#define storage_enable(on) mmc_enable(on)
118
-
#define storage_sleepnow() mmc_sleepnow()
119
-
#define storage_disk_is_active() mmc_disk_is_active()
120
-
#define storage_soft_reset() (void)0
121
-
#define storage_init() mmc_init()
122
-
#define storage_read_sectors(drive, start, count, buf) mmc_read_sectors(IF_MD2(drive,) start, count, buf)
123
-
#define storage_write_sectors(drive, start, count, buf) mmc_write_sectors(IF_MD2(drive,) start, count, buf)
117
+
#define storage_enable(on) mmc_enable(on)
118
+
#define storage_sleepnow() mmc_sleepnow()
119
+
#define storage_disk_is_active() mmc_disk_is_active()
120
+
#define storage_soft_reset() (void)0
121
+
#define storage_init() mmc_init()
122
+
#define storage_read_sectors(drive, start, count, buf) mmc_read_sectors(IF_MD2(drive,) start, count, buf)
123
+
#define storage_write_sectors(drive, start, count, buf) mmc_write_sectors(IF_MD2(drive,) start, count, buf)
124
124
#ifdef HAVE_STORAGE_FLUSH
125
125
#define storage_flush() (void)0
126
126
#endif
127
-
#define storage_last_disk_activity() mmc_last_disk_activity()
128
-
#define storage_spinup_time() 0
129
-
#define storage_get_identify() mmc_get_identify()
130
-
131
-
#ifdef STORAGE_GET_INFO
132
-
#define storage_get_info(drive, info) mmc_get_info(IF_MD2(drive,) info)
133
-
#endif
134
-
#ifdef HAVE_HOTSWAP
135
-
#define storage_removable(drive) mmc_removable(IF_MD(drive))
136
-
#define storage_present(drive) mmc_present(IF_MD(drive))
137
-
#endif
138
-
#elif (CONFIG_STORAGE & STORAGE_NAND)
139
-
#define storage_spindown nand_spindown
140
-
#define storage_sleep nand_sleep
141
-
#define storage_spin nand_spin
127
+
#define storage_last_disk_activity() mmc_last_disk_activity()
128
+
#define storage_spinup_time() 0
129
+
#define storage_get_identify() mmc_get_identify()
130
+
131
+
#ifdef STORAGE_GET_INFO
132
+
#define storage_get_info(drive, info) mmc_get_info(IF_MD2(drive,) info)
133
+
#endif
134
+
#ifdef HAVE_HOTSWAP
135
+
#define storage_removable(drive) mmc_removable(IF_MD(drive))
136
+
#define storage_present(drive) mmc_present(IF_MD(drive))
137
+
#endif
138
+
#elif (CONFIG_STORAGE & STORAGE_NAND)
139
+
#define storage_spindown nand_spindown
140
+
#define storage_sleep nand_sleep
141
+
#define storage_spin nand_spin
142
142
143
-
#define storage_enable(on) (void)0
144
-
#define storage_sleepnow() nand_sleepnow()
145
-
#define storage_disk_is_active() 0
146
-
#define storage_soft_reset() (void)0
147
-
#define storage_init() nand_init()
148
-
#define storage_read_sectors(drive, start, count, buf) nand_read_sectors(IF_MD2(drive,) start, count, buf)
149
-
#define storage_write_sectors(drive, start, count, buf) nand_write_sectors(IF_MD2(drive,) start, count, buf)
143
+
#define storage_enable(on) (void)0
144
+
#define storage_sleepnow() nand_sleepnow()
145
+
#define storage_disk_is_active() 0
146
+
#define storage_soft_reset() (void)0
147
+
#define storage_init() nand_init()
148
+
#define storage_read_sectors(drive, start, count, buf) nand_read_sectors(IF_MD2(drive,) start, count, buf)
149
+
#define storage_write_sectors(drive, start, count, buf) nand_write_sectors(IF_MD2(drive,) start, count, buf)
150
150
#ifdef HAVE_STORAGE_FLUSH
151
-
#define storage_flush() nand_flush()
151
+
#define storage_flush() nand_flush()
152
152
#endif
153
-
#define storage_last_disk_activity() nand_last_disk_activity()
154
-
#define storage_spinup_time() 0
155
-
#define storage_get_identify() nand_get_identify()
156
-
157
-
#ifdef STORAGE_GET_INFO
158
-
#define storage_get_info(drive, info) nand_get_info(IF_MD2(drive,) info)
159
-
#endif
160
-
#ifdef HAVE_HOTSWAP
161
-
#define storage_removable(drive) nand_removable(IF_MD(drive))
162
-
#define storage_present(drive) nand_present(IF_MD(drive))
163
-
#endif
164
-
#elif (CONFIG_STORAGE & STORAGE_RAMDISK)
165
-
#define storage_spindown ramdisk_spindown
166
-
#define storage_sleep ramdisk_sleep
167
-
#define storage_spin ramdisk_spin
153
+
#define storage_last_disk_activity() nand_last_disk_activity()
154
+
#define storage_spinup_time() 0
155
+
#define storage_get_identify() nand_get_identify()
156
+
157
+
#ifdef STORAGE_GET_INFO
158
+
#define storage_get_info(drive, info) nand_get_info(IF_MD2(drive,) info)
159
+
#endif
160
+
#ifdef HAVE_HOTSWAP
161
+
#define storage_removable(drive) nand_removable(IF_MD(drive))
162
+
#define storage_present(drive) nand_present(IF_MD(drive))
163
+
#endif
164
+
#elif (CONFIG_STORAGE & STORAGE_RAMDISK)
165
+
#define storage_spindown ramdisk_spindown
166
+
#define storage_sleep ramdisk_sleep
167
+
#define storage_spin ramdisk_spin
168
168
169
-
#define storage_enable(on) (void)0
170
-
#define storage_sleepnow() ramdisk_sleepnow()
171
-
#define storage_disk_is_active() 0
172
-
#define storage_soft_reset() (void)0
173
-
#define storage_init() ramdisk_init()
174
-
#define storage_read_sectors(drive, start, count, buf) ramdisk_read_sectors(IF_MD2(drive,) start, count, buf)
175
-
#define storage_write_sectors(drive, start, count, buf) ramdisk_write_sectors(IF_MD2(drive,) start, count, buf)
169
+
#define storage_enable(on) (void)0
170
+
#define storage_sleepnow() ramdisk_sleepnow()
171
+
#define storage_disk_is_active() 0
172
+
#define storage_soft_reset() (void)0
173
+
#define storage_init() ramdisk_init()
174
+
#define storage_read_sectors(drive, start, count, buf) ramdisk_read_sectors(IF_MD2(drive,) start, count, buf)
175
+
#define storage_write_sectors(drive, start, count, buf) ramdisk_write_sectors(IF_MD2(drive,) start, count, buf)
176
176
#ifdef HAVE_STORAGE_FLUSH
177
177
#define storage_flush() (void)0
178
178
#endif
179
-
#define storage_last_disk_activity() ramdisk_last_disk_activity()
180
-
#define storage_spinup_time() 0
181
-
#define storage_get_identify() ramdisk_get_identify()
182
-
183
-
#ifdef STORAGE_GET_INFO
184
-
#define storage_get_info(drive, info) ramdisk_get_info(IF_MD2(drive,) info)
185
-
#endif
186
-
#ifdef HAVE_HOTSWAP
187
-
#define storage_removable(drive) ramdisk_removable(IF_MD(drive))
188
-
#define storage_present(drive) ramdisk_present(IF_MD(drive))
189
-
#endif
190
-
#else
191
-
//#error No storage driver!
192
-
#endif
179
+
#define storage_last_disk_activity() ramdisk_last_disk_activity()
180
+
#define storage_spinup_time() 0
181
+
#define storage_get_identify() ramdisk_get_identify()
182
+
183
+
#ifdef STORAGE_GET_INFO
184
+
#define storage_get_info(drive, info) ramdisk_get_info(IF_MD2(drive,) info)
185
+
#endif
186
+
#ifdef HAVE_HOTSWAP
187
+
#define storage_removable(drive) ramdisk_removable(IF_MD(drive))
188
+
#define storage_present(drive) ramdisk_present(IF_MD(drive))
189
+
#endif
190
+
#else
191
+
//#error No storage driver!
192
+
#endif
193
193
#else /* NOT CONFIG_STORAGE_MULTI and NOT SIMULATOR*/
194
194
195
195
/* Simulator and multi-driver use normal functions */
+1
-1
firmware/export/uda1380.h
+1
-1
firmware/export/uda1380.h
+1
-1
firmware/export/usb-tcc.h
+1
-1
firmware/export/usb-tcc.h
···
112
112
#define TCC7xx_USB_EP_DMA_ADDR1 MMR_REG16(USB_BASE, 0xa0) /* EP DMA MCU addr1 register */
113
113
#define TCC7xx_USB_EP_DMA_ADDR2 MMR_REG16(USB_BASE, 0xa4) /* EP DMA MCU addr2 register */
114
114
#define TCC7xx_USB_EP_DMA_STAT MMR_REG16(USB_BASE, 0xc0) /* EP DMA Transfer Status register */
115
-
#define TCC7xx_USB_DELAY_CTRL MMR_REG16(USB_BASE, 0x80) /* Delay control register */
115
+
#define TCC7xx_USB_DELAY_CTRL MMR_REG16(USB_BASE, 0x80) /* Delay control register */
116
116
#endif /* USB_TCC7XX_H */
+10
-10
firmware/export/usb_ch9.h
+10
-10
firmware/export/usb_ch9.h
···
115
115
* are at most sixteen features of each type.) Hubs may also support a
116
116
* new USB_REQ_TEST_AND_SET_FEATURE to put ports into L1 suspend.
117
117
*/
118
-
#define USB_DEVICE_SELF_POWERED 0 /* (read only) */
119
-
#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */
120
-
#define USB_DEVICE_TEST_MODE 2 /* (wired high speed only) */
121
-
#define USB_DEVICE_BATTERY 2 /* (wireless) */
122
-
#define USB_DEVICE_B_HNP_ENABLE 3 /* (otg) dev may initiate HNP */
123
-
#define USB_DEVICE_WUSB_DEVICE 3 /* (wireless)*/
124
-
#define USB_DEVICE_A_HNP_SUPPORT 4 /* (otg) RH port supports HNP */
125
-
#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */
126
-
#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */
118
+
#define USB_DEVICE_SELF_POWERED 0 /* (read only) */
119
+
#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */
120
+
#define USB_DEVICE_TEST_MODE 2 /* (wired high speed only) */
121
+
#define USB_DEVICE_BATTERY 2 /* (wireless) */
122
+
#define USB_DEVICE_B_HNP_ENABLE 3 /* (otg) dev may initiate HNP */
123
+
#define USB_DEVICE_WUSB_DEVICE 3 /* (wireless)*/
124
+
#define USB_DEVICE_A_HNP_SUPPORT 4 /* (otg) RH port supports HNP */
125
+
#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */
126
+
#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */
127
127
128
-
#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
128
+
#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
129
129
130
130
131
131
/**