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qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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target/arm: Implement FMOV (immediate) for fp16

All the hard work is already done by vfp_expand_imm, we just need to
make sure we pick up the correct size.

Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180512003217.9105-11-richard.henderson@linaro.org
[rth: Merge unallocated_encoding check with TCGMemOp conversion.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

(cherry picked from commit 6ba28ddb9be37bdb67e3e38007a53ccbdcd010df)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

authored by

Alex Bennée and committed by
Michael Roth ffc3a150 f3816879

+17 -3
+17 -3
target/arm/translate-a64.c
··· 5431 5431 { 5432 5432 int rd = extract32(insn, 0, 5); 5433 5433 int imm8 = extract32(insn, 13, 8); 5434 - int is_double = extract32(insn, 22, 2); 5434 + int type = extract32(insn, 22, 2); 5435 5435 uint64_t imm; 5436 5436 TCGv_i64 tcg_res; 5437 + TCGMemOp sz; 5437 5438 5438 - if (is_double > 1) { 5439 + switch (type) { 5440 + case 0: 5441 + sz = MO_32; 5442 + break; 5443 + case 1: 5444 + sz = MO_64; 5445 + break; 5446 + case 3: 5447 + sz = MO_16; 5448 + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { 5449 + break; 5450 + } 5451 + /* fallthru */ 5452 + default: 5439 5453 unallocated_encoding(s); 5440 5454 return; 5441 5455 } ··· 5444 5458 return; 5445 5459 } 5446 5460 5447 - imm = vfp_expand_imm(MO_32 + is_double, imm8); 5461 + imm = vfp_expand_imm(sz, imm8); 5448 5462 5449 5463 tcg_res = tcg_const_i64(imm); 5450 5464 write_fp_dreg(s, rd, tcg_res);