jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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tcg: Add INDEX_op_extract2_{i32,i64}

This will let backends implement the double-word shift operation.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Richard Henderson fce1296f 2089fcc9

+51
+7
tcg/README
··· 343 343 344 344 (using an arithmetic right shift). 345 345 346 + * extract2_i32/i64 dest, t1, t2, pos 347 + 348 + For N = {32,64}, extract an N-bit quantity from the concatenation 349 + of t2:t1, beginning at pos. The tcg_gen_extract2_{i32,i64} expander 350 + accepts 0 <= pos <= N as inputs. The backend code generator will 351 + not see either 0 or N as inputs for these opcodes. 352 + 346 353 * extrl_i64_i32 t0, t1 347 354 348 355 For 64-bit hosts only, extract the low 32-bits of input T1 and place it
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tcg/aarch64/tcg-target.h
··· 77 77 #define TCG_TARGET_HAS_deposit_i32 1 78 78 #define TCG_TARGET_HAS_extract_i32 1 79 79 #define TCG_TARGET_HAS_sextract_i32 1 80 + #define TCG_TARGET_HAS_extract2_i32 0 80 81 #define TCG_TARGET_HAS_movcond_i32 1 81 82 #define TCG_TARGET_HAS_add2_i32 1 82 83 #define TCG_TARGET_HAS_sub2_i32 1 ··· 113 114 #define TCG_TARGET_HAS_deposit_i64 1 114 115 #define TCG_TARGET_HAS_extract_i64 1 115 116 #define TCG_TARGET_HAS_sextract_i64 1 117 + #define TCG_TARGET_HAS_extract2_i64 0 116 118 #define TCG_TARGET_HAS_movcond_i64 1 117 119 #define TCG_TARGET_HAS_add2_i64 1 118 120 #define TCG_TARGET_HAS_sub2_i64 1
+1
tcg/arm/tcg-target.h
··· 116 116 #define TCG_TARGET_HAS_deposit_i32 use_armv7_instructions 117 117 #define TCG_TARGET_HAS_extract_i32 use_armv7_instructions 118 118 #define TCG_TARGET_HAS_sextract_i32 use_armv7_instructions 119 + #define TCG_TARGET_HAS_extract2_i32 0 119 120 #define TCG_TARGET_HAS_movcond_i32 1 120 121 #define TCG_TARGET_HAS_mulu2_i32 1 121 122 #define TCG_TARGET_HAS_muls2_i32 1
+2
tcg/i386/tcg-target.h
··· 124 124 #define TCG_TARGET_HAS_deposit_i32 1 125 125 #define TCG_TARGET_HAS_extract_i32 1 126 126 #define TCG_TARGET_HAS_sextract_i32 1 127 + #define TCG_TARGET_HAS_extract2_i32 0 127 128 #define TCG_TARGET_HAS_movcond_i32 1 128 129 #define TCG_TARGET_HAS_add2_i32 1 129 130 #define TCG_TARGET_HAS_sub2_i32 1 ··· 162 163 #define TCG_TARGET_HAS_deposit_i64 1 163 164 #define TCG_TARGET_HAS_extract_i64 1 164 165 #define TCG_TARGET_HAS_sextract_i64 0 166 + #define TCG_TARGET_HAS_extract2_i64 0 165 167 #define TCG_TARGET_HAS_movcond_i64 1 166 168 #define TCG_TARGET_HAS_add2_i64 1 167 169 #define TCG_TARGET_HAS_sub2_i64 1
+2
tcg/mips/tcg-target.h
··· 162 162 #define TCG_TARGET_HAS_deposit_i32 use_mips32r2_instructions 163 163 #define TCG_TARGET_HAS_extract_i32 use_mips32r2_instructions 164 164 #define TCG_TARGET_HAS_sextract_i32 0 165 + #define TCG_TARGET_HAS_extract2_i32 0 165 166 #define TCG_TARGET_HAS_ext8s_i32 use_mips32r2_instructions 166 167 #define TCG_TARGET_HAS_ext16s_i32 use_mips32r2_instructions 167 168 #define TCG_TARGET_HAS_rot_i32 use_mips32r2_instructions ··· 177 178 #define TCG_TARGET_HAS_deposit_i64 use_mips32r2_instructions 178 179 #define TCG_TARGET_HAS_extract_i64 use_mips32r2_instructions 179 180 #define TCG_TARGET_HAS_sextract_i64 0 181 + #define TCG_TARGET_HAS_extract2_i64 0 180 182 #define TCG_TARGET_HAS_ext8s_i64 use_mips32r2_instructions 181 183 #define TCG_TARGET_HAS_ext16s_i64 use_mips32r2_instructions 182 184 #define TCG_TARGET_HAS_rot_i64 use_mips32r2_instructions
+16
tcg/optimize.c
··· 1202 1202 } 1203 1203 goto do_default; 1204 1204 1205 + CASE_OP_32_64(extract2): 1206 + if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { 1207 + TCGArg v1 = arg_info(op->args[1])->val; 1208 + TCGArg v2 = arg_info(op->args[2])->val; 1209 + 1210 + if (opc == INDEX_op_extract2_i64) { 1211 + tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3])); 1212 + } else { 1213 + tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3])); 1214 + tmp = (int32_t)tmp; 1215 + } 1216 + tcg_opt_gen_movi(s, op, op->args[0], tmp); 1217 + break; 1218 + } 1219 + goto do_default; 1220 + 1205 1221 CASE_OP_32_64(setcond): 1206 1222 tmp = do_constant_folding_cond(opc, op->args[1], 1207 1223 op->args[2], op->args[3]);
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tcg/ppc/tcg-target.h
··· 77 77 #define TCG_TARGET_HAS_deposit_i32 1 78 78 #define TCG_TARGET_HAS_extract_i32 1 79 79 #define TCG_TARGET_HAS_sextract_i32 0 80 + #define TCG_TARGET_HAS_extract2_i32 0 80 81 #define TCG_TARGET_HAS_movcond_i32 1 81 82 #define TCG_TARGET_HAS_mulu2_i32 0 82 83 #define TCG_TARGET_HAS_muls2_i32 0 ··· 115 116 #define TCG_TARGET_HAS_deposit_i64 1 116 117 #define TCG_TARGET_HAS_extract_i64 1 117 118 #define TCG_TARGET_HAS_sextract_i64 0 119 + #define TCG_TARGET_HAS_extract2_i64 0 118 120 #define TCG_TARGET_HAS_movcond_i64 1 119 121 #define TCG_TARGET_HAS_add2_i64 1 120 122 #define TCG_TARGET_HAS_sub2_i64 1
+2
tcg/riscv/tcg-target.h
··· 93 93 #define TCG_TARGET_HAS_deposit_i32 0 94 94 #define TCG_TARGET_HAS_extract_i32 0 95 95 #define TCG_TARGET_HAS_sextract_i32 0 96 + #define TCG_TARGET_HAS_extract2_i32 0 96 97 #define TCG_TARGET_HAS_add2_i32 1 97 98 #define TCG_TARGET_HAS_sub2_i32 1 98 99 #define TCG_TARGET_HAS_mulu2_i32 0 ··· 128 129 #define TCG_TARGET_HAS_deposit_i64 0 129 130 #define TCG_TARGET_HAS_extract_i64 0 130 131 #define TCG_TARGET_HAS_sextract_i64 0 132 + #define TCG_TARGET_HAS_extract2_i64 0 131 133 #define TCG_TARGET_HAS_extrl_i64_i32 1 132 134 #define TCG_TARGET_HAS_extrh_i64_i32 1 133 135 #define TCG_TARGET_HAS_ext8s_i64 1
+2
tcg/s390/tcg-target.h
··· 85 85 #define TCG_TARGET_HAS_deposit_i32 (s390_facilities & FACILITY_GEN_INST_EXT) 86 86 #define TCG_TARGET_HAS_extract_i32 (s390_facilities & FACILITY_GEN_INST_EXT) 87 87 #define TCG_TARGET_HAS_sextract_i32 0 88 + #define TCG_TARGET_HAS_extract2_i32 0 88 89 #define TCG_TARGET_HAS_movcond_i32 1 89 90 #define TCG_TARGET_HAS_add2_i32 1 90 91 #define TCG_TARGET_HAS_sub2_i32 1 ··· 121 122 #define TCG_TARGET_HAS_deposit_i64 (s390_facilities & FACILITY_GEN_INST_EXT) 122 123 #define TCG_TARGET_HAS_extract_i64 (s390_facilities & FACILITY_GEN_INST_EXT) 123 124 #define TCG_TARGET_HAS_sextract_i64 0 125 + #define TCG_TARGET_HAS_extract2_i64 0 124 126 #define TCG_TARGET_HAS_movcond_i64 1 125 127 #define TCG_TARGET_HAS_add2_i64 1 126 128 #define TCG_TARGET_HAS_sub2_i64 1
+2
tcg/sparc/tcg-target.h
··· 116 116 #define TCG_TARGET_HAS_deposit_i32 0 117 117 #define TCG_TARGET_HAS_extract_i32 0 118 118 #define TCG_TARGET_HAS_sextract_i32 0 119 + #define TCG_TARGET_HAS_extract2_i32 0 119 120 #define TCG_TARGET_HAS_movcond_i32 1 120 121 #define TCG_TARGET_HAS_add2_i32 1 121 122 #define TCG_TARGET_HAS_sub2_i32 1 ··· 153 154 #define TCG_TARGET_HAS_deposit_i64 0 154 155 #define TCG_TARGET_HAS_extract_i64 0 155 156 #define TCG_TARGET_HAS_sextract_i64 0 157 + #define TCG_TARGET_HAS_extract2_i64 0 156 158 #define TCG_TARGET_HAS_movcond_i64 1 157 159 #define TCG_TARGET_HAS_add2_i64 1 158 160 #define TCG_TARGET_HAS_sub2_i64 1
+4
tcg/tcg-op.c
··· 823 823 tcg_gen_mov_i32(ret, ah); 824 824 } else if (al == ah) { 825 825 tcg_gen_rotri_i32(ret, al, ofs); 826 + } else if (TCG_TARGET_HAS_extract2_i32) { 827 + tcg_gen_op4i_i32(INDEX_op_extract2_i32, ret, al, ah, ofs); 826 828 } else { 827 829 TCGv_i32 t0 = tcg_temp_new_i32(); 828 830 tcg_gen_shri_i32(t0, al, ofs); ··· 2333 2335 tcg_gen_mov_i64(ret, ah); 2334 2336 } else if (al == ah) { 2335 2337 tcg_gen_rotri_i64(ret, al, ofs); 2338 + } else if (TCG_TARGET_HAS_extract2_i64) { 2339 + tcg_gen_op4i_i64(INDEX_op_extract2_i64, ret, al, ah, ofs); 2336 2340 } else { 2337 2341 TCGv_i64 t0 = tcg_temp_new_i64(); 2338 2342 tcg_gen_shri_i64(t0, al, ofs);
+2
tcg/tcg-opc.h
··· 79 79 DEF(deposit_i32, 1, 2, 2, IMPL(TCG_TARGET_HAS_deposit_i32)) 80 80 DEF(extract_i32, 1, 1, 2, IMPL(TCG_TARGET_HAS_extract_i32)) 81 81 DEF(sextract_i32, 1, 1, 2, IMPL(TCG_TARGET_HAS_sextract_i32)) 82 + DEF(extract2_i32, 1, 2, 1, IMPL(TCG_TARGET_HAS_extract2_i32)) 82 83 83 84 DEF(brcond_i32, 0, 2, 2, TCG_OPF_BB_END) 84 85 ··· 146 147 DEF(deposit_i64, 1, 2, 2, IMPL64 | IMPL(TCG_TARGET_HAS_deposit_i64)) 147 148 DEF(extract_i64, 1, 1, 2, IMPL64 | IMPL(TCG_TARGET_HAS_extract_i64)) 148 149 DEF(sextract_i64, 1, 1, 2, IMPL64 | IMPL(TCG_TARGET_HAS_sextract_i64)) 150 + DEF(extract2_i64, 1, 2, 1, IMPL64 | IMPL(TCG_TARGET_HAS_extract2_i64)) 149 151 150 152 /* size changing ops */ 151 153 DEF(ext_i32_i64, 1, 1, 0, IMPL64)
+4
tcg/tcg.c
··· 1426 1426 return TCG_TARGET_HAS_extract_i32; 1427 1427 case INDEX_op_sextract_i32: 1428 1428 return TCG_TARGET_HAS_sextract_i32; 1429 + case INDEX_op_extract2_i32: 1430 + return TCG_TARGET_HAS_extract2_i32; 1429 1431 case INDEX_op_add2_i32: 1430 1432 return TCG_TARGET_HAS_add2_i32; 1431 1433 case INDEX_op_sub2_i32: ··· 1523 1525 return TCG_TARGET_HAS_extract_i64; 1524 1526 case INDEX_op_sextract_i64: 1525 1527 return TCG_TARGET_HAS_sextract_i64; 1528 + case INDEX_op_extract2_i64: 1529 + return TCG_TARGET_HAS_extract2_i64; 1526 1530 case INDEX_op_extrl_i64_i32: 1527 1531 return TCG_TARGET_HAS_extrl_i64_i32; 1528 1532 case INDEX_op_extrh_i64_i32:
+1
tcg/tcg.h
··· 125 125 #define TCG_TARGET_HAS_deposit_i64 0 126 126 #define TCG_TARGET_HAS_extract_i64 0 127 127 #define TCG_TARGET_HAS_sextract_i64 0 128 + #define TCG_TARGET_HAS_extract2_i64 0 128 129 #define TCG_TARGET_HAS_movcond_i64 0 129 130 #define TCG_TARGET_HAS_add2_i64 0 130 131 #define TCG_TARGET_HAS_sub2_i64 0
+2
tcg/tci/tcg-target.h
··· 71 71 #define TCG_TARGET_HAS_deposit_i32 1 72 72 #define TCG_TARGET_HAS_extract_i32 0 73 73 #define TCG_TARGET_HAS_sextract_i32 0 74 + #define TCG_TARGET_HAS_extract2_i32 0 74 75 #define TCG_TARGET_HAS_eqv_i32 0 75 76 #define TCG_TARGET_HAS_nand_i32 0 76 77 #define TCG_TARGET_HAS_nor_i32 0 ··· 97 98 #define TCG_TARGET_HAS_deposit_i64 1 98 99 #define TCG_TARGET_HAS_extract_i64 0 99 100 #define TCG_TARGET_HAS_sextract_i64 0 101 + #define TCG_TARGET_HAS_extract2_i64 0 100 102 #define TCG_TARGET_HAS_div_i64 0 101 103 #define TCG_TARGET_HAS_rem_i64 0 102 104 #define TCG_TARGET_HAS_ext8s_i64 1