jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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RISC-V ELF Machine Definition

Define RISC-V ELF machine EM_RISCV 243

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Signed-off-by: Michael Clark <mjc@sifive.com>

Michael Clark f71a8eaf 4dc62b15

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include/elf.h
··· 119 119 120 120 #define EM_UNICORE32 110 /* UniCore32 */ 121 121 122 + #define EM_RISCV 243 /* RISC-V */ 123 + 122 124 /* 123 125 * This is an interim value that we will use until the committee comes 124 126 * up with a final number.