jcs.org
qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
linux headers: update against v5.4-rc1
Update the headers against commit:
0f1a7b3fac05 ("timer-of: don't use conditional expression
with mixed 'void' types")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Message-id: 20191003154640.22451-2-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
authored by
Eric Auger
and committed by
Peter Maydell
f363d039
3af78db6
+406
-59
+2
include/standard-headers/asm-x86/bootparam.h
+2
include/standard-headers/asm-x86/bootparam.h
+1
include/standard-headers/asm-x86/kvm_para.h
+1
include/standard-headers/asm-x86/kvm_para.h
+24
include/standard-headers/linux/ethtool.h
+24
include/standard-headers/linux/ethtool.h
···
259
259
#define ETHTOOL_PHY_FAST_LINK_DOWN_ON 0
260
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#define ETHTOOL_PHY_FAST_LINK_DOWN_OFF 0xff
261
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+
/* Energy Detect Power Down (EDPD) is a feature supported by some PHYs, where
263
+
* the PHY's RX & TX blocks are put into a low-power mode when there is no
264
+
* link detected (typically cable is un-plugged). For RX, only a minimal
265
+
* link-detection is available, and for TX the PHY wakes up to send link pulses
266
+
* to avoid any lock-ups in case the peer PHY may also be running in EDPD mode.
267
+
*
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+
* Some PHYs may support configuration of the wake-up interval for TX pulses,
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+
* and some PHYs may support only disabling TX pulses entirely. For the latter
270
+
* a special value is required (ETHTOOL_PHY_EDPD_NO_TX) so that this can be
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+
* configured from userspace (should the user want it).
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+
*
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+
* The interval units for TX wake-up are in milliseconds, since this should
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+
* cover a reasonable range of intervals:
275
+
* - from 1 millisecond, which does not sound like much of a power-saver
276
+
* - to ~65 seconds which is quite a lot to wait for a link to come up when
277
+
* plugging a cable
278
+
*/
279
+
#define ETHTOOL_PHY_EDPD_DFLT_TX_MSECS 0xffff
280
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#define ETHTOOL_PHY_EDPD_NO_TX 0xfffe
281
+
#define ETHTOOL_PHY_EDPD_DISABLE 0
282
+
262
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enum phy_tunable_id {
263
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ETHTOOL_PHY_ID_UNSPEC,
264
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ETHTOOL_PHY_DOWNSHIFT,
265
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ETHTOOL_PHY_FAST_LINK_DOWN,
287
+
ETHTOOL_PHY_EDPD,
266
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/*
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* Add your fresh new phy tunable attribute above and remember to update
268
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* phy_tunable_strings[] in net/core/ethtool.c
···
1483
1505
ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64,
1484
1506
ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT = 65,
1485
1507
ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT = 66,
1508
+
ETHTOOL_LINK_MODE_100baseT1_Full_BIT = 67,
1509
+
ETHTOOL_LINK_MODE_1000baseT1_Full_BIT = 68,
1486
1510
1487
1511
/* must be last entry */
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1512
__ETHTOOL_LINK_MODE_MASK_NBITS
+18
-1
include/standard-headers/linux/pci_regs.h
+18
-1
include/standard-headers/linux/pci_regs.h
···
528
528
#define PCI_EXP_LNKCAP_SLS_5_0GB 0x00000002 /* LNKCAP2 SLS Vector bit 1 */
529
529
#define PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */
530
530
#define PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 */
531
+
#define PCI_EXP_LNKCAP_SLS_32_0GB 0x00000005 /* LNKCAP2 SLS Vector bit 4 */
531
532
#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
532
533
#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */
533
534
#define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */
···
556
557
#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */
557
558
#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */
558
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#define PCI_EXP_LNKSTA_CLS_16_0GB 0x0004 /* Current Link Speed 16.0GT/s */
560
+
#define PCI_EXP_LNKSTA_CLS_32_0GB 0x0005 /* Current Link Speed 32.0GT/s */
559
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#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */
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#define PCI_EXP_LNKSTA_NLW_X1 0x0010 /* Current Link Width x1 */
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#define PCI_EXP_LNKSTA_NLW_X2 0x0020 /* Current Link Width x2 */
···
589
591
#define PCI_EXP_SLTCTL_CCIE 0x0010 /* Command Completed Interrupt Enable */
590
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#define PCI_EXP_SLTCTL_HPIE 0x0020 /* Hot-Plug Interrupt Enable */
591
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#define PCI_EXP_SLTCTL_AIC 0x00c0 /* Attention Indicator Control */
594
+
#define PCI_EXP_SLTCTL_ATTN_IND_SHIFT 6 /* Attention Indicator shift */
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595
#define PCI_EXP_SLTCTL_ATTN_IND_ON 0x0040 /* Attention Indicator on */
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#define PCI_EXP_SLTCTL_ATTN_IND_BLINK 0x0080 /* Attention Indicator blinking */
594
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#define PCI_EXP_SLTCTL_ATTN_IND_OFF 0x00c0 /* Attention Indicator off */
···
661
664
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */
662
665
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
663
666
#define PCI_EXP_LNKCAP2_SLS_16_0GB 0x00000010 /* Supported Speed 16GT/s */
667
+
#define PCI_EXP_LNKCAP2_SLS_32_0GB 0x00000020 /* Supported Speed 32GT/s */
664
668
#define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100 /* Crosslink supported */
665
669
#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
666
670
#define PCI_EXP_LNKCTL2_TLS 0x000f
···
668
672
#define PCI_EXP_LNKCTL2_TLS_5_0GT 0x0002 /* Supported Speed 5GT/s */
669
673
#define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Supported Speed 8GT/s */
670
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#define PCI_EXP_LNKCTL2_TLS_16_0GT 0x0004 /* Supported Speed 16GT/s */
675
+
#define PCI_EXP_LNKCTL2_TLS_32_0GT 0x0005 /* Supported Speed 32GT/s */
671
676
#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */
672
677
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52 /* v2 endpoints with link end here */
673
678
#define PCI_EXP_SLTCAP2 52 /* Slot Capabilities 2 */
···
709
714
#define PCI_EXT_CAP_ID_DPC 0x1D /* Downstream Port Containment */
710
715
#define PCI_EXT_CAP_ID_L1SS 0x1E /* L1 PM Substates */
711
716
#define PCI_EXT_CAP_ID_PTM 0x1F /* Precision Time Measurement */
712
-
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PTM
717
+
#define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
718
+
#define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
719
+
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_16GT
713
720
714
721
#define PCI_EXT_CAP_DSN_SIZEOF 12
715
722
#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
···
1048
1055
#define PCI_L1SS_CTL1_LTR_L12_TH_VALUE 0x03ff0000 /* LTR_L1.2_THRESHOLD_Value */
1049
1056
#define PCI_L1SS_CTL1_LTR_L12_TH_SCALE 0xe0000000 /* LTR_L1.2_THRESHOLD_Scale */
1050
1057
#define PCI_L1SS_CTL2 0x0c /* Control 2 Register */
1058
+
1059
+
/* Data Link Feature */
1060
+
#define PCI_DLF_CAP 0x04 /* Capabilities Register */
1061
+
#define PCI_DLF_EXCHANGE_ENABLE 0x80000000 /* Data Link Feature Exchange Enable */
1062
+
1063
+
/* Physical Layer 16.0 GT/s */
1064
+
#define PCI_PL_16GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
1065
+
#define PCI_PL_16GT_LE_CTRL_DSP_TX_PRESET_MASK 0x0000000F
1066
+
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0
1067
+
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4
1051
1068
1052
1069
#endif /* LINUX_PCI_REGS_H */
+19
include/standard-headers/linux/virtio_fs.h
+19
include/standard-headers/linux/virtio_fs.h
···
1
+
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
2
+
3
+
#ifndef _LINUX_VIRTIO_FS_H
4
+
#define _LINUX_VIRTIO_FS_H
5
+
6
+
#include "standard-headers/linux/types.h"
7
+
#include "standard-headers/linux/virtio_ids.h"
8
+
#include "standard-headers/linux/virtio_config.h"
9
+
#include "standard-headers/linux/virtio_types.h"
10
+
11
+
struct virtio_fs_config {
12
+
/* Filesystem name (UTF-8, not NUL-terminated, padded with NULs) */
13
+
uint8_t tag[36];
14
+
15
+
/* Number of request queues */
16
+
uint32_t num_request_queues;
17
+
} QEMU_PACKED;
18
+
19
+
#endif /* _LINUX_VIRTIO_FS_H */
+2
include/standard-headers/linux/virtio_ids.h
+2
include/standard-headers/linux/virtio_ids.h
···
43
43
#define VIRTIO_ID_INPUT 18 /* virtio input */
44
44
#define VIRTIO_ID_VSOCK 19 /* virtio vsock transport */
45
45
#define VIRTIO_ID_CRYPTO 20 /* virtio crypto */
46
+
#define VIRTIO_ID_IOMMU 23 /* virtio IOMMU */
47
+
#define VIRTIO_ID_FS 26 /* virtio filesystem */
46
48
#define VIRTIO_ID_PMEM 27 /* virtio pmem */
47
49
48
50
#endif /* _LINUX_VIRTIO_IDS_H */
+165
include/standard-headers/linux/virtio_iommu.h
+165
include/standard-headers/linux/virtio_iommu.h
···
1
+
/* SPDX-License-Identifier: BSD-3-Clause */
2
+
/*
3
+
* Virtio-iommu definition v0.12
4
+
*
5
+
* Copyright (C) 2019 Arm Ltd.
6
+
*/
7
+
#ifndef _LINUX_VIRTIO_IOMMU_H
8
+
#define _LINUX_VIRTIO_IOMMU_H
9
+
10
+
#include "standard-headers/linux/types.h"
11
+
12
+
/* Feature bits */
13
+
#define VIRTIO_IOMMU_F_INPUT_RANGE 0
14
+
#define VIRTIO_IOMMU_F_DOMAIN_RANGE 1
15
+
#define VIRTIO_IOMMU_F_MAP_UNMAP 2
16
+
#define VIRTIO_IOMMU_F_BYPASS 3
17
+
#define VIRTIO_IOMMU_F_PROBE 4
18
+
#define VIRTIO_IOMMU_F_MMIO 5
19
+
20
+
struct virtio_iommu_range_64 {
21
+
uint64_t start;
22
+
uint64_t end;
23
+
};
24
+
25
+
struct virtio_iommu_range_32 {
26
+
uint32_t start;
27
+
uint32_t end;
28
+
};
29
+
30
+
struct virtio_iommu_config {
31
+
/* Supported page sizes */
32
+
uint64_t page_size_mask;
33
+
/* Supported IOVA range */
34
+
struct virtio_iommu_range_64 input_range;
35
+
/* Max domain ID size */
36
+
struct virtio_iommu_range_32 domain_range;
37
+
/* Probe buffer size */
38
+
uint32_t probe_size;
39
+
};
40
+
41
+
/* Request types */
42
+
#define VIRTIO_IOMMU_T_ATTACH 0x01
43
+
#define VIRTIO_IOMMU_T_DETACH 0x02
44
+
#define VIRTIO_IOMMU_T_MAP 0x03
45
+
#define VIRTIO_IOMMU_T_UNMAP 0x04
46
+
#define VIRTIO_IOMMU_T_PROBE 0x05
47
+
48
+
/* Status types */
49
+
#define VIRTIO_IOMMU_S_OK 0x00
50
+
#define VIRTIO_IOMMU_S_IOERR 0x01
51
+
#define VIRTIO_IOMMU_S_UNSUPP 0x02
52
+
#define VIRTIO_IOMMU_S_DEVERR 0x03
53
+
#define VIRTIO_IOMMU_S_INVAL 0x04
54
+
#define VIRTIO_IOMMU_S_RANGE 0x05
55
+
#define VIRTIO_IOMMU_S_NOENT 0x06
56
+
#define VIRTIO_IOMMU_S_FAULT 0x07
57
+
#define VIRTIO_IOMMU_S_NOMEM 0x08
58
+
59
+
struct virtio_iommu_req_head {
60
+
uint8_t type;
61
+
uint8_t reserved[3];
62
+
};
63
+
64
+
struct virtio_iommu_req_tail {
65
+
uint8_t status;
66
+
uint8_t reserved[3];
67
+
};
68
+
69
+
struct virtio_iommu_req_attach {
70
+
struct virtio_iommu_req_head head;
71
+
uint32_t domain;
72
+
uint32_t endpoint;
73
+
uint8_t reserved[8];
74
+
struct virtio_iommu_req_tail tail;
75
+
};
76
+
77
+
struct virtio_iommu_req_detach {
78
+
struct virtio_iommu_req_head head;
79
+
uint32_t domain;
80
+
uint32_t endpoint;
81
+
uint8_t reserved[8];
82
+
struct virtio_iommu_req_tail tail;
83
+
};
84
+
85
+
#define VIRTIO_IOMMU_MAP_F_READ (1 << 0)
86
+
#define VIRTIO_IOMMU_MAP_F_WRITE (1 << 1)
87
+
#define VIRTIO_IOMMU_MAP_F_MMIO (1 << 2)
88
+
89
+
#define VIRTIO_IOMMU_MAP_F_MASK (VIRTIO_IOMMU_MAP_F_READ | \
90
+
VIRTIO_IOMMU_MAP_F_WRITE | \
91
+
VIRTIO_IOMMU_MAP_F_MMIO)
92
+
93
+
struct virtio_iommu_req_map {
94
+
struct virtio_iommu_req_head head;
95
+
uint32_t domain;
96
+
uint64_t virt_start;
97
+
uint64_t virt_end;
98
+
uint64_t phys_start;
99
+
uint32_t flags;
100
+
struct virtio_iommu_req_tail tail;
101
+
};
102
+
103
+
struct virtio_iommu_req_unmap {
104
+
struct virtio_iommu_req_head head;
105
+
uint32_t domain;
106
+
uint64_t virt_start;
107
+
uint64_t virt_end;
108
+
uint8_t reserved[4];
109
+
struct virtio_iommu_req_tail tail;
110
+
};
111
+
112
+
#define VIRTIO_IOMMU_PROBE_T_NONE 0
113
+
#define VIRTIO_IOMMU_PROBE_T_RESV_MEM 1
114
+
115
+
#define VIRTIO_IOMMU_PROBE_T_MASK 0xfff
116
+
117
+
struct virtio_iommu_probe_property {
118
+
uint16_t type;
119
+
uint16_t length;
120
+
};
121
+
122
+
#define VIRTIO_IOMMU_RESV_MEM_T_RESERVED 0
123
+
#define VIRTIO_IOMMU_RESV_MEM_T_MSI 1
124
+
125
+
struct virtio_iommu_probe_resv_mem {
126
+
struct virtio_iommu_probe_property head;
127
+
uint8_t subtype;
128
+
uint8_t reserved[3];
129
+
uint64_t start;
130
+
uint64_t end;
131
+
};
132
+
133
+
struct virtio_iommu_req_probe {
134
+
struct virtio_iommu_req_head head;
135
+
uint32_t endpoint;
136
+
uint8_t reserved[64];
137
+
138
+
uint8_t properties[];
139
+
140
+
/*
141
+
* Tail follows the variable-length properties array. No padding,
142
+
* property lengths are all aligned on 8 bytes.
143
+
*/
144
+
};
145
+
146
+
/* Fault types */
147
+
#define VIRTIO_IOMMU_FAULT_R_UNKNOWN 0
148
+
#define VIRTIO_IOMMU_FAULT_R_DOMAIN 1
149
+
#define VIRTIO_IOMMU_FAULT_R_MAPPING 2
150
+
151
+
#define VIRTIO_IOMMU_FAULT_F_READ (1 << 0)
152
+
#define VIRTIO_IOMMU_FAULT_F_WRITE (1 << 1)
153
+
#define VIRTIO_IOMMU_FAULT_F_EXEC (1 << 2)
154
+
#define VIRTIO_IOMMU_FAULT_F_ADDRESS (1 << 8)
155
+
156
+
struct virtio_iommu_fault {
157
+
uint8_t reason;
158
+
uint8_t reserved[3];
159
+
uint32_t flags;
160
+
uint32_t endpoint;
161
+
uint8_t reserved2[4];
162
+
uint64_t address;
163
+
};
164
+
165
+
#endif
+3
-3
include/standard-headers/linux/virtio_pmem.h
+3
-3
include/standard-headers/linux/virtio_pmem.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
1
+
/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause */
2
2
/*
3
3
* Definitions for virtio-pmem devices.
4
4
*
···
7
7
* Author(s): Pankaj Gupta <pagupta@redhat.com>
8
8
*/
9
9
10
-
#ifndef _UAPI_LINUX_VIRTIO_PMEM_H
11
-
#define _UAPI_LINUX_VIRTIO_PMEM_H
10
+
#ifndef _LINUX_VIRTIO_PMEM_H
11
+
#define _LINUX_VIRTIO_PMEM_H
12
12
13
13
#include "standard-headers/linux/types.h"
14
14
#include "standard-headers/linux/virtio_ids.h"
+15
-1
linux-headers/asm-arm/kvm.h
+15
-1
linux-headers/asm-arm/kvm.h
···
214
214
#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM | KVM_REG_SIZE_U64 | \
215
215
KVM_REG_ARM_FW | ((r) & 0xffff))
216
216
#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0)
217
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1 KVM_REG_ARM_FW_REG(1)
218
+
/* Higher values mean better protection. */
219
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL 0
220
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL 1
221
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED 2
222
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2 KVM_REG_ARM_FW_REG(2)
223
+
/* Higher values mean better protection. */
224
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL 0
225
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN 1
226
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL 2
227
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3
228
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4)
217
229
218
230
/* Device Control API: ARM VGIC */
219
231
#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
···
254
266
#define KVM_DEV_ARM_ITS_CTRL_RESET 4
255
267
256
268
/* KVM_IRQ_LINE irq field index values */
269
+
#define KVM_ARM_IRQ_VCPU2_SHIFT 28
270
+
#define KVM_ARM_IRQ_VCPU2_MASK 0xf
257
271
#define KVM_ARM_IRQ_TYPE_SHIFT 24
258
-
#define KVM_ARM_IRQ_TYPE_MASK 0xff
272
+
#define KVM_ARM_IRQ_TYPE_MASK 0xf
259
273
#define KVM_ARM_IRQ_VCPU_SHIFT 16
260
274
#define KVM_ARM_IRQ_VCPU_MASK 0xff
261
275
#define KVM_ARM_IRQ_NUM_SHIFT 0
+2
linux-headers/asm-arm/unistd-common.h
+2
linux-headers/asm-arm/unistd-common.h
···
388
388
#define __NR_fsconfig (__NR_SYSCALL_BASE + 431)
389
389
#define __NR_fsmount (__NR_SYSCALL_BASE + 432)
390
390
#define __NR_fspick (__NR_SYSCALL_BASE + 433)
391
+
#define __NR_pidfd_open (__NR_SYSCALL_BASE + 434)
392
+
#define __NR_clone3 (__NR_SYSCALL_BASE + 435)
391
393
392
394
#endif /* _ASM_ARM_UNISTD_COMMON_H */
+20
-1
linux-headers/asm-arm64/kvm.h
+20
-1
linux-headers/asm-arm64/kvm.h
···
229
229
#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
230
230
KVM_REG_ARM_FW | ((r) & 0xffff))
231
231
#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0)
232
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1 KVM_REG_ARM_FW_REG(1)
233
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL 0
234
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL 1
235
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED 2
236
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2 KVM_REG_ARM_FW_REG(2)
237
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL 0
238
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN 1
239
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL 2
240
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3
241
+
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4)
232
242
233
243
/* SVE registers */
234
244
#define KVM_REG_ARM64_SVE (0x15 << KVM_REG_ARM_COPROC_SHIFT)
···
260
270
KVM_REG_SIZE_U256 | \
261
271
((i) & (KVM_ARM64_SVE_MAX_SLICES - 1)))
262
272
273
+
/*
274
+
* Register values for KVM_REG_ARM64_SVE_ZREG(), KVM_REG_ARM64_SVE_PREG() and
275
+
* KVM_REG_ARM64_SVE_FFR() are represented in memory in an endianness-
276
+
* invariant layout which differs from the layout used for the FPSIMD
277
+
* V-registers on big-endian systems: see sigcontext.h for more explanation.
278
+
*/
279
+
263
280
#define KVM_ARM64_SVE_VQ_MIN __SVE_VQ_MIN
264
281
#define KVM_ARM64_SVE_VQ_MAX __SVE_VQ_MAX
265
282
···
308
325
#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1
309
326
310
327
/* KVM_IRQ_LINE irq field index values */
328
+
#define KVM_ARM_IRQ_VCPU2_SHIFT 28
329
+
#define KVM_ARM_IRQ_VCPU2_MASK 0xf
311
330
#define KVM_ARM_IRQ_TYPE_SHIFT 24
312
-
#define KVM_ARM_IRQ_TYPE_MASK 0xff
331
+
#define KVM_ARM_IRQ_TYPE_MASK 0xf
313
332
#define KVM_ARM_IRQ_VCPU_SHIFT 16
314
333
#define KVM_ARM_IRQ_VCPU_MASK 0xff
315
334
#define KVM_ARM_IRQ_NUM_SHIFT 0
+12
-6
linux-headers/asm-generic/mman-common.h
+12
-6
linux-headers/asm-generic/mman-common.h
···
19
19
#define MAP_TYPE 0x0f /* Mask for type of mapping */
20
20
#define MAP_FIXED 0x10 /* Interpret addr exactly */
21
21
#define MAP_ANONYMOUS 0x20 /* don't use a file */
22
-
#ifdef CONFIG_MMAP_ALLOW_UNINITIALIZED
23
-
# define MAP_UNINITIALIZED 0x4000000 /* For anonymous mmap, memory could be uninitialized */
24
-
#else
25
-
# define MAP_UNINITIALIZED 0x0 /* Don't support this flag */
26
-
#endif
27
22
28
-
/* 0x0100 - 0x80000 flags are defined in asm-generic/mman.h */
23
+
/* 0x0100 - 0x4000 flags are defined in asm-generic/mman.h */
24
+
#define MAP_POPULATE 0x008000 /* populate (prefault) pagetables */
25
+
#define MAP_NONBLOCK 0x010000 /* do not block on IO */
26
+
#define MAP_STACK 0x020000 /* give out an address that is best suited for process/thread stacks */
27
+
#define MAP_HUGETLB 0x040000 /* create a huge page mapping */
28
+
#define MAP_SYNC 0x080000 /* perform synchronous page faults for the mapping */
29
29
#define MAP_FIXED_NOREPLACE 0x100000 /* MAP_FIXED which doesn't unmap underlying mapping */
30
+
31
+
#define MAP_UNINITIALIZED 0x4000000 /* For anonymous mmap, memory could be
32
+
* uninitialized */
30
33
31
34
/*
32
35
* Flags for mlock
···
63
66
64
67
#define MADV_WIPEONFORK 18 /* Zero memory on fork, child only */
65
68
#define MADV_KEEPONFORK 19 /* Undo MADV_WIPEONFORK */
69
+
70
+
#define MADV_COLD 20 /* deactivate these pages */
71
+
#define MADV_PAGEOUT 21 /* reclaim these pages */
66
72
67
73
/* compatibility flags */
68
74
#define MAP_FILE 0
+4
-6
linux-headers/asm-generic/mman.h
+4
-6
linux-headers/asm-generic/mman.h
···
9
9
#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
10
10
#define MAP_LOCKED 0x2000 /* pages are locked */
11
11
#define MAP_NORESERVE 0x4000 /* don't check for reservations */
12
-
#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
13
-
#define MAP_NONBLOCK 0x10000 /* do not block on IO */
14
-
#define MAP_STACK 0x20000 /* give out an address that is best suited for process/thread stacks */
15
-
#define MAP_HUGETLB 0x40000 /* create a huge page mapping */
16
-
#define MAP_SYNC 0x80000 /* perform synchronous page faults for the mapping */
17
12
18
-
/* Bits [26:31] are reserved, see mman-common.h for MAP_HUGETLB usage */
13
+
/*
14
+
* Bits [26:31] are reserved, see asm-generic/hugetlb_encode.h
15
+
* for MAP_HUGETLB usage
16
+
*/
19
17
20
18
#define MCL_CURRENT 1 /* lock all current mappings */
21
19
#define MCL_FUTURE 2 /* lock all future mappings */
+8
-2
linux-headers/asm-generic/unistd.h
+8
-2
linux-headers/asm-generic/unistd.h
···
569
569
__SC_COMP(__NR_semctl, sys_semctl, compat_sys_semctl)
570
570
#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG != 32
571
571
#define __NR_semtimedop 192
572
-
__SC_COMP(__NR_semtimedop, sys_semtimedop, sys_semtimedop_time32)
572
+
__SC_3264(__NR_semtimedop, sys_semtimedop_time32, sys_semtimedop)
573
573
#endif
574
574
#define __NR_semop 193
575
575
__SYSCALL(__NR_semop, sys_semop)
···
844
844
__SYSCALL(__NR_fsmount, sys_fsmount)
845
845
#define __NR_fspick 433
846
846
__SYSCALL(__NR_fspick, sys_fspick)
847
+
#define __NR_pidfd_open 434
848
+
__SYSCALL(__NR_pidfd_open, sys_pidfd_open)
849
+
#ifdef __ARCH_WANT_SYS_CLONE3
850
+
#define __NR_clone3 435
851
+
__SYSCALL(__NR_clone3, sys_clone3)
852
+
#endif
847
853
848
854
#undef __NR_syscalls
849
-
#define __NR_syscalls 434
855
+
#define __NR_syscalls 436
850
856
851
857
/*
852
858
* 32 bit systems traditionally used different
+3
linux-headers/asm-mips/mman.h
+3
linux-headers/asm-mips/mman.h
···
95
95
#define MADV_WIPEONFORK 18 /* Zero memory on fork, child only */
96
96
#define MADV_KEEPONFORK 19 /* Undo MADV_WIPEONFORK */
97
97
98
+
#define MADV_COLD 20 /* deactivate these pages */
99
+
#define MADV_PAGEOUT 21 /* reclaim these pages */
100
+
98
101
/* compatibility flags */
99
102
#define MAP_FILE 0
100
103
+1
linux-headers/asm-mips/unistd_n32.h
+1
linux-headers/asm-mips/unistd_n32.h
+1
linux-headers/asm-mips/unistd_n64.h
+1
linux-headers/asm-mips/unistd_n64.h
+1
linux-headers/asm-mips/unistd_o32.h
+1
linux-headers/asm-mips/unistd_o32.h
+1
-5
linux-headers/asm-powerpc/mman.h
+1
-5
linux-headers/asm-powerpc/mman.h
···
21
21
#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
22
22
#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
23
23
24
+
24
25
#define MCL_CURRENT 0x2000 /* lock all currently mapped pages */
25
26
#define MCL_FUTURE 0x4000 /* lock all additions to address space */
26
27
#define MCL_ONFAULT 0x8000 /* lock all pages that are faulted in */
27
-
28
-
#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
29
-
#define MAP_NONBLOCK 0x10000 /* do not block on IO */
30
-
#define MAP_STACK 0x20000 /* give out an address that is best suited for process/thread stacks */
31
-
#define MAP_HUGETLB 0x40000 /* create a huge page mapping */
32
28
33
29
/* Override any generic PKEY permission defines */
34
30
#define PKEY_DISABLE_EXECUTE 0x4
+2
linux-headers/asm-powerpc/unistd_32.h
+2
linux-headers/asm-powerpc/unistd_32.h
+2
linux-headers/asm-powerpc/unistd_64.h
+2
linux-headers/asm-powerpc/unistd_64.h
+6
linux-headers/asm-s390/kvm.h
+6
linux-headers/asm-s390/kvm.h
···
231
231
#define KVM_SYNC_GSCB (1UL << 9)
232
232
#define KVM_SYNC_BPBC (1UL << 10)
233
233
#define KVM_SYNC_ETOKEN (1UL << 11)
234
+
235
+
#define KVM_SYNC_S390_VALID_FIELDS \
236
+
(KVM_SYNC_PREFIX | KVM_SYNC_GPRS | KVM_SYNC_ACRS | KVM_SYNC_CRS | \
237
+
KVM_SYNC_ARCH0 | KVM_SYNC_PFAULT | KVM_SYNC_VRS | KVM_SYNC_RICCB | \
238
+
KVM_SYNC_FPRS | KVM_SYNC_GSCB | KVM_SYNC_BPBC | KVM_SYNC_ETOKEN)
239
+
234
240
/* length and alignment of the sdnx as a power of two */
235
241
#define SDNXC 8
236
242
#define SDNXL (1UL << SDNXC)
+2
linux-headers/asm-s390/unistd_32.h
+2
linux-headers/asm-s390/unistd_32.h
+2
linux-headers/asm-s390/unistd_64.h
+2
linux-headers/asm-s390/unistd_64.h
+21
-7
linux-headers/asm-x86/kvm.h
+21
-7
linux-headers/asm-x86/kvm.h
···
378
378
struct kvm_vcpu_events events;
379
379
};
380
380
381
-
#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
382
-
#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
383
-
#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
384
-
#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
381
+
#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
382
+
#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
383
+
#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
384
+
#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
385
+
#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
385
386
386
387
#define KVM_STATE_NESTED_FORMAT_VMX 0
387
-
#define KVM_STATE_NESTED_FORMAT_SVM 1
388
+
#define KVM_STATE_NESTED_FORMAT_SVM 1 /* unused */
388
389
389
390
#define KVM_STATE_NESTED_GUEST_MODE 0x00000001
390
391
#define KVM_STATE_NESTED_RUN_PENDING 0x00000002
391
392
#define KVM_STATE_NESTED_EVMCS 0x00000004
392
393
393
-
#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
394
-
395
394
#define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
396
395
#define KVM_STATE_NESTED_SMM_VMXON 0x00000002
396
+
397
+
#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
397
398
398
399
struct kvm_vmx_nested_state_data {
399
400
__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
···
431
432
struct kvm_vmx_nested_state_data vmx[0];
432
433
} data;
433
434
};
435
+
436
+
/* for KVM_CAP_PMU_EVENT_FILTER */
437
+
struct kvm_pmu_event_filter {
438
+
__u32 action;
439
+
__u32 nevents;
440
+
__u32 fixed_counter_bitmap;
441
+
__u32 flags;
442
+
__u32 pad[4];
443
+
__u64 events[0];
444
+
};
445
+
446
+
#define KVM_PMU_EVENT_ALLOW 0
447
+
#define KVM_PMU_EVENT_DENY 1
434
448
435
449
#endif /* _ASM_X86_KVM_H */
+1
-1
linux-headers/asm-x86/unistd.h
+1
-1
linux-headers/asm-x86/unistd.h
+2
linux-headers/asm-x86/unistd_32.h
+2
linux-headers/asm-x86/unistd_32.h
+2
linux-headers/asm-x86/unistd_64.h
+2
linux-headers/asm-x86/unistd_64.h
+2
linux-headers/asm-x86/unistd_x32.h
+2
linux-headers/asm-x86/unistd_x32.h
···
299
299
#define __NR_fsconfig (__X32_SYSCALL_BIT + 431)
300
300
#define __NR_fsmount (__X32_SYSCALL_BIT + 432)
301
301
#define __NR_fspick (__X32_SYSCALL_BIT + 433)
302
+
#define __NR_pidfd_open (__X32_SYSCALL_BIT + 434)
303
+
#define __NR_clone3 (__X32_SYSCALL_BIT + 435)
302
304
#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
303
305
#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
304
306
#define __NR_ioctl (__X32_SYSCALL_BIT + 514)
+10
-2
linux-headers/linux/kvm.h
+10
-2
linux-headers/linux/kvm.h
···
116
116
* ACPI gsi notion of irq.
117
117
* For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47..
118
118
* For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23..
119
-
* For ARM: See Documentation/virtual/kvm/api.txt
119
+
* For ARM: See Documentation/virt/kvm/api.txt
120
120
*/
121
121
union {
122
122
__u32 irq;
···
243
243
#define KVM_INTERNAL_ERROR_SIMUL_EX 2
244
244
/* Encounter unexpected vm-exit due to delivery event. */
245
245
#define KVM_INTERNAL_ERROR_DELIVERY_EV 3
246
+
/* Encounter unexpected vm-exit reason */
247
+
#define KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON 4
246
248
247
249
/* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */
248
250
struct kvm_run {
···
995
997
#define KVM_CAP_ARM_SVE 170
996
998
#define KVM_CAP_ARM_PTRAUTH_ADDRESS 171
997
999
#define KVM_CAP_ARM_PTRAUTH_GENERIC 172
1000
+
#define KVM_CAP_PMU_EVENT_FILTER 173
1001
+
#define KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 174
1002
+
#define KVM_CAP_HYPERV_DIRECT_TLBFLUSH 175
998
1003
999
1004
#ifdef KVM_CAP_IRQ_ROUTING
1000
1005
···
1085
1090
*
1086
1091
* KVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies
1087
1092
* the irqfd to operate in resampling mode for level triggered interrupt
1088
-
* emulation. See Documentation/virtual/kvm/api.txt.
1093
+
* emulation. See Documentation/virt/kvm/api.txt.
1089
1094
*/
1090
1095
#define KVM_IRQFD_FLAG_RESAMPLE (1 << 1)
1091
1096
···
1141
1146
#define KVM_REG_S390 0x5000000000000000ULL
1142
1147
#define KVM_REG_ARM64 0x6000000000000000ULL
1143
1148
#define KVM_REG_MIPS 0x7000000000000000ULL
1149
+
#define KVM_REG_RISCV 0x8000000000000000ULL
1144
1150
1145
1151
#define KVM_REG_SIZE_SHIFT 52
1146
1152
#define KVM_REG_SIZE_MASK 0x00f0000000000000ULL
···
1329
1335
#define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info)
1330
1336
/* Available with KVM_CAP_PPC_GET_CPU_CHAR */
1331
1337
#define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char)
1338
+
/* Available with KVM_CAP_PMU_EVENT_FILTER */
1339
+
#define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_filter)
1332
1340
1333
1341
/* ioctl for vm fd */
1334
1342
#define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device)
+1
-4
linux-headers/linux/psp-sev.h
+1
-4
linux-headers/linux/psp-sev.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
1
2
/*
2
3
* Userspace interface for AMD Secure Encrypted Virtualization (SEV)
3
4
* platform management commands.
···
7
8
* Author: Brijesh Singh <brijesh.singh@amd.com>
8
9
*
9
10
* SEV API specification is available at: https://developer.amd.com/sev/
10
-
*
11
-
* This program is free software; you can redistribute it and/or modify
12
-
* it under the terms of the GNU General Public License version 2 as
13
-
* published by the Free Software Foundation.
14
11
*/
15
12
16
13
#ifndef __PSP_SEV_USER_H__
+51
-20
linux-headers/linux/vfio.h
+51
-20
linux-headers/linux/vfio.h
···
295
295
__u32 subtype; /* type specific */
296
296
};
297
297
298
+
/*
299
+
* List of region types, global per bus driver.
300
+
* If you introduce a new type, please add it here.
301
+
*/
302
+
303
+
/* PCI region type containing a PCI vendor part */
298
304
#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
299
305
#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff)
306
+
#define VFIO_REGION_TYPE_GFX (1)
307
+
#define VFIO_REGION_TYPE_CCW (2)
300
308
301
-
/* 8086 Vendor sub-types */
309
+
/* sub-types for VFIO_REGION_TYPE_PCI_* */
310
+
311
+
/* 8086 vendor PCI sub-types */
302
312
#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
303
313
#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
304
314
#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
305
315
306
-
#define VFIO_REGION_TYPE_GFX (1)
316
+
/* 10de vendor PCI sub-types */
317
+
/*
318
+
* NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
319
+
*/
320
+
#define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
321
+
322
+
/* 1014 vendor PCI sub-types */
323
+
/*
324
+
* IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
325
+
* to do TLB invalidation on a GPU.
326
+
*/
327
+
#define VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD (1)
328
+
329
+
/* sub-types for VFIO_REGION_TYPE_GFX */
307
330
#define VFIO_REGION_SUBTYPE_GFX_EDID (1)
308
331
309
332
/**
···
353
376
#define VFIO_DEVICE_GFX_LINK_STATE_DOWN 2
354
377
};
355
378
356
-
#define VFIO_REGION_TYPE_CCW (2)
357
-
/* ccw sub-types */
379
+
/* sub-types for VFIO_REGION_TYPE_CCW */
358
380
#define VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD (1)
359
-
360
-
/*
361
-
* 10de vendor sub-type
362
-
*
363
-
* NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
364
-
*/
365
-
#define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
366
-
367
-
/*
368
-
* 1014 vendor sub-type
369
-
*
370
-
* IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
371
-
* to do TLB invalidation on a GPU.
372
-
*/
373
-
#define VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD (1)
374
381
375
382
/*
376
383
* The MSIX mappable capability informs that MSIX data of a BAR can be mmapped
···
714
721
__u32 argsz;
715
722
__u32 flags;
716
723
#define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */
717
-
__u64 iova_pgsizes; /* Bitmap of supported page sizes */
724
+
#define VFIO_IOMMU_INFO_CAPS (1 << 1) /* Info supports caps */
725
+
__u64 iova_pgsizes; /* Bitmap of supported page sizes */
726
+
__u32 cap_offset; /* Offset within info struct of first cap */
727
+
};
728
+
729
+
/*
730
+
* The IOVA capability allows to report the valid IOVA range(s)
731
+
* excluding any non-relaxable reserved regions exposed by
732
+
* devices attached to the container. Any DMA map attempt
733
+
* outside the valid iova range will return error.
734
+
*
735
+
* The structures below define version 1 of this capability.
736
+
*/
737
+
#define VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE 1
738
+
739
+
struct vfio_iova_range {
740
+
__u64 start;
741
+
__u64 end;
742
+
};
743
+
744
+
struct vfio_iommu_type1_info_cap_iova_range {
745
+
struct vfio_info_cap_header header;
746
+
__u32 nr_iovas;
747
+
__u32 reserved;
748
+
struct vfio_iova_range iova_ranges[];
718
749
};
719
750
720
751
#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)