jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
fork atom

hw/9118.c: Implement active-low interrupt support

The 9118 ethernet controller interrupt line is active low unless
the IRQ config register is programmed to set both the IRQ_POL
(polarity: active-high) and IRQ_TYPE (type: push-pull) bits:
implement support for inverting the irq output in other configurations.
This also requires that we support setting the bits in the first
place, and that we correctly preserve them across software reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>

authored by

Peter Maydell and committed by
Andrzej Zaborowski eb47d7c5 953ffe0f

+9 -3
+9 -3
hw/lan9118.c
··· 228 228 if ((s->irq_cfg & IRQ_EN) == 0) { 229 229 level = 0; 230 230 } 231 + if ((s->irq_cfg & (IRQ_TYPE | IRQ_POL)) != (IRQ_TYPE | IRQ_POL)) { 232 + /* Interrupt is active low unless we're configured as 233 + * active-high polarity, push-pull type. 234 + */ 235 + level = !level; 236 + } 231 237 qemu_set_irq(s->irq, level); 232 238 } 233 239 ··· 294 300 static void lan9118_reset(DeviceState *d) 295 301 { 296 302 lan9118_state *s = FROM_SYSBUS(lan9118_state, sysbus_from_qdev(d)); 297 - 298 - s->irq_cfg &= ~(IRQ_TYPE | IRQ_POL); 303 + s->irq_cfg &= (IRQ_TYPE | IRQ_POL); 299 304 s->int_sts = 0; 300 305 s->int_en = 0; 301 306 s->fifo_int = 0x48000000; ··· 904 909 switch (offset) { 905 910 case CSR_IRQ_CFG: 906 911 /* TODO: Implement interrupt deassertion intervals. */ 907 - s->irq_cfg = (s->irq_cfg & IRQ_INT) | (val & IRQ_EN); 912 + val &= (IRQ_EN | IRQ_POL | IRQ_TYPE); 913 + s->irq_cfg = (s->irq_cfg & IRQ_INT) | val; 908 914 break; 909 915 case CSR_INT_STS: 910 916 s->int_sts &= ~val;