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qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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hw/misc/ivshmem: Bury dead legacy INTx code

Devices "ivshmem-plain" and "ivshmem-doorbell" support only MSI-X.
Config space register Interrupt Pin is zero. Device "ivshmem"
additionally supported legacy INTx, but it was removed in commit
5a0e75f0a9 "hw/misc/ivshmem: Remove deprecated "ivshmem" legacy
device". The commit left ivshmem_update_irq() behind. Since the
Interrupt Pin register is zero, the function does nothing. Remove it.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20191205203557.11254-1-armbru@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>

authored by

Markus Armbruster and committed by
Thomas Huth e858e04d 1ee5e144

-35
-35
hw/misc/ivshmem.c
··· 136 136 return s->master == ON_OFF_AUTO_ON; 137 137 } 138 138 139 - static void ivshmem_update_irq(IVShmemState *s) 140 - { 141 - PCIDevice *d = PCI_DEVICE(s); 142 - uint32_t isr = s->intrstatus & s->intrmask; 143 - 144 - /* 145 - * Do nothing unless the device actually uses INTx. Here's how 146 - * the device variants signal interrupts, what they put in PCI 147 - * config space: 148 - * Device variant Interrupt Interrupt Pin MSI-X cap. 149 - * ivshmem-plain none 0 no 150 - * ivshmem-doorbell MSI-X 1 yes(1) 151 - * ivshmem,msi=off INTx 1 no 152 - * ivshmem,msi=on MSI-X 1(2) yes(1) 153 - * (1) if guest enabled MSI-X 154 - * (2) the device lies 155 - * Leads to the condition for doing nothing: 156 - */ 157 - if (ivshmem_has_feature(s, IVSHMEM_MSI) 158 - || !d->config[PCI_INTERRUPT_PIN]) { 159 - return; 160 - } 161 - 162 - /* don't print ISR resets */ 163 - if (isr) { 164 - IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n", 165 - isr ? 1 : 0, s->intrstatus, s->intrmask); 166 - } 167 - 168 - pci_set_irq(d, isr != 0); 169 - } 170 - 171 139 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val) 172 140 { 173 141 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val); 174 142 175 143 s->intrmask = val; 176 - ivshmem_update_irq(s); 177 144 } 178 145 179 146 static uint32_t ivshmem_IntrMask_read(IVShmemState *s) ··· 189 156 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val); 190 157 191 158 s->intrstatus = val; 192 - ivshmem_update_irq(s); 193 159 } 194 160 195 161 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s) ··· 198 164 199 165 /* reading ISR clears all interrupts */ 200 166 s->intrstatus = 0; 201 - ivshmem_update_irq(s); 202 167 return ret; 203 168 } 204 169