jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
fork atom

hw/timer/m48t59: Convert debug printf()s to trace events

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
Message-Id: <20200117165809.31067-3-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

authored by

Philippe Mathieu-Daudé and committed by
Laurent Vivier e21d73ec aff55693

+11 -11
-5
hw/rtc/m48t59-internal.h
··· 26 26 #ifndef HW_M48T59_INTERNAL_H 27 27 #define HW_M48T59_INTERNAL_H 28 28 29 - #define M48T59_DEBUG 0 30 - 31 - #define NVRAM_PRINTF(fmt, ...) do { \ 32 - if (M48T59_DEBUG) { printf(fmt , ## __VA_ARGS__); } } while (0) 33 - 34 29 /* 35 30 * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has 36 31 * alarm and a watchdog timer and related control registers. In the
+5 -6
hw/rtc/m48t59.c
··· 35 35 #include "exec/address-spaces.h" 36 36 #include "qemu/bcd.h" 37 37 #include "qemu/module.h" 38 + #include "trace.h" 38 39 39 40 #include "m48t59-internal.h" 40 41 #include "migration/vmstate.h" ··· 192 193 struct tm tm; 193 194 int tmp; 194 195 195 - if (addr > 0x1FF8 && addr < 0x2000) 196 - NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val); 196 + trace_m48txx_nvram_mem_write(addr, val); 197 197 198 198 /* check for NVRAM access */ 199 199 if ((NVRAM->model == 2 && addr < 0x7f8) || ··· 450 450 } 451 451 break; 452 452 } 453 - if (addr > 0x1FF9 && addr < 0x2000) 454 - NVRAM_PRINTF("%s: 0x%08x <= 0x%08x\n", __func__, addr, retval); 453 + trace_m48txx_nvram_mem_read(addr, retval); 455 454 456 455 return retval; 457 456 } ··· 462 461 { 463 462 M48t59State *NVRAM = opaque; 464 463 465 - NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" => 0x%"PRIx64"\n", __func__, addr, val); 464 + trace_m48txx_nvram_io_write(addr, val); 466 465 switch (addr) { 467 466 case 0: 468 467 NVRAM->addr &= ~0x00FF; ··· 494 493 retval = -1; 495 494 break; 496 495 } 497 - NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" <= 0x%08x\n", __func__, addr, retval); 496 + trace_m48txx_nvram_io_read(addr, retval); 498 497 499 498 return retval; 500 499 }
+6
hw/rtc/trace-events
··· 17 17 # aspeed-rtc.c 18 18 aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 19 19 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 20 + 21 + # m48t59.c 22 + m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64 23 + m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64 24 + m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x" 25 + m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x"