qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

target/cris: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace cris_env_get_cpu with env_archcpu. The combination
CPU(cris_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

+6 -16
+1 -1
linux-user/cris/cpu_loop.c
··· 23 23 24 24 void cpu_loop(CPUCRISState *env) 25 25 { 26 - CPUState *cs = CPU(cris_env_get_cpu(env)); 26 + CPUState *cs = env_cpu(env); 27 27 int trapnr, ret; 28 28 target_siginfo_t info; 29 29
-5
target/cris/cpu.h
··· 183 183 CPUCRISState env; 184 184 }; 185 185 186 - static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) 187 - { 188 - return container_of(env, CRISCPU, env); 189 - } 190 - 191 186 #define ENV_OFFSET offsetof(CRISCPU, env) 192 187 193 188 #ifndef CONFIG_USER_ONLY
+1 -2
target/cris/mmu.c
··· 288 288 289 289 void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid) 290 290 { 291 - CRISCPU *cpu = cris_env_get_cpu(env); 292 291 target_ulong vaddr; 293 292 unsigned int idx; 294 293 uint32_t lo, hi; ··· 312 311 if (tlb_v && !tlb_g && (tlb_pid == pid)) { 313 312 vaddr = tlb_vpn << TARGET_PAGE_BITS; 314 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); 315 - tlb_flush_page(CPU(cpu), vaddr); 314 + tlb_flush_page(env_cpu(env), vaddr); 316 315 } 317 316 } 318 317 }
+3 -7
target/cris/op_helper.c
··· 39 39 40 40 void helper_raise_exception(CPUCRISState *env, uint32_t index) 41 41 { 42 - CPUState *cs = CPU(cris_env_get_cpu(env)); 42 + CPUState *cs = env_cpu(env); 43 43 44 44 cs->exception_index = index; 45 45 cpu_loop_exit(cs); ··· 58 58 void helper_spc_write(CPUCRISState *env, uint32_t new_spc) 59 59 { 60 60 #if !defined(CONFIG_USER_ONLY) 61 - CRISCPU *cpu = cris_env_get_cpu(env); 62 - CPUState *cs = CPU(cpu); 61 + CPUState *cs = env_cpu(env); 63 62 64 63 tlb_flush_page(cs, env->pregs[PR_SPC]); 65 64 tlb_flush_page(cs, new_spc); ··· 72 71 73 72 void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) 74 73 { 75 - #if !defined(CONFIG_USER_ONLY) 76 - CRISCPU *cpu = cris_env_get_cpu(env); 77 - #endif 78 74 uint32_t srs; 79 75 srs = env->pregs[PR_SRS]; 80 76 srs &= 3; ··· 112 108 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", 113 109 vaddr, tlb_v, env->pc); 114 110 if (tlb_v) { 115 - tlb_flush_page(CPU(cpu), vaddr); 111 + tlb_flush_page(env_cpu(env), vaddr); 116 112 } 117 113 } 118 114 }
+1 -1
target/cris/translate.c
··· 3097 3097 * delayslot, like in real hw. 3098 3098 */ 3099 3099 pc_start = tb->pc & ~1; 3100 - dc->cpu = cris_env_get_cpu(env); 3100 + dc->cpu = env_archcpu(env); 3101 3101 dc->tb = tb; 3102 3102 3103 3103 dc->is_jmp = DISAS_NEXT;