jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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Implement configurable descriptor size in ftgmac100

The hardware supports configurable descriptor sizes, configured in the DBLAC
register.

Most drivers use the default 4 word descriptor, which is currently hardcoded,
but Aspeed SDK configures 8 words to store extra data.

Signed-off-by: Erik Smit <erik.lucas.smit@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[PMM: removed unnecessary parens]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

authored by

Erik Smit and committed by
Peter Maydell d7a64d00 3d26d7d6

+24 -2
+24 -2
hw/net/ftgmac100.c
··· 80 80 #define FTGMAC100_APTC_TXPOLL_TIME_SEL (1 << 12) 81 81 82 82 /* 83 + * DMA burst length and arbitration control register 84 + */ 85 + #define FTGMAC100_DBLAC_RXBURST_SIZE(x) (((x) >> 8) & 0x3) 86 + #define FTGMAC100_DBLAC_TXBURST_SIZE(x) (((x) >> 10) & 0x3) 87 + #define FTGMAC100_DBLAC_RXDES_SIZE(x) ((((x) >> 12) & 0xf) * 8) 88 + #define FTGMAC100_DBLAC_TXDES_SIZE(x) ((((x) >> 16) & 0xf) * 8) 89 + #define FTGMAC100_DBLAC_IFG_CNT(x) (((x) >> 20) & 0x7) 90 + #define FTGMAC100_DBLAC_IFG_INC (1 << 23) 91 + 92 + /* 83 93 * PHY control register 84 94 */ 85 95 #define FTGMAC100_PHYCR_MIIRD (1 << 26) ··· 553 563 if (bd.des0 & s->txdes0_edotr) { 554 564 addr = tx_ring; 555 565 } else { 556 - addr += sizeof(FTGMAC100Desc); 566 + addr += FTGMAC100_DBLAC_TXDES_SIZE(s->dblac); 557 567 } 558 568 } 559 569 ··· 800 810 s->phydata = value & 0xffff; 801 811 break; 802 812 case FTGMAC100_DBLAC: /* DMA Burst Length and Arbitration Control */ 813 + if (FTGMAC100_DBLAC_TXDES_SIZE(s->dblac) < sizeof(FTGMAC100Desc)) { 814 + qemu_log_mask(LOG_GUEST_ERROR, 815 + "%s: transmit descriptor too small : %d bytes\n", 816 + __func__, FTGMAC100_DBLAC_TXDES_SIZE(s->dblac)); 817 + break; 818 + } 819 + if (FTGMAC100_DBLAC_RXDES_SIZE(s->dblac) < sizeof(FTGMAC100Desc)) { 820 + qemu_log_mask(LOG_GUEST_ERROR, 821 + "%s: receive descriptor too small : %d bytes\n", 822 + __func__, FTGMAC100_DBLAC_RXDES_SIZE(s->dblac)); 823 + break; 824 + } 803 825 s->dblac = value; 804 826 break; 805 827 case FTGMAC100_REVR: /* Feature Register */ ··· 982 1004 if (bd.des0 & s->rxdes0_edorr) { 983 1005 addr = s->rx_ring; 984 1006 } else { 985 - addr += sizeof(FTGMAC100Desc); 1007 + addr += FTGMAC100_DBLAC_RXDES_SIZE(s->dblac); 986 1008 } 987 1009 } 988 1010 s->rx_descriptor = addr;