jcs.org
qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
bcm2835_gpio: add bcm2835 gpio controller
This adds the BCM2835 GPIO controller.
It currently implements:
- The 54 GPIOs as outputs (qemu_irq)
- The SD controller selection via alternate function of GPIOs 48-53
Signed-off-by: Clement Deschamps <clement.deschamps@antfield.fr>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1488293711-14195-4-git-send-email-peter.maydell@linaro.org
Message-id: 20170224164021.9066-4-clement.deschamps@antfield.fr
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
authored by
Clement Deschamps
and committed by
Peter Maydell
d72fc9dc
97fb87cc
+393
+1
hw/gpio/Makefile.objs
+1
hw/gpio/Makefile.objs
+353
hw/gpio/bcm2835_gpio.c
+353
hw/gpio/bcm2835_gpio.c
···
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/*
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* Raspberry Pi (BCM2835) GPIO Controller
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*
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* Copyright (c) 2017 Antfield SAS
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*
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* Authors:
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* Clement Deschamps <clement.deschamps@antfield.fr>
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* Luc Michel <luc.michel@antfield.fr>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/timer.h"
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#include "qapi/error.h"
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#include "hw/sysbus.h"
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#include "hw/sd/sd.h"
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#include "hw/gpio/bcm2835_gpio.h"
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+
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#define GPFSEL0 0x00
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#define GPFSEL1 0x04
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#define GPFSEL2 0x08
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#define GPFSEL3 0x0C
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#define GPFSEL4 0x10
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#define GPFSEL5 0x14
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#define GPSET0 0x1C
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#define GPSET1 0x20
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#define GPCLR0 0x28
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#define GPCLR1 0x2C
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#define GPLEV0 0x34
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#define GPLEV1 0x38
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#define GPEDS0 0x40
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#define GPEDS1 0x44
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#define GPREN0 0x4C
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#define GPREN1 0x50
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#define GPFEN0 0x58
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#define GPFEN1 0x5C
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#define GPHEN0 0x64
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#define GPHEN1 0x68
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#define GPLEN0 0x70
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#define GPLEN1 0x74
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#define GPAREN0 0x7C
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#define GPAREN1 0x80
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#define GPAFEN0 0x88
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#define GPAFEN1 0x8C
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#define GPPUD 0x94
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#define GPPUDCLK0 0x98
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#define GPPUDCLK1 0x9C
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static uint32_t gpfsel_get(BCM2835GpioState *s, uint8_t reg)
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{
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int i;
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uint32_t value = 0;
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for (i = 0; i < 10; i++) {
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uint32_t index = 10 * reg + i;
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if (index < sizeof(s->fsel)) {
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value |= (s->fsel[index] & 0x7) << (3 * i);
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}
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}
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return value;
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}
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static void gpfsel_set(BCM2835GpioState *s, uint8_t reg, uint32_t value)
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{
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int i;
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for (i = 0; i < 10; i++) {
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uint32_t index = 10 * reg + i;
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if (index < sizeof(s->fsel)) {
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int fsel = (value >> (3 * i)) & 0x7;
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s->fsel[index] = fsel;
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}
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}
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/* SD controller selection (48-53) */
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if (s->sd_fsel != 0
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&& (s->fsel[48] == 0) /* SD_CLK_R */
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&& (s->fsel[49] == 0) /* SD_CMD_R */
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&& (s->fsel[50] == 0) /* SD_DATA0_R */
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&& (s->fsel[51] == 0) /* SD_DATA1_R */
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&& (s->fsel[52] == 0) /* SD_DATA2_R */
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&& (s->fsel[53] == 0) /* SD_DATA3_R */
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) {
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/* SDHCI controller selected */
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sdbus_reparent_card(s->sdbus_sdhost, s->sdbus_sdhci);
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s->sd_fsel = 0;
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} else if (s->sd_fsel != 4
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&& (s->fsel[48] == 4) /* SD_CLK_R */
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&& (s->fsel[49] == 4) /* SD_CMD_R */
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&& (s->fsel[50] == 4) /* SD_DATA0_R */
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&& (s->fsel[51] == 4) /* SD_DATA1_R */
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&& (s->fsel[52] == 4) /* SD_DATA2_R */
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&& (s->fsel[53] == 4) /* SD_DATA3_R */
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) {
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/* SDHost controller selected */
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sdbus_reparent_card(s->sdbus_sdhci, s->sdbus_sdhost);
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s->sd_fsel = 4;
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}
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}
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static int gpfsel_is_out(BCM2835GpioState *s, int index)
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{
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if (index >= 0 && index < 54) {
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return s->fsel[index] == 1;
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}
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return 0;
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}
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static void gpset(BCM2835GpioState *s,
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uint32_t val, uint8_t start, uint8_t count, uint32_t *lev)
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{
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uint32_t changes = val & ~*lev;
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uint32_t cur = 1;
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int i;
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for (i = 0; i < count; i++) {
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if ((changes & cur) && (gpfsel_is_out(s, start + i))) {
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qemu_set_irq(s->out[start + i], 1);
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}
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cur <<= 1;
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}
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*lev |= val;
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}
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static void gpclr(BCM2835GpioState *s,
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uint32_t val, uint8_t start, uint8_t count, uint32_t *lev)
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{
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uint32_t changes = val & *lev;
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uint32_t cur = 1;
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int i;
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for (i = 0; i < count; i++) {
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if ((changes & cur) && (gpfsel_is_out(s, start + i))) {
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qemu_set_irq(s->out[start + i], 0);
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}
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cur <<= 1;
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}
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*lev &= ~val;
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}
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static uint64_t bcm2835_gpio_read(void *opaque, hwaddr offset,
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unsigned size)
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{
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BCM2835GpioState *s = (BCM2835GpioState *)opaque;
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switch (offset) {
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case GPFSEL0:
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case GPFSEL1:
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case GPFSEL2:
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case GPFSEL3:
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case GPFSEL4:
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case GPFSEL5:
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return gpfsel_get(s, offset / 4);
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case GPSET0:
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case GPSET1:
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/* Write Only */
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return 0;
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case GPCLR0:
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case GPCLR1:
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/* Write Only */
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return 0;
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case GPLEV0:
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return s->lev0;
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case GPLEV1:
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return s->lev1;
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case GPEDS0:
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case GPEDS1:
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case GPREN0:
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case GPREN1:
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case GPFEN0:
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case GPFEN1:
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case GPHEN0:
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case GPHEN1:
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case GPLEN0:
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case GPLEN1:
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case GPAREN0:
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case GPAREN1:
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case GPAFEN0:
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case GPAFEN1:
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case GPPUD:
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case GPPUDCLK0:
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case GPPUDCLK1:
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/* Not implemented */
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return 0;
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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__func__, offset);
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break;
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}
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return 0;
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}
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static void bcm2835_gpio_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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{
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BCM2835GpioState *s = (BCM2835GpioState *)opaque;
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switch (offset) {
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case GPFSEL0:
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case GPFSEL1:
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case GPFSEL2:
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case GPFSEL3:
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case GPFSEL4:
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case GPFSEL5:
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gpfsel_set(s, offset / 4, value);
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break;
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case GPSET0:
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gpset(s, value, 0, 32, &s->lev0);
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break;
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case GPSET1:
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gpset(s, value, 32, 22, &s->lev1);
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break;
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case GPCLR0:
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gpclr(s, value, 0, 32, &s->lev0);
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break;
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case GPCLR1:
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gpclr(s, value, 32, 22, &s->lev1);
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break;
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case GPLEV0:
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case GPLEV1:
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/* Read Only */
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break;
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case GPEDS0:
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case GPEDS1:
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case GPREN0:
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case GPREN1:
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case GPFEN0:
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case GPFEN1:
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case GPHEN0:
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case GPHEN1:
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case GPLEN0:
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case GPLEN1:
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case GPAREN0:
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case GPAREN1:
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case GPAFEN0:
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case GPAFEN1:
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case GPPUD:
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case GPPUDCLK0:
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case GPPUDCLK1:
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/* Not implemented */
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break;
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default:
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goto err_out;
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}
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return;
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err_out:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
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__func__, offset);
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}
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static void bcm2835_gpio_reset(DeviceState *dev)
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{
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BCM2835GpioState *s = BCM2835_GPIO(dev);
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int i;
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for (i = 0; i < 6; i++) {
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gpfsel_set(s, i, 0);
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}
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s->sd_fsel = 0;
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/* SDHCI is selected by default */
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sdbus_reparent_card(&s->sdbus, s->sdbus_sdhci);
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s->lev0 = 0;
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s->lev1 = 0;
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}
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static const MemoryRegionOps bcm2835_gpio_ops = {
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.read = bcm2835_gpio_read,
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.write = bcm2835_gpio_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static const VMStateDescription vmstate_bcm2835_gpio = {
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.name = "bcm2835_gpio",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8_ARRAY(fsel, BCM2835GpioState, 54),
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VMSTATE_UINT32(lev0, BCM2835GpioState),
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VMSTATE_UINT32(lev1, BCM2835GpioState),
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VMSTATE_UINT8(sd_fsel, BCM2835GpioState),
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VMSTATE_END_OF_LIST()
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}
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};
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static void bcm2835_gpio_init(Object *obj)
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{
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BCM2835GpioState *s = BCM2835_GPIO(obj);
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DeviceState *dev = DEVICE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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qbus_create_inplace(&s->sdbus, sizeof(s->sdbus),
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TYPE_SD_BUS, DEVICE(s), "sd-bus");
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memory_region_init_io(&s->iomem, obj,
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&bcm2835_gpio_ops, s, "bcm2835_gpio", 0x1000);
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sysbus_init_mmio(sbd, &s->iomem);
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qdev_init_gpio_out(dev, s->out, 54);
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}
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static void bcm2835_gpio_realize(DeviceState *dev, Error **errp)
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{
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BCM2835GpioState *s = BCM2835_GPIO(dev);
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Object *obj;
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Error *err = NULL;
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obj = object_property_get_link(OBJECT(dev), "sdbus-sdhci", &err);
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if (obj == NULL) {
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error_setg(errp, "%s: required sdhci link not found: %s",
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__func__, error_get_pretty(err));
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return;
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}
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s->sdbus_sdhci = SD_BUS(obj);
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obj = object_property_get_link(OBJECT(dev), "sdbus-sdhost", &err);
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if (obj == NULL) {
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error_setg(errp, "%s: required sdhost link not found: %s",
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__func__, error_get_pretty(err));
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return;
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}
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s->sdbus_sdhost = SD_BUS(obj);
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}
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static void bcm2835_gpio_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->vmsd = &vmstate_bcm2835_gpio;
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dc->realize = &bcm2835_gpio_realize;
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dc->reset = &bcm2835_gpio_reset;
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}
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static const TypeInfo bcm2835_gpio_info = {
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.name = TYPE_BCM2835_GPIO,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(BCM2835GpioState),
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.instance_init = bcm2835_gpio_init,
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.class_init = bcm2835_gpio_class_init,
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};
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static void bcm2835_gpio_register_types(void)
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{
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type_register_static(&bcm2835_gpio_info);
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}
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type_init(bcm2835_gpio_register_types)
+39
include/hw/gpio/bcm2835_gpio.h
+39
include/hw/gpio/bcm2835_gpio.h
···
1
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/*
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* Raspberry Pi (BCM2835) GPIO Controller
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*
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* Copyright (c) 2017 Antfield SAS
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*
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* Authors:
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* Clement Deschamps <clement.deschamps@antfield.fr>
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* Luc Michel <luc.michel@antfield.fr>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef BCM2835_GPIO_H
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#define BCM2835_GPIO_H
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#include "hw/sd/sd.h"
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typedef struct BCM2835GpioState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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/* SDBus selector */
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SDBus sdbus;
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SDBus *sdbus_sdhci;
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SDBus *sdbus_sdhost;
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uint8_t fsel[54];
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uint32_t lev0, lev1;
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uint8_t sd_fsel;
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qemu_irq out[54];
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} BCM2835GpioState;
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#define TYPE_BCM2835_GPIO "bcm2835_gpio"
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#define BCM2835_GPIO(obj) \
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OBJECT_CHECK(BCM2835GpioState, (obj), TYPE_BCM2835_GPIO)
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#endif