jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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target/arm: Split VFM decode

Passing the raw o1 and o2 fields from the manual is less
instructive than it might be. Do the full decode and let
the trans_* functions pass in booleans to a helper.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200224222232.13807-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

authored by

Richard Henderson and committed by
Peter Maydell d486f830 906b60fa

+55 -14
+46 -6
target/arm/translate-vfp.inc.c
··· 1784 1784 return do_vfp_3op_dp(s, gen_helper_vfp_divd, a->vd, a->vn, a->vm, false); 1785 1785 } 1786 1786 1787 - static bool trans_VFM_sp(DisasContext *s, arg_VFM_sp *a) 1787 + static bool do_vfm_sp(DisasContext *s, arg_VFMA_sp *a, bool neg_n, bool neg_d) 1788 1788 { 1789 1789 /* 1790 1790 * VFNMA : fd = muladd(-fd, fn, fm) ··· 1828 1828 1829 1829 neon_load_reg32(vn, a->vn); 1830 1830 neon_load_reg32(vm, a->vm); 1831 - if (a->o2) { 1831 + if (neg_n) { 1832 1832 /* VFNMS, VFMS */ 1833 1833 gen_helper_vfp_negs(vn, vn); 1834 1834 } 1835 1835 neon_load_reg32(vd, a->vd); 1836 - if (a->o1 & 1) { 1836 + if (neg_d) { 1837 1837 /* VFNMA, VFNMS */ 1838 1838 gen_helper_vfp_negs(vd, vd); 1839 1839 } ··· 1849 1849 return true; 1850 1850 } 1851 1851 1852 - static bool trans_VFM_dp(DisasContext *s, arg_VFM_dp *a) 1852 + static bool trans_VFMA_sp(DisasContext *s, arg_VFMA_sp *a) 1853 + { 1854 + return do_vfm_sp(s, a, false, false); 1855 + } 1856 + 1857 + static bool trans_VFMS_sp(DisasContext *s, arg_VFMS_sp *a) 1858 + { 1859 + return do_vfm_sp(s, a, true, false); 1860 + } 1861 + 1862 + static bool trans_VFNMA_sp(DisasContext *s, arg_VFNMA_sp *a) 1863 + { 1864 + return do_vfm_sp(s, a, false, true); 1865 + } 1866 + 1867 + static bool trans_VFNMS_sp(DisasContext *s, arg_VFNMS_sp *a) 1868 + { 1869 + return do_vfm_sp(s, a, true, true); 1870 + } 1871 + 1872 + static bool do_vfm_dp(DisasContext *s, arg_VFMA_dp *a, bool neg_n, bool neg_d) 1853 1873 { 1854 1874 /* 1855 1875 * VFNMA : fd = muladd(-fd, fn, fm) ··· 1905 1925 1906 1926 neon_load_reg64(vn, a->vn); 1907 1927 neon_load_reg64(vm, a->vm); 1908 - if (a->o2) { 1928 + if (neg_n) { 1909 1929 /* VFNMS, VFMS */ 1910 1930 gen_helper_vfp_negd(vn, vn); 1911 1931 } 1912 1932 neon_load_reg64(vd, a->vd); 1913 - if (a->o1 & 1) { 1933 + if (neg_d) { 1914 1934 /* VFNMA, VFNMS */ 1915 1935 gen_helper_vfp_negd(vd, vd); 1916 1936 } ··· 1924 1944 tcg_temp_free_i64(vd); 1925 1945 1926 1946 return true; 1947 + } 1948 + 1949 + static bool trans_VFMA_dp(DisasContext *s, arg_VFMA_dp *a) 1950 + { 1951 + return do_vfm_dp(s, a, false, false); 1952 + } 1953 + 1954 + static bool trans_VFMS_dp(DisasContext *s, arg_VFMS_dp *a) 1955 + { 1956 + return do_vfm_dp(s, a, true, false); 1957 + } 1958 + 1959 + static bool trans_VFNMA_dp(DisasContext *s, arg_VFNMA_dp *a) 1960 + { 1961 + return do_vfm_dp(s, a, false, true); 1962 + } 1963 + 1964 + static bool trans_VFNMS_dp(DisasContext *s, arg_VFNMS_dp *a) 1965 + { 1966 + return do_vfm_dp(s, a, true, true); 1927 1967 } 1928 1968 1929 1969 static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a)
+9 -8
target/arm/vfp.decode
··· 130 130 VDIV_sp ---- 1110 1.00 .... .... 1010 .0.0 .... @vfp_dnm_s 131 131 VDIV_dp ---- 1110 1.00 .... .... 1011 .0.0 .... @vfp_dnm_d 132 132 133 - VFM_sp ---- 1110 1.01 .... .... 1010 . o2:1 . 0 .... \ 134 - vm=%vm_sp vn=%vn_sp vd=%vd_sp o1=1 135 - VFM_dp ---- 1110 1.01 .... .... 1011 . o2:1 . 0 .... \ 136 - vm=%vm_dp vn=%vn_dp vd=%vd_dp o1=1 137 - VFM_sp ---- 1110 1.10 .... .... 1010 . o2:1 . 0 .... \ 138 - vm=%vm_sp vn=%vn_sp vd=%vd_sp o1=2 139 - VFM_dp ---- 1110 1.10 .... .... 1011 . o2:1 . 0 .... \ 140 - vm=%vm_dp vn=%vn_dp vd=%vd_dp o1=2 133 + VFMA_sp ---- 1110 1.10 .... .... 1010 .0. 0 .... @vfp_dnm_s 134 + VFMS_sp ---- 1110 1.10 .... .... 1010 .1. 0 .... @vfp_dnm_s 135 + VFNMA_sp ---- 1110 1.01 .... .... 1010 .0. 0 .... @vfp_dnm_s 136 + VFNMS_sp ---- 1110 1.01 .... .... 1010 .1. 0 .... @vfp_dnm_s 137 + 138 + VFMA_dp ---- 1110 1.10 .... .... 1011 .0.0 .... @vfp_dnm_d 139 + VFMS_dp ---- 1110 1.10 .... .... 1011 .1.0 .... @vfp_dnm_d 140 + VFNMA_dp ---- 1110 1.01 .... .... 1011 .0.0 .... @vfp_dnm_d 141 + VFNMS_dp ---- 1110 1.01 .... .... 1011 .1.0 .... @vfp_dnm_d 141 142 142 143 VMOV_imm_sp ---- 1110 1.11 .... .... 1010 0000 .... \ 143 144 vd=%vd_sp imm=%vmov_imm