jcs.org
qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
display/stdvga: add edid support.
This patch adds edid support to the qemu stdvga. It is turned off by
default and can be enabled with the new edid property. The patch also
adds xres and yres properties to specify the video mode you want the
guest use. Works only with edid enabled and updated guest driver.
The mmio bar of the stdvga has some unused address space at the start.
It was reserved just in case it'll be needed for virtio, but it turned
out to not be needed for that. So let's use that region to place the
EDID data block there.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20180925075646.25114-6-kraxel@redhat.com
+34
-7
+1
-1
docs/specs/standard-vga.txt
+1
-1
docs/specs/standard-vga.txt
···
61
61
62
62
Likewise applies to the pci variant only for obvious reasons.
63
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64
-
0000 - 03ff : reserved, for possible virtio extension.
64
+
0000 - 03ff : edid data blob.
65
65
0400 - 041f : vga ioports (0x3c0 -> 0x3df), remapped 1:1.
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word access is supported, bytes are written
67
67
in little endia order (aka index port first),
+31
-4
hw/display/vga-pci.c
+31
-4
hw/display/vga-pci.c
···
30
30
#include "ui/pixel_ops.h"
31
31
#include "qemu/timer.h"
32
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#include "hw/loader.h"
33
+
#include "hw/display/edid.h"
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enum vga_pci_flags {
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PCI_VGA_FLAG_ENABLE_MMIO = 1,
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PCI_VGA_FLAG_ENABLE_QEXT = 2,
38
+
PCI_VGA_FLAG_ENABLE_EDID = 3,
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};
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typedef struct PCIVGAState {
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PCIDevice dev;
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VGACommonState vga;
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uint32_t flags;
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+
qemu_edid_info edid_info;
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MemoryRegion mmio;
44
-
MemoryRegion mrs[3];
47
+
MemoryRegion mrs[4];
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+
uint8_t edid[256];
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} PCIVGAState;
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47
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#define TYPE_PCI_VGA "pci-vga"
···
195
199
Object *owner,
196
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MemoryRegion *parent,
197
201
MemoryRegion *subs,
198
-
bool qext)
202
+
bool qext, bool edid)
199
203
{
204
+
PCIVGAState *d = container_of(s, PCIVGAState, vga);
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+
200
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memory_region_init_io(&subs[0], owner, &pci_vga_ioport_ops, s,
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"vga ioports remapped", PCI_VGA_IOPORT_SIZE);
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memory_region_add_subregion(parent, PCI_VGA_IOPORT_OFFSET,
···
213
219
memory_region_add_subregion(parent, PCI_VGA_QEXT_OFFSET,
214
220
&subs[2]);
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}
222
+
223
+
if (edid) {
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+
qemu_edid_generate(d->edid, sizeof(d->edid), &d->edid_info);
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+
qemu_edid_region_io(&subs[3], owner, d->edid, sizeof(d->edid));
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+
memory_region_add_subregion(parent, 0, &subs[3]);
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+
}
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}
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static void pci_std_vga_realize(PCIDevice *dev, Error **errp)
···
220
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PCIVGAState *d = PCI_VGA(dev);
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VGACommonState *s = &d->vga;
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bool qext = false;
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+
bool edid = false;
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/* vga + console init */
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vga_common_init(s, OBJECT(dev));
···
240
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qext = true;
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pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2);
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255
}
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-
pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext);
256
+
if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_EDID)) {
257
+
edid = true;
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+
}
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+
pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs,
260
+
qext, edid);
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pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
246
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}
···
263
280
PCIVGAState *d = PCI_VGA(dev);
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VGACommonState *s = &d->vga;
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bool qext = false;
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+
bool edid = false;
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/* vga + console init */
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vga_common_init(s, OBJECT(dev));
···
276
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qext = true;
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pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2);
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}
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-
pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext);
297
+
if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_EDID)) {
298
+
edid = true;
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+
}
300
+
pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext, edid);
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pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram);
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pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
···
308
329
DEFINE_PROP_BIT("mmio", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_MMIO, true),
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DEFINE_PROP_BIT("qemu-extended-regs",
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PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true),
332
+
DEFINE_PROP_BIT("edid",
333
+
PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false),
334
+
DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info),
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DEFINE_PROP_BOOL("global-vmstate", PCIVGAState, vga.global_vmstate, false),
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DEFINE_PROP_END_OF_LIST(),
313
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};
···
316
340
DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 16),
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DEFINE_PROP_BIT("qemu-extended-regs",
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PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true),
343
+
DEFINE_PROP_BIT("edid",
344
+
PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false),
345
+
DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info),
319
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DEFINE_PROP_END_OF_LIST(),
320
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};
321
348
+1
-1
hw/display/vga_int.h
+1
-1
hw/display/vga_int.h
+1
-1
hw/display/virtio-vga.c
+1
-1
hw/display/virtio-vga.c
···
153
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154
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/* add stdvga mmio regions */
155
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pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
156
-
vvga->vga_mrs, true);
156
+
vvga->vga_mrs, true, false);
157
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158
vga->con = g->scanout[0].con;
159
159
graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);