jcs.org
qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
hw/timer/bcm2835: Add the BCM2835 SYS_timer
Add the 64-bit free running timer. Do not model the COMPARE register
(no IRQ generated).
This timer is used by Linux kernel and recently U-Boot:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/clocksource/bcm2835_timer.c?h=v3.7
https://github.com/u-boot/u-boot/blob/v2019.07/include/configs/rpi.h#L19
Datasheet used:
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191019234715.25750-4-f4bug@amsat.org
[PMM: squashed in switch to using memset in reset]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
authored by
Philippe Mathieu-Daudé
and committed by
Peter Maydell
d05be883
d442d95f
+202
+1
hw/timer/Makefile.objs
+1
hw/timer/Makefile.objs
+163
hw/timer/bcm2835_systmr.c
+163
hw/timer/bcm2835_systmr.c
···
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/*
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* BCM2835 SYS timer emulation
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*
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* Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* Datasheet: BCM2835 ARM Peripherals (C6357-M-1398)
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* https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
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*
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* Only the free running 64-bit counter is implemented.
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* The 4 COMPARE registers and the interruption are not implemented.
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/timer.h"
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#include "hw/timer/bcm2835_systmr.h"
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#include "hw/registerfields.h"
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#include "migration/vmstate.h"
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#include "trace.h"
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REG32(CTRL_STATUS, 0x00)
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REG32(COUNTER_LOW, 0x04)
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REG32(COUNTER_HIGH, 0x08)
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REG32(COMPARE0, 0x0c)
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REG32(COMPARE1, 0x10)
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REG32(COMPARE2, 0x14)
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REG32(COMPARE3, 0x18)
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static void bcm2835_systmr_update_irq(BCM2835SystemTimerState *s)
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{
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bool enable = !!s->reg.status;
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trace_bcm2835_systmr_irq(enable);
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qemu_set_irq(s->irq, enable);
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}
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static void bcm2835_systmr_update_compare(BCM2835SystemTimerState *s,
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unsigned timer_index)
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{
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/* TODO fow now, since neither Linux nor U-boot use these timers. */
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qemu_log_mask(LOG_UNIMP, "COMPARE register %u not implemented\n",
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timer_index);
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}
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static uint64_t bcm2835_systmr_read(void *opaque, hwaddr offset,
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unsigned size)
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{
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BCM2835SystemTimerState *s = BCM2835_SYSTIMER(opaque);
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uint64_t r = 0;
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switch (offset) {
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case A_CTRL_STATUS:
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r = s->reg.status;
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break;
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case A_COMPARE0 ... A_COMPARE3:
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r = s->reg.compare[(offset - A_COMPARE0) >> 2];
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break;
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case A_COUNTER_LOW:
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case A_COUNTER_HIGH:
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/* Free running counter at 1MHz */
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r = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
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r >>= 8 * (offset - A_COUNTER_LOW);
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r &= UINT32_MAX;
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: bad offset 0x%" HWADDR_PRIx "\n",
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__func__, offset);
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break;
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}
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trace_bcm2835_systmr_read(offset, r);
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return r;
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}
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static void bcm2835_systmr_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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{
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BCM2835SystemTimerState *s = BCM2835_SYSTIMER(opaque);
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trace_bcm2835_systmr_write(offset, value);
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switch (offset) {
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case A_CTRL_STATUS:
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s->reg.status &= ~value; /* Ack */
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bcm2835_systmr_update_irq(s);
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break;
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case A_COMPARE0 ... A_COMPARE3:
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s->reg.compare[(offset - A_COMPARE0) >> 2] = value;
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bcm2835_systmr_update_compare(s, (offset - A_COMPARE0) >> 2);
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break;
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case A_COUNTER_LOW:
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case A_COUNTER_HIGH:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: read-only ofs 0x%" HWADDR_PRIx "\n",
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__func__, offset);
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: bad offset 0x%" HWADDR_PRIx "\n",
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__func__, offset);
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break;
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}
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}
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static const MemoryRegionOps bcm2835_systmr_ops = {
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.read = bcm2835_systmr_read,
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.write = bcm2835_systmr_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.impl = {
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.min_access_size = 4,
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.max_access_size = 4,
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},
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};
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static void bcm2835_systmr_reset(DeviceState *dev)
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{
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BCM2835SystemTimerState *s = BCM2835_SYSTIMER(dev);
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memset(&s->reg, 0, sizeof(s->reg));
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}
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static void bcm2835_systmr_realize(DeviceState *dev, Error **errp)
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{
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BCM2835SystemTimerState *s = BCM2835_SYSTIMER(dev);
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memory_region_init_io(&s->iomem, OBJECT(dev), &bcm2835_systmr_ops,
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s, "bcm2835-sys-timer", 0x20);
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sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
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sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq);
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}
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static const VMStateDescription bcm2835_systmr_vmstate = {
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.name = "bcm2835_sys_timer",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(reg.status, BCM2835SystemTimerState),
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VMSTATE_UINT32_ARRAY(reg.compare, BCM2835SystemTimerState, 4),
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VMSTATE_END_OF_LIST()
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}
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};
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static void bcm2835_systmr_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = bcm2835_systmr_realize;
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dc->reset = bcm2835_systmr_reset;
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dc->vmsd = &bcm2835_systmr_vmstate;
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}
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static const TypeInfo bcm2835_systmr_info = {
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.name = TYPE_BCM2835_SYSTIMER,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(BCM2835SystemTimerState),
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.class_init = bcm2835_systmr_class_init,
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};
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static void bcm2835_systmr_register_types(void)
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{
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type_register_static(&bcm2835_systmr_info);
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}
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type_init(bcm2835_systmr_register_types);
+5
hw/timer/trace-events
+5
hw/timer/trace-events
···
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pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
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pl031_alarm_raised(void) "alarm raised"
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pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
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# bcm2835_systmr.c
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bcm2835_systmr_irq(bool enable) "timer irq state %u"
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bcm2835_systmr_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64 " data 0x%" PRIx64
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bcm2835_systmr_write(uint64_t offset, uint64_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx64
+33
include/hw/timer/bcm2835_systmr.h
+33
include/hw/timer/bcm2835_systmr.h
···
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/*
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* BCM2835 SYS timer emulation
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*
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* Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef BCM2835_SYSTIMER_H
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#define BCM2835_SYSTIMER_H
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#include "hw/sysbus.h"
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#include "hw/irq.h"
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#define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
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#define BCM2835_SYSTIMER(obj) \
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OBJECT_CHECK(BCM2835SystemTimerState, (obj), TYPE_BCM2835_SYSTIMER)
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typedef struct {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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qemu_irq irq;
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struct {
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uint32_t status;
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uint32_t compare[4];
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} reg;
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} BCM2835SystemTimerState;
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#endif