+1 -1

hw/arm/allwinner-a10.c

··· 74 74 SysBusDevice *sysbusdev; 75 75 Error *err = NULL; 76 76 77 77 - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 77 77 + qdev_realize(DEVICE(&s->cpu), NULL, &err); 78 78 if (err != NULL) { 79 79 error_propagate(errp, err); 80 80 return;

+1 -1

hw/arm/allwinner-h3.c

··· 250 250 qdev_prop_set_bit(DEVICE(&s->cpus[i]), "has_el2", true); 251 251 252 252 /* Mark realized */ 253 253 - qdev_init_nofail(DEVICE(&s->cpus[i])); 253 253 + qdev_realize(DEVICE(&s->cpus[i]), NULL, &error_fatal); 254 254 } 255 255 256 256 /* Generic Interrupt Controller */

+8 -12

hw/arm/armsse.c

··· 584 584 * CPU must exist and have been parented into the cluster before 585 585 * the cluster is realized. 586 586 */ 587 587 - object_property_set_bool(OBJECT(&s->cluster[i]), 588 588 - true, "realized", &err); 587 587 + qdev_realize(DEVICE(&s->cluster[i]), NULL, &err); 589 588 if (err) { 590 589 error_propagate(errp, err); 591 590 return; ··· 621 620 error_propagate(errp, err); 622 621 return; 623 622 } 624 624 - object_property_set_bool(splitter, true, "realized", &err); 623 623 + qdev_realize(DEVICE(splitter), NULL, &err); 625 624 if (err) { 626 625 error_propagate(errp, err); 627 626 return; ··· 677 676 error_propagate(errp, err); 678 677 return; 679 678 } 680 680 - object_property_set_bool(OBJECT(&s->sec_resp_splitter), true, 681 681 - "realized", &err); 679 679 + qdev_realize(DEVICE(&s->sec_resp_splitter), NULL, &err); 682 680 if (err) { 683 681 error_propagate(errp, err); 684 682 return; ··· 729 727 error_propagate(errp, err); 730 728 return; 731 729 } 732 732 - object_property_set_bool(OBJECT(&s->mpc_irq_orgate), true, 733 733 - "realized", &err); 730 730 + qdev_realize(DEVICE(&s->mpc_irq_orgate), NULL, &err); 734 731 if (err) { 735 732 error_propagate(errp, err); 736 733 return; ··· 889 886 error_propagate(errp, err); 890 887 return; 891 888 } 892 892 - object_property_set_bool(OBJECT(&s->ppc_irq_orgate), true, 893 893 - "realized", &err); 889 889 + qdev_realize(DEVICE(&s->ppc_irq_orgate), NULL, &err); 894 890 if (err) { 895 891 error_propagate(errp, err); 896 892 return; ··· 1065 1061 error_propagate(errp, err); 1066 1062 return; 1067 1063 } 1068 1068 - object_property_set_bool(OBJECT(&s->nmi_orgate), true, "realized", &err); 1064 1064 + qdev_realize(DEVICE(&s->nmi_orgate), NULL, &err); 1069 1065 if (err) { 1070 1066 error_propagate(errp, err); 1071 1067 return; ··· 1113 1109 error_propagate(errp, err); 1114 1110 return; 1115 1111 } 1116 1116 - object_property_set_bool(splitter, true, "realized", &err); 1112 1112 + qdev_realize(DEVICE(splitter), NULL, &err); 1117 1113 if (err) { 1118 1114 error_propagate(errp, err); 1119 1115 return; ··· 1160 1156 error_propagate(errp, err); 1161 1157 return; 1162 1158 } 1163 1163 - object_property_set_bool(OBJECT(splitter), true, "realized", &err); 1159 1159 + qdev_realize(DEVICE(splitter), NULL, &err); 1164 1160 if (err) { 1165 1161 error_propagate(errp, err); 1166 1162 return;

+1 -1

hw/arm/armv7m.c

··· 216 216 s->cpu->env.nvic = &s->nvic; 217 217 s->nvic.cpu = s->cpu; 218 218 219 219 - object_property_set_bool(OBJECT(s->cpu), true, "realized", &err); 219 219 + qdev_realize(DEVICE(s->cpu), NULL, &err); 220 220 if (err != NULL) { 221 221 error_propagate(errp, err); 222 222 return;

+1 -2

hw/arm/aspeed.c

··· 302 302 object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY, 303 303 "hw-prot-key", &error_abort); 304 304 } 305 305 - object_property_set_bool(OBJECT(&bmc->soc), true, "realized", 306 306 - &error_abort); 305 305 + qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort); 307 306 308 307 memory_region_add_subregion(get_system_memory(), 309 308 sc->memmap[ASPEED_SDRAM],

+1 -1

hw/arm/aspeed_ast2600.c

··· 259 259 * is needed when using -kernel 260 260 */ 261 261 262 262 - object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); 262 262 + qdev_realize(DEVICE(&s->cpu[i]), NULL, &err); 263 263 if (err) { 264 264 error_propagate(errp, err); 265 265 return;

+1 -1

hw/arm/aspeed_soc.c

··· 230 230 231 231 /* CPU */ 232 232 for (i = 0; i < sc->num_cpus; i++) { 233 233 - object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); 233 233 + qdev_realize(DEVICE(&s->cpu[i]), NULL, &err); 234 234 if (err) { 235 235 error_propagate(errp, err); 236 236 return;

+1 -2

hw/arm/bcm2836.c

··· 133 133 return; 134 134 } 135 135 136 136 - object_property_set_bool(OBJECT(&s->cpu[n].core), true, 137 137 - "realized", &err); 136 136 + qdev_realize(DEVICE(&s->cpu[n].core), NULL, &err); 138 137 if (err) { 139 138 error_propagate(errp, err); 140 139 return;

+1 -1

hw/arm/cubieboard.c

··· 80 80 exit(1); 81 81 } 82 82 83 83 - object_property_set_bool(OBJECT(a10), true, "realized", &err); 83 83 + qdev_realize(DEVICE(a10), NULL, &err); 84 84 if (err != NULL) { 85 85 error_reportf_err(err, "Couldn't realize Allwinner A10: "); 86 86 exit(1);

+1 -1

hw/arm/digic.c

··· 62 62 return; 63 63 } 64 64 65 65 - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 65 65 + qdev_realize(DEVICE(&s->cpu), NULL, &err); 66 66 if (err != NULL) { 67 67 error_propagate(errp, err); 68 68 return;

+1 -1

hw/arm/digic_boards.c

··· 62 62 exit(EXIT_FAILURE); 63 63 } 64 64 65 65 - object_property_set_bool(OBJECT(s), true, "realized", &err); 65 65 + qdev_realize(DEVICE(s), NULL, &err); 66 66 if (err != NULL) { 67 67 error_reportf_err(err, "Couldn't realize DIGIC SoC: "); 68 68 exit(1);

+2 -2

hw/arm/exynos4210.c

··· 190 190 191 191 object_property_set_int(OBJECT(orgate), nevents + 1, "num-lines", 192 192 &error_abort); 193 193 - object_property_set_bool(OBJECT(orgate), true, "realized", &error_abort); 193 193 + qdev_realize(DEVICE(orgate), NULL, &error_abort); 194 194 195 195 for (i = 0; i < nevents + 1; i++) { 196 196 sysbus_connect_irq(busdev, i, qdev_get_gpio_in(DEVICE(orgate), i)); ··· 223 223 "mp-affinity", &error_abort); 224 224 object_property_set_int(cpuobj, EXYNOS4210_SMP_PRIVATE_BASE_ADDR, 225 225 "reset-cbar", &error_abort); 226 226 - object_property_set_bool(cpuobj, true, "realized", &error_fatal); 226 226 + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 227 227 } 228 228 229 229 /*** IRQs ***/

+1 -1

hw/arm/fsl-imx25.c

··· 85 85 uint8_t i; 86 86 Error *err = NULL; 87 87 88 88 - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 88 88 + qdev_realize(DEVICE(&s->cpu), NULL, &err); 89 89 if (err) { 90 90 error_propagate(errp, err); 91 91 return;

+1 -1

hw/arm/fsl-imx31.c

··· 66 66 uint16_t i; 67 67 Error *err = NULL; 68 68 69 69 - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 69 69 + qdev_realize(DEVICE(&s->cpu), NULL, &err); 70 70 if (err) { 71 71 error_propagate(errp, err); 72 72 return;

+1 -1

hw/arm/fsl-imx6.c

··· 130 130 "start-powered-off", &error_abort); 131 131 } 132 132 133 133 - object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); 133 133 + qdev_realize(DEVICE(&s->cpu[i]), NULL, &err); 134 134 if (err) { 135 135 error_propagate(errp, err); 136 136 return;

+1 -2

hw/arm/fsl-imx6ul.c

··· 168 168 169 169 object_property_set_int(OBJECT(&s->cpu), QEMU_PSCI_CONDUIT_SMC, 170 170 "psci-conduit", &error_abort); 171 171 - object_property_set_bool(OBJECT(&s->cpu), true, 172 172 - "realized", &error_abort); 171 171 + qdev_realize(DEVICE(&s->cpu), NULL, &error_abort); 173 172 174 173 /* 175 174 * A7MPCORE

+1 -1

hw/arm/fsl-imx7.c

··· 174 174 "start-powered-off", &error_abort); 175 175 } 176 176 177 177 - object_property_set_bool(o, true, "realized", &error_abort); 177 177 + qdev_realize(DEVICE(o), NULL, &error_abort); 178 178 } 179 179 180 180 /*

+1 -1

hw/arm/highbank.c

··· 280 280 object_property_set_int(cpuobj, MPCORE_PERIPHBASE, 281 281 "reset-cbar", &error_abort); 282 282 } 283 283 - object_property_set_bool(cpuobj, true, "realized", &error_fatal); 283 283 + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 284 284 cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ); 285 285 cpu_fiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ); 286 286 cpu_virq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_VIRQ);

+1 -1

hw/arm/imx25_pdk.c

··· 75 75 76 76 object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX25); 77 77 78 78 - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); 78 78 + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); 79 79 80 80 /* We need to initialize our memory */ 81 81 if (machine->ram_size > (FSL_IMX25_SDRAM0_SIZE + FSL_IMX25_SDRAM1_SIZE)) {

+1 -1

hw/arm/integratorcp.c

··· 607 607 object_property_set_bool(cpuobj, false, "has_el3", &error_fatal); 608 608 } 609 609 610 610 - object_property_set_bool(cpuobj, true, "realized", &error_fatal); 610 610 + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 611 611 612 612 cpu = ARM_CPU(cpuobj); 613 613

+1 -1

hw/arm/kzm.c

··· 73 73 74 74 object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX31); 75 75 76 76 - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); 76 76 + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); 77 77 78 78 /* Check the amount of memory is compatible with the SOC */ 79 79 if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) {

+1 -1

hw/arm/mcimx6ul-evk.c

··· 40 40 41 41 s = FSL_IMX6UL(object_new(TYPE_FSL_IMX6UL)); 42 42 object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); 43 43 - object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); 43 43 + qdev_realize(DEVICE(s), NULL, &error_fatal); 44 44 45 45 memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR, 46 46 machine->ram);

+1 -1

hw/arm/mcimx7d-sabre.c

··· 42 42 43 43 s = FSL_IMX7(object_new(TYPE_FSL_IMX7)); 44 44 object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); 45 45 - object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); 45 45 + qdev_realize(DEVICE(s), NULL, &error_fatal); 46 46 47 47 memory_region_add_subregion(get_system_memory(), FSL_IMX7_MMDC_ADDR, 48 48 machine->ram);

+3 -6

hw/arm/mps2-tz.c

··· 414 414 415 415 object_property_set_int(OBJECT(splitter), 2, "num-lines", 416 416 &error_fatal); 417 417 - object_property_set_bool(OBJECT(splitter), true, "realized", 418 418 - &error_fatal); 417 417 + qdev_realize(DEVICE(splitter), NULL, &error_fatal); 419 418 qdev_connect_gpio_out(DEVICE(splitter), 0, 420 419 qdev_get_gpio_in_named(DEVICE(&mms->iotkit), 421 420 "EXP_IRQ", i)); ··· 433 432 object_property_set_int(OBJECT(&mms->sec_resp_splitter), 434 433 ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc), 435 434 "num-lines", &error_fatal); 436 436 - object_property_set_bool(OBJECT(&mms->sec_resp_splitter), true, 437 437 - "realized", &error_fatal); 435 435 + qdev_realize(DEVICE(&mms->sec_resp_splitter), NULL, &error_fatal); 438 436 dev_splitter = DEVICE(&mms->sec_resp_splitter); 439 437 qdev_connect_gpio_out_named(iotkitdev, "sec_resp_cfg", 0, 440 438 qdev_get_gpio_in(dev_splitter, 0)); ··· 466 464 &mms->uart_irq_orgate, TYPE_OR_IRQ); 467 465 object_property_set_int(OBJECT(&mms->uart_irq_orgate), 10, "num-lines", 468 466 &error_fatal); 469 469 - object_property_set_bool(OBJECT(&mms->uart_irq_orgate), true, 470 470 - "realized", &error_fatal); 467 467 + qdev_realize(DEVICE(&mms->uart_irq_orgate), NULL, &error_fatal); 471 468 qdev_connect_gpio_out(DEVICE(&mms->uart_irq_orgate), 0, 472 469 get_sse_irq_in(mms, 15)); 473 470

+3 -4

hw/arm/mps2.c

··· 229 229 230 230 orgate = object_new(TYPE_OR_IRQ); 231 231 object_property_set_int(orgate, 6, "num-lines", &error_fatal); 232 232 - object_property_set_bool(orgate, true, "realized", &error_fatal); 232 232 + qdev_realize(DEVICE(orgate), NULL, &error_fatal); 233 233 orgate_dev = DEVICE(orgate); 234 234 qdev_connect_gpio_out(orgate_dev, 0, qdev_get_gpio_in(armv7m, 12)); 235 235 ··· 266 266 267 267 orgate = object_new(TYPE_OR_IRQ); 268 268 object_property_set_int(orgate, 10, "num-lines", &error_fatal); 269 269 - object_property_set_bool(orgate, true, "realized", &error_fatal); 269 269 + qdev_realize(DEVICE(orgate), NULL, &error_fatal); 270 270 orgate_dev = DEVICE(orgate); 271 271 qdev_connect_gpio_out(orgate_dev, 0, qdev_get_gpio_in(armv7m, 12)); 272 272 ··· 281 281 282 282 txrx_orgate = object_new(TYPE_OR_IRQ); 283 283 object_property_set_int(txrx_orgate, 2, "num-lines", &error_fatal); 284 284 - object_property_set_bool(txrx_orgate, true, "realized", 285 285 - &error_fatal); 284 284 + qdev_realize(DEVICE(txrx_orgate), NULL, &error_fatal); 286 285 txrx_orgate_dev = DEVICE(txrx_orgate); 287 286 qdev_connect_gpio_out(txrx_orgate_dev, 0, 288 287 qdev_get_gpio_in(armv7m, uart_txrx_irqno[i]));

+2 -4

hw/arm/musca.c

··· 405 405 406 406 object_property_set_int(OBJECT(splitter), 2, "num-lines", 407 407 &error_fatal); 408 408 - object_property_set_bool(OBJECT(splitter), true, "realized", 409 409 - &error_fatal); 408 408 + qdev_realize(DEVICE(splitter), NULL, &error_fatal); 410 409 qdev_connect_gpio_out(DEVICE(splitter), 0, 411 410 qdev_get_gpio_in_named(ssedev, "EXP_IRQ", i)); 412 411 qdev_connect_gpio_out(DEVICE(splitter), 1, ··· 425 424 426 425 object_property_set_int(OBJECT(&mms->sec_resp_splitter), 427 426 ARRAY_SIZE(mms->ppc), "num-lines", &error_fatal); 428 428 - object_property_set_bool(OBJECT(&mms->sec_resp_splitter), true, 429 429 - "realized", &error_fatal); 427 427 + qdev_realize(DEVICE(&mms->sec_resp_splitter), NULL, &error_fatal); 430 428 dev_splitter = DEVICE(&mms->sec_resp_splitter); 431 429 qdev_connect_gpio_out_named(ssedev, "sec_resp_cfg", 0, 432 430 qdev_get_gpio_in(dev_splitter, 0));

+1 -1

hw/arm/orangepi.c

··· 86 86 &error_abort); 87 87 88 88 /* Mark H3 object realized */ 89 89 - object_property_set_bool(OBJECT(h3), true, "realized", &error_abort); 89 89 + qdev_realize(DEVICE(h3), NULL, &error_abort); 90 90 91 91 /* Retrieve SD bus */ 92 92 di = drive_get_next(IF_SD);

+1 -1

hw/arm/raspi.c

··· 287 287 object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram)); 288 288 object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", 289 289 &error_abort); 290 290 - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); 290 290 + qdev_realize(DEVICE(&s->soc), NULL, &error_abort); 291 291 292 292 /* Create and plug in the SD cards */ 293 293 di = drive_get_next(IF_SD);

+1 -1

hw/arm/realview.c

··· 114 114 &error_fatal); 115 115 } 116 116 117 117 - object_property_set_bool(cpuobj, true, "realized", &error_fatal); 117 117 + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 118 118 119 119 cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ); 120 120 }

+1 -1

hw/arm/sabrelite.c

··· 51 51 52 52 s = FSL_IMX6(object_new(TYPE_FSL_IMX6)); 53 53 object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); 54 54 - object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); 54 54 + qdev_realize(DEVICE(s), NULL, &error_fatal); 55 55 56 56 memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR, 57 57 machine->ram);

+1 -1

hw/arm/sbsa-ref.c

··· 680 680 object_property_set_link(cpuobj, OBJECT(secure_sysmem), 681 681 "secure-memory", &error_abort); 682 682 683 683 - object_property_set_bool(cpuobj, true, "realized", &error_fatal); 683 683 + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 684 684 object_unref(cpuobj); 685 685 } 686 686

+1 -1

hw/arm/stm32f205_soc.c

··· 155 155 /* ADC 1 to 3 */ 156 156 object_property_set_int(OBJECT(s->adc_irqs), STM_NUM_ADCS, 157 157 "num-lines", &err); 158 158 - object_property_set_bool(OBJECT(s->adc_irqs), true, "realized", &err); 158 158 + qdev_realize(DEVICE(s->adc_irqs), NULL, &err); 159 159 if (err != NULL) { 160 160 error_propagate(errp, err); 161 161 return;

+1 -1

hw/arm/stm32f405_soc.c

··· 173 173 } 174 174 object_property_set_int(OBJECT(&s->adc_irqs), STM_NUM_ADCS, 175 175 "num-lines", &err); 176 176 - object_property_set_bool(OBJECT(&s->adc_irqs), true, "realized", &err); 176 176 + qdev_realize(DEVICE(&s->adc_irqs), NULL, &err); 177 177 if (err != NULL) { 178 178 error_propagate(errp, err); 179 179 return;

+1 -1

hw/arm/versatilepb.c

··· 215 215 object_property_set_bool(cpuobj, false, "has_el3", &error_fatal); 216 216 } 217 217 218 218 - object_property_set_bool(cpuobj, true, "realized", &error_fatal); 218 218 + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 219 219 220 220 cpu = ARM_CPU(cpuobj); 221 221

+1 -1

hw/arm/vexpress.c

··· 229 229 object_property_set_int(cpuobj, periphbase, 230 230 "reset-cbar", &error_abort); 231 231 } 232 232 - object_property_set_bool(cpuobj, true, "realized", &error_fatal); 232 232 + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 233 233 } 234 234 235 235 /* Create the private peripheral devices (including the GIC);

+1 -1

hw/arm/virt.c

··· 1819 1819 "secure-memory", &error_abort); 1820 1820 } 1821 1821 1822 1822 - object_property_set_bool(cpuobj, true, "realized", &error_fatal); 1822 1822 + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); 1823 1823 object_unref(cpuobj); 1824 1824 } 1825 1825 fdt_add_timer_nodes(vms);

+1 -1

hw/arm/xilinx_zynq.c

··· 202 202 &error_fatal); 203 203 object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar", 204 204 &error_fatal); 205 205 - object_property_set_bool(OBJECT(cpu), true, "realized", &error_fatal); 205 205 + qdev_realize(DEVICE(cpu), NULL, &error_fatal); 206 206 207 207 /* DDR remapped to address zero. */ 208 208 memory_region_add_subregion(address_space_mem, 0, machine->ram);

+1 -1

hw/arm/xlnx-versal.c

··· 47 47 "core-count", &error_abort); 48 48 object_property_set_link(obj, OBJECT(&s->fpd.apu.mr), "memory", 49 49 &error_abort); 50 50 - object_property_set_bool(obj, true, "realized", &error_fatal); 50 50 + qdev_realize(DEVICE(obj), NULL, &error_fatal); 51 51 } 52 52 } 53 53

+1 -1

hw/arm/xlnx-zcu102.c

··· 125 125 object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization", 126 126 &error_fatal); 127 127 128 128 - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); 128 128 + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); 129 129 130 130 /* Create and plug in the SD cards */ 131 131 for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {

+4 -6

hw/arm/xlnx-zynqmp.c

··· 209 209 210 210 object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs", 211 211 &error_abort); 212 212 - object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "realized", 213 213 - &err); 212 212 + qdev_realize(DEVICE(&s->rpu_cpu[i]), NULL, &err); 214 213 if (err) { 215 214 error_propagate(errp, err); 216 215 return; 217 216 } 218 217 } 219 218 220 220 - qdev_init_nofail(DEVICE(&s->rpu_cluster)); 219 219 + qdev_realize(DEVICE(&s->rpu_cluster), NULL, &error_fatal); 221 220 } 222 221 223 222 static void xlnx_zynqmp_init(Object *obj) ··· 341 340 qdev_prop_set_bit(DEVICE(&s->gic), 342 341 "has-virtualization-extensions", s->virt); 343 342 344 344 - qdev_init_nofail(DEVICE(&s->apu_cluster)); 343 343 + qdev_realize(DEVICE(&s->apu_cluster), NULL, &error_fatal); 345 344 346 345 /* Realize APUs before realizing the GIC. KVM requires this. */ 347 346 for (i = 0; i < num_apus; i++) { ··· 368 367 "reset-cbar", &error_abort); 369 368 object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus, 370 369 "core-count", &error_abort); 371 371 - object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized", 372 372 - &err); 370 370 + qdev_realize(DEVICE(&s->apu_cpu[i]), NULL, &err); 373 371 if (err) { 374 372 error_propagate(errp, err); 375 373 return;

+1 -1

hw/block/nand.c

··· 651 651 qdev_prop_set_drive(dev, "drive", blk, &error_fatal); 652 652 } 653 653 654 654 - qdev_init_nofail(dev); 654 654 + qdev_realize(dev, NULL, &error_fatal); 655 655 return dev; 656 656 } 657 657

+1 -1

hw/char/serial-isa.c

··· 75 75 index++; 76 76 77 77 isa_init_irq(isadev, &s->irq, isa->isairq); 78 78 - object_property_set_bool(OBJECT(s), true, "realized", errp); 78 78 + qdev_realize(DEVICE(s), NULL, errp); 79 79 qdev_set_legacy_instance_id(dev, isa->iobase, 3); 80 80 81 81 memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8);

+1 -1

hw/char/serial-pci-multi.c

··· 106 106 107 107 for (i = 0; i < nports; i++) { 108 108 s = pci->state + i; 109 109 - object_property_set_bool(OBJECT(s), true, "realized", &err); 109 109 + qdev_realize(DEVICE(s), NULL, &err); 110 110 if (err != NULL) { 111 111 error_propagate(errp, err); 112 112 multi_serial_pci_exit(dev);

+1 -1

hw/char/serial-pci.c

··· 49 49 SerialState *s = &pci->state; 50 50 Error *err = NULL; 51 51 52 52 - object_property_set_bool(OBJECT(s), true, "realized", &err); 52 52 + qdev_realize(DEVICE(s), NULL, &err); 53 53 if (err != NULL) { 54 54 error_propagate(errp, err); 55 55 return;

+2 -2

hw/char/serial.c

··· 991 991 SerialState *s = &sio->serial; 992 992 Error *local_err = NULL; 993 993 994 994 - object_property_set_bool(OBJECT(s), true, "realized", &local_err); 994 994 + qdev_realize(DEVICE(s), NULL, &local_err); 995 995 if (local_err) { 996 996 error_propagate(errp, local_err); 997 997 return; ··· 1098 1098 SerialState *s = &smm->serial; 1099 1099 Error *local_err = NULL; 1100 1100 1101 1101 - object_property_set_bool(OBJECT(s), true, "realized", &local_err); 1101 1101 + qdev_realize(DEVICE(s), NULL, &local_err); 1102 1102 if (local_err) { 1103 1103 error_propagate(errp, local_err); 1104 1104 return;

+1 -1

hw/core/cpu.c

··· 59 59 { 60 60 Error *err = NULL; 61 61 CPUState *cpu = CPU(object_new(typename)); 62 62 - object_property_set_bool(OBJECT(cpu), true, "realized", &err); 62 62 + qdev_realize(DEVICE(cpu), NULL, &err); 63 63 if (err != NULL) { 64 64 error_report_err(err); 65 65 object_unref(OBJECT(cpu));

+1 -1

hw/hyperv/hyperv.c

··· 140 140 synic->cs = cs; 141 141 object_property_add_child(OBJECT(cs), "synic", obj); 142 142 object_unref(obj); 143 143 - object_property_set_bool(obj, true, "realized", &error_abort); 143 143 + qdev_realize(DEVICE(obj), NULL, &error_abort); 144 144 synic_enabled = true; 145 145 } 146 146

+1 -1

hw/i386/x86.c

··· 124 124 cpu = object_new(MACHINE(x86ms)->cpu_type); 125 125 126 126 object_property_set_uint(cpu, apic_id, "apic-id", &local_err); 127 127 - object_property_set_bool(cpu, true, "realized", &local_err); 127 127 + qdev_realize(DEVICE(cpu), NULL, &local_err); 128 128 129 129 object_unref(cpu); 130 130 error_propagate(errp, local_err);

+2 -1

hw/ide/microdrive.c

··· 26 26 #include "qemu/osdep.h" 27 27 #include "hw/pcmcia.h" 28 28 #include "migration/vmstate.h" 29 29 + #include "qapi/error.h" 29 30 #include "qemu/module.h" 30 31 #include "sysemu/dma.h" 31 32 ··· 560 561 MicroDriveState *md; 561 562 562 563 md = MICRODRIVE(object_new(TYPE_DSCM1XXXX)); 563 563 - qdev_init_nofail(DEVICE(md)); 564 564 + qdev_realize(DEVICE(md), NULL, &error_fatal); 564 565 565 566 if (dinfo != NULL) { 566 567 ide_create_drive(&md->bus, 0, dinfo);

+2 -2

hw/intc/pnv_xive.c

··· 1833 1833 &error_fatal); 1834 1834 object_property_set_link(OBJECT(xsrc), OBJECT(xive), "xive", 1835 1835 &error_abort); 1836 1836 - object_property_set_bool(OBJECT(xsrc), true, "realized", &local_err); 1836 1836 + qdev_realize(DEVICE(xsrc), NULL, &local_err); 1837 1837 if (local_err) { 1838 1838 error_propagate(errp, local_err); 1839 1839 return; ··· 1843 1843 &error_fatal); 1844 1844 object_property_set_link(OBJECT(end_xsrc), OBJECT(xive), "xive", 1845 1845 &error_abort); 1846 1846 - object_property_set_bool(OBJECT(end_xsrc), true, "realized", &local_err); 1846 1846 + qdev_realize(DEVICE(end_xsrc), NULL, &local_err); 1847 1847 if (local_err) { 1848 1848 error_propagate(errp, local_err); 1849 1849 return;

+2 -2

hw/intc/spapr_xive.c

··· 312 312 &error_fatal); 313 313 object_property_set_link(OBJECT(xsrc), OBJECT(xive), "xive", 314 314 &error_abort); 315 315 - object_property_set_bool(OBJECT(xsrc), true, "realized", &local_err); 315 315 + qdev_realize(DEVICE(xsrc), NULL, &local_err); 316 316 if (local_err) { 317 317 error_propagate(errp, local_err); 318 318 return; ··· 326 326 &error_fatal); 327 327 object_property_set_link(OBJECT(end_xsrc), OBJECT(xive), "xive", 328 328 &error_abort); 329 329 - object_property_set_bool(OBJECT(end_xsrc), true, "realized", &local_err); 329 329 + qdev_realize(DEVICE(end_xsrc), NULL, &local_err); 330 330 if (local_err) { 331 331 error_propagate(errp, local_err); 332 332 return;

+1 -1

hw/intc/xics.c

··· 384 384 object_unref(obj); 385 385 object_property_set_link(obj, OBJECT(xi), ICP_PROP_XICS, &error_abort); 386 386 object_property_set_link(obj, cpu, ICP_PROP_CPU, &error_abort); 387 387 - object_property_set_bool(obj, true, "realized", &local_err); 387 387 + qdev_realize(DEVICE(obj), NULL, &local_err); 388 388 if (local_err) { 389 389 object_unparent(obj); 390 390 error_propagate(errp, local_err);

+1 -1

hw/intc/xive.c

··· 765 765 object_unref(obj); 766 766 object_property_set_link(obj, cpu, "cpu", &error_abort); 767 767 object_property_set_link(obj, OBJECT(xptr), "presenter", &error_abort); 768 768 - object_property_set_bool(obj, true, "realized", &local_err); 768 768 + qdev_realize(DEVICE(obj), NULL, &local_err); 769 769 if (local_err) { 770 770 goto error; 771 771 }

+1 -1

hw/microblaze/petalogix_ml605_mmu.c

··· 91 91 object_property_set_bool(OBJECT(cpu), true, "dcache-writeback", 92 92 &error_abort); 93 93 object_property_set_bool(OBJECT(cpu), true, "endianness", &error_abort); 94 94 - object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); 94 94 + qdev_realize(DEVICE(cpu), NULL, &error_abort); 95 95 96 96 /* Attach emulated BRAM through the LMB. */ 97 97 memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram",

+1 -1

hw/microblaze/petalogix_s3adsp1800_mmu.c

··· 71 71 72 72 cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU)); 73 73 object_property_set_str(OBJECT(cpu), "7.10.d", "version", &error_abort); 74 74 - object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); 74 74 + qdev_realize(DEVICE(cpu), NULL, &error_abort); 75 75 76 76 /* Attach emulated BRAM through the LMB. */ 77 77 memory_region_init_ram(phys_lmb_bram, NULL,

+2 -2

hw/microblaze/xlnx-zynqmp-pmu.c

··· 96 96 object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version", 97 97 &error_abort); 98 98 object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort); 99 99 - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 99 99 + qdev_realize(DEVICE(&s->cpu), NULL, &err); 100 100 if (err) { 101 101 error_propagate(errp, err); 102 102 return; ··· 172 172 /* Create the PMU device */ 173 173 object_initialize_child(OBJECT(machine), "pmu", pmu, 174 174 TYPE_XLNX_ZYNQMP_PMU_SOC); 175 175 - object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); 175 175 + qdev_realize(DEVICE(pmu), NULL, &error_fatal); 176 176 177 177 /* Load the kernel */ 178 178 microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR,

+3 -3

hw/pci-host/pnv_phb3.c

··· 1003 1003 &error_abort); 1004 1004 object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs", 1005 1005 &error_abort); 1006 1006 - object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err); 1006 1006 + qdev_realize(DEVICE(&phb->lsis), NULL, &local_err); 1007 1007 if (local_err) { 1008 1008 error_propagate(errp, local_err); 1009 1009 return; ··· 1022 1022 &error_abort); 1023 1023 object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs", 1024 1024 &error_abort); 1025 1025 - object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err); 1025 1025 + qdev_realize(DEVICE(&phb->msis), NULL, &local_err); 1026 1026 if (local_err) { 1027 1027 error_propagate(errp, local_err); 1028 1028 return; ··· 1031 1031 /* Power Bus Common Queue */ 1032 1032 object_property_set_link(OBJECT(&phb->pbcq), OBJECT(phb), "phb", 1033 1033 &error_abort); 1034 1034 - object_property_set_bool(OBJECT(&phb->pbcq), true, "realized", &local_err); 1034 1034 + qdev_realize(DEVICE(&phb->pbcq), NULL, &local_err); 1035 1035 if (local_err) { 1036 1036 error_propagate(errp, local_err); 1037 1037 return;

+1 -1

hw/pci-host/pnv_phb4.c

··· 1218 1218 } 1219 1219 object_property_set_int(OBJECT(xsrc), nr_irqs, "nr-irqs", &error_fatal); 1220 1220 object_property_set_link(OBJECT(xsrc), OBJECT(phb), "xive", &error_fatal); 1221 1221 - object_property_set_bool(OBJECT(xsrc), true, "realized", &local_err); 1221 1221 + qdev_realize(DEVICE(xsrc), NULL, &local_err); 1222 1222 if (local_err) { 1223 1223 error_propagate(errp, local_err); 1224 1224 return;

+1 -1

hw/pci-host/pnv_phb4_pec.c

··· 390 390 391 391 object_property_set_int(stk_obj, i, "stack-no", &error_abort); 392 392 object_property_set_link(stk_obj, OBJECT(pec), "pec", &error_abort); 393 393 - object_property_set_bool(stk_obj, true, "realized", &local_err); 393 393 + qdev_realize(DEVICE(stk_obj), NULL, &local_err); 394 394 if (local_err) { 395 395 error_propagate(errp, local_err); 396 396 return;

+1 -2

hw/pci-host/prep.c

··· 238 238 s->or_irq = OR_IRQ(object_new(TYPE_OR_IRQ)); 239 239 object_property_set_int(OBJECT(s->or_irq), PCI_NUM_PINS, "num-lines", 240 240 &error_fatal); 241 241 - object_property_set_bool(OBJECT(s->or_irq), true, "realized", 242 242 - &error_fatal); 241 241 + qdev_realize(DEVICE(s->or_irq), NULL, &error_fatal); 243 242 sysbus_init_irq(dev, &s->or_irq->out_irq); 244 243 245 244 for (i = 0; i < PCI_NUM_PINS; i++) {

+13 -19

hw/ppc/pnv.c

··· 1138 1138 "bar", &error_fatal); 1139 1139 object_property_set_link(OBJECT(&chip8->psi), OBJECT(chip8->xics), 1140 1140 ICS_PROP_XICS, &error_abort); 1141 1141 - object_property_set_bool(OBJECT(&chip8->psi), true, "realized", &local_err); 1141 1141 + qdev_realize(DEVICE(&chip8->psi), NULL, &local_err); 1142 1142 if (local_err) { 1143 1143 error_propagate(errp, local_err); 1144 1144 return; ··· 1149 1149 /* Create LPC controller */ 1150 1150 object_property_set_link(OBJECT(&chip8->lpc), OBJECT(&chip8->psi), "psi", 1151 1151 &error_abort); 1152 1152 - object_property_set_bool(OBJECT(&chip8->lpc), true, "realized", 1153 1153 - &error_fatal); 1152 1152 + qdev_realize(DEVICE(&chip8->lpc), NULL, &error_fatal); 1154 1153 pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip8->lpc.xscom_regs); 1155 1154 1156 1155 chip->dt_isa_nodename = g_strdup_printf("/xscom@%" PRIx64 "/isa@%x", ··· 1170 1169 /* Create the simplified OCC model */ 1171 1170 object_property_set_link(OBJECT(&chip8->occ), OBJECT(&chip8->psi), "psi", 1172 1171 &error_abort); 1173 1173 - object_property_set_bool(OBJECT(&chip8->occ), true, "realized", &local_err); 1172 1172 + qdev_realize(DEVICE(&chip8->occ), NULL, &local_err); 1174 1173 if (local_err) { 1175 1174 error_propagate(errp, local_err); 1176 1175 return; ··· 1184 1183 /* HOMER */ 1185 1184 object_property_set_link(OBJECT(&chip8->homer), OBJECT(chip), "chip", 1186 1185 &error_abort); 1187 1187 - object_property_set_bool(OBJECT(&chip8->homer), true, "realized", 1188 1188 - &local_err); 1186 1186 + qdev_realize(DEVICE(&chip8->homer), NULL, &local_err); 1189 1187 if (local_err) { 1190 1188 error_propagate(errp, local_err); 1191 1189 return; ··· 1352 1350 &error_fatal, NULL); 1353 1351 1354 1352 object_property_set_int(OBJECT(eq), core_id, "id", &error_fatal); 1355 1355 - object_property_set_bool(OBJECT(eq), true, "realized", &error_fatal); 1353 1353 + qdev_realize(DEVICE(eq), NULL, &error_fatal); 1356 1354 1357 1355 pnv_xscom_add_subregion(chip, PNV9_XSCOM_EQ_BASE(eq->id), 1358 1356 &eq->xscom_regs); ··· 1384 1382 &error_fatal); 1385 1383 object_property_set_link(OBJECT(pec), OBJECT(get_system_memory()), 1386 1384 "system-memory", &error_abort); 1387 1387 - object_property_set_bool(OBJECT(pec), true, "realized", &local_err); 1385 1385 + qdev_realize(DEVICE(pec), NULL, &local_err); 1388 1386 if (local_err) { 1389 1387 error_propagate(errp, local_err); 1390 1388 return; ··· 1480 1478 /* Processor Service Interface (PSI) Host Bridge */ 1481 1479 object_property_set_int(OBJECT(&chip9->psi), PNV9_PSIHB_BASE(chip), 1482 1480 "bar", &error_fatal); 1483 1483 - object_property_set_bool(OBJECT(&chip9->psi), true, "realized", &local_err); 1481 1481 + qdev_realize(DEVICE(&chip9->psi), NULL, &local_err); 1484 1482 if (local_err) { 1485 1483 error_propagate(errp, local_err); 1486 1484 return; ··· 1491 1489 /* LPC */ 1492 1490 object_property_set_link(OBJECT(&chip9->lpc), OBJECT(&chip9->psi), "psi", 1493 1491 &error_abort); 1494 1494 - object_property_set_bool(OBJECT(&chip9->lpc), true, "realized", &local_err); 1492 1492 + qdev_realize(DEVICE(&chip9->lpc), NULL, &local_err); 1495 1493 if (local_err) { 1496 1494 error_propagate(errp, local_err); 1497 1495 return; ··· 1505 1503 /* Create the simplified OCC model */ 1506 1504 object_property_set_link(OBJECT(&chip9->occ), OBJECT(&chip9->psi), "psi", 1507 1505 &error_abort); 1508 1508 - object_property_set_bool(OBJECT(&chip9->occ), true, "realized", &local_err); 1506 1506 + qdev_realize(DEVICE(&chip9->occ), NULL, &local_err); 1509 1507 if (local_err) { 1510 1508 error_propagate(errp, local_err); 1511 1509 return; ··· 1519 1517 /* HOMER */ 1520 1518 object_property_set_link(OBJECT(&chip9->homer), OBJECT(chip), "chip", 1521 1519 &error_abort); 1522 1522 - object_property_set_bool(OBJECT(&chip9->homer), true, "realized", 1523 1523 - &local_err); 1520 1520 + qdev_realize(DEVICE(&chip9->homer), NULL, &local_err); 1524 1521 if (local_err) { 1525 1522 error_propagate(errp, local_err); 1526 1523 return; ··· 1602 1599 /* Processor Service Interface (PSI) Host Bridge */ 1603 1600 object_property_set_int(OBJECT(&chip10->psi), PNV10_PSIHB_BASE(chip), 1604 1601 "bar", &error_fatal); 1605 1605 - object_property_set_bool(OBJECT(&chip10->psi), true, "realized", 1606 1606 - &local_err); 1602 1602 + qdev_realize(DEVICE(&chip10->psi), NULL, &local_err); 1607 1603 if (local_err) { 1608 1604 error_propagate(errp, local_err); 1609 1605 return; ··· 1614 1610 /* LPC */ 1615 1611 object_property_set_link(OBJECT(&chip10->lpc), OBJECT(&chip10->psi), "psi", 1616 1612 &error_abort); 1617 1617 - object_property_set_bool(OBJECT(&chip10->lpc), true, "realized", 1618 1618 - &local_err); 1613 1613 + qdev_realize(DEVICE(&chip10->lpc), NULL, &local_err); 1619 1614 if (local_err) { 1620 1615 error_propagate(errp, local_err); 1621 1616 return; ··· 1734 1729 "hrmor", &error_fatal); 1735 1730 object_property_set_link(OBJECT(pnv_core), OBJECT(chip), "chip", 1736 1731 &error_abort); 1737 1737 - object_property_set_bool(OBJECT(pnv_core), true, "realized", 1738 1738 - &error_fatal); 1732 1732 + qdev_realize(DEVICE(pnv_core), NULL, &error_fatal); 1739 1733 1740 1734 /* Each core has an XSCOM MMIO region */ 1741 1735 xscom_core_base = pcc->xscom_core_base(chip, core_hwid);

+1 -1

hw/ppc/pnv_bmc.c

··· 235 235 obj = object_new(TYPE_IPMI_BMC_SIMULATOR); 236 236 object_ref(OBJECT(pnor)); 237 237 object_property_add_const_link(obj, "pnor", OBJECT(pnor)); 238 238 - object_property_set_bool(obj, true, "realized", &error_fatal); 238 238 + qdev_realize(DEVICE(obj), NULL, &error_fatal); 239 239 240 240 /* Install the HIOMAP protocol handlers to access the PNOR */ 241 241 ipmi_sim_register_netfn(IPMI_BMC_SIMULATOR(obj), IPMI_NETFN_OEM,

+1 -1

hw/ppc/pnv_core.c

··· 173 173 Error *local_err = NULL; 174 174 PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip); 175 175 176 176 - object_property_set_bool(OBJECT(cpu), true, "realized", &local_err); 176 176 + qdev_realize(DEVICE(cpu), NULL, &local_err); 177 177 if (local_err) { 178 178 error_propagate(errp, local_err); 179 179 return;

+2 -2

hw/ppc/pnv_psi.c

··· 510 510 error_propagate(errp, err); 511 511 return; 512 512 } 513 513 - object_property_set_bool(OBJECT(ics), true, "realized", &err); 513 513 + qdev_realize(DEVICE(ics), NULL, &err); 514 514 if (err) { 515 515 error_propagate(errp, err); 516 516 return; ··· 851 851 object_property_set_int(OBJECT(xsrc), PSIHB9_NUM_IRQS, "nr-irqs", 852 852 &error_fatal); 853 853 object_property_set_link(OBJECT(xsrc), OBJECT(psi), "xive", &error_abort); 854 854 - object_property_set_bool(OBJECT(xsrc), true, "realized", &local_err); 854 854 + qdev_realize(DEVICE(xsrc), NULL, &local_err); 855 855 if (local_err) { 856 856 error_propagate(errp, local_err); 857 857 return;

+2 -3

hw/ppc/spapr.c

··· 1730 1730 object_initialize_child_with_props(OBJECT(spapr), "rtc", &spapr->rtc, 1731 1731 sizeof(spapr->rtc), TYPE_SPAPR_RTC, 1732 1732 &error_fatal, NULL); 1733 1733 - object_property_set_bool(OBJECT(&spapr->rtc), true, "realized", 1734 1734 - &error_fatal); 1733 1733 + qdev_realize(DEVICE(&spapr->rtc), NULL, &error_fatal); 1735 1734 object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc), 1736 1735 "date"); 1737 1736 } ··· 2629 2628 &error_fatal); 2630 2629 object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID, 2631 2630 &error_fatal); 2632 2632 - object_property_set_bool(core, true, "realized", &error_fatal); 2631 2631 + qdev_realize(DEVICE(core), NULL, &error_fatal); 2633 2632 2634 2633 object_unref(core); 2635 2634 }

+1 -1

hw/ppc/spapr_cpu_core.c

··· 239 239 CPUState *cs = CPU(cpu); 240 240 Error *local_err = NULL; 241 241 242 242 - object_property_set_bool(OBJECT(cpu), true, "realized", &local_err); 242 242 + qdev_realize(DEVICE(cpu), NULL, &local_err); 243 243 if (local_err) { 244 244 goto error; 245 245 }

+1 -1

hw/ppc/spapr_drc.c

··· 567 567 spapr_drc_index(drc)); 568 568 object_property_add_child(owner, prop_name, OBJECT(drc)); 569 569 object_unref(OBJECT(drc)); 570 570 - object_property_set_bool(OBJECT(drc), true, "realized", NULL); 570 570 + qdev_realize(DEVICE(drc), NULL, NULL); 571 571 g_free(prop_name); 572 572 573 573 return drc;

+1 -1

hw/ppc/spapr_iommu.c

··· 369 369 g_free(tmp); 370 370 object_unref(OBJECT(tcet)); 371 371 372 372 - object_property_set_bool(OBJECT(tcet), true, "realized", NULL); 372 372 + qdev_realize(DEVICE(tcet), NULL, NULL); 373 373 374 374 return tcet; 375 375 }

+1 -1

hw/ppc/spapr_irq.c

··· 311 311 object_property_set_link(obj, OBJECT(spapr), ICS_PROP_XICS, 312 312 &error_abort); 313 313 object_property_set_int(obj, smc->nr_xirqs, "nr-irqs", &error_abort); 314 314 - object_property_set_bool(obj, true, "realized", &local_err); 314 314 + qdev_realize(DEVICE(obj), NULL, &local_err); 315 315 if (local_err) { 316 316 error_propagate(errp, local_err); 317 317 return;

+1 -2

hw/riscv/opentitan.c

··· 61 61 /* Initialize SoC */ 62 62 object_initialize_child(OBJECT(machine), "soc", &s->soc, 63 63 TYPE_RISCV_IBEX_SOC); 64 64 - object_property_set_bool(OBJECT(&s->soc), true, "realized", 65 65 - &error_abort); 64 64 + qdev_realize(DEVICE(&s->soc), NULL, &error_abort); 66 65 67 66 memory_region_init_ram(main_mem, NULL, "riscv.lowrisc.ibex.ram", 68 67 memmap[IBEX_RAM].size, &error_fatal);

+1 -2

hw/riscv/riscv_hart.c

··· 48 48 object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], cpu_type); 49 49 s->harts[idx].env.mhartid = s->hartid_base + idx; 50 50 qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); 51 51 - object_property_set_bool(OBJECT(&s->harts[idx]), true, 52 52 - "realized", &err); 51 51 + qdev_realize(DEVICE(&s->harts[idx]), NULL, &err); 53 52 if (err) { 54 53 error_propagate(errp, err); 55 54 return;

+1 -2

hw/riscv/sifive_e.c

··· 86 86 87 87 /* Initialize SoC */ 88 88 object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_E_SOC); 89 89 - object_property_set_bool(OBJECT(&s->soc), true, "realized", 90 90 - &error_abort); 89 89 + qdev_realize(DEVICE(&s->soc), NULL, &error_abort); 91 90 92 91 /* Data Tightly Integrated Memory */ 93 92 memory_region_init_ram(main_mem, NULL, "riscv.sifive.e.ram",

+3 -6

hw/riscv/sifive_u.c

··· 331 331 object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC); 332 332 object_property_set_uint(OBJECT(&s->soc), s->serial, "serial", 333 333 &error_abort); 334 334 - object_property_set_bool(OBJECT(&s->soc), true, "realized", 335 335 - &error_abort); 334 334 + qdev_realize(DEVICE(&s->soc), NULL, &error_abort); 336 335 337 336 /* register RAM */ 338 337 memory_region_init_ram(main_mem, NULL, "riscv.sifive.u.ram", ··· 530 529 * CPU must exist and have been parented into the cluster before the 531 530 * cluster is realized. 532 531 */ 533 533 - object_property_set_bool(OBJECT(&s->e_cluster), true, "realized", 534 534 - &error_abort); 535 535 - object_property_set_bool(OBJECT(&s->u_cluster), true, "realized", 536 536 - &error_abort); 532 532 + qdev_realize(DEVICE(&s->e_cluster), NULL, &error_abort); 533 533 + qdev_realize(DEVICE(&s->u_cluster), NULL, &error_abort); 537 534 538 535 /* boot rom */ 539 536 memory_region_init_rom(mask_rom, OBJECT(dev), "riscv.sifive.u.mrom",

+1 -1

hw/s390x/s390-skeys.c

··· 48 48 obj); 49 49 object_unref(obj); 50 50 51 51 - qdev_init_nofail(DEVICE(obj)); 51 51 + qdev_realize(DEVICE(obj), NULL, &error_fatal); 52 52 } 53 53 54 54 static void write_keys(FILE *f, uint8_t *keys, uint64_t startgfn,

+1 -1

hw/s390x/s390-stattrib.c

··· 50 50 obj); 51 51 object_unref(obj); 52 52 53 53 - qdev_init_nofail(DEVICE(obj)); 53 53 + qdev_realize(DEVICE(obj), NULL, &error_fatal); 54 54 } 55 55 56 56 /* Console commands: */

+2 -2

hw/s390x/s390-virtio-ccw.c

··· 75 75 if (err != NULL) { 76 76 goto out; 77 77 } 78 78 - object_property_set_bool(OBJECT(cpu), true, "realized", &err); 78 78 + qdev_realize(DEVICE(cpu), NULL, &err); 79 79 80 80 out: 81 81 object_unref(OBJECT(cpu)); ··· 210 210 object_property_add_child(qdev_get_machine(), TYPE_S390_IPL, 211 211 new); 212 212 object_unref(new); 213 213 - qdev_init_nofail(dev); 213 213 + qdev_realize(dev, NULL, &error_fatal); 214 214 } 215 215 216 216 static void s390_create_virtio_net(BusState *bus, const char *name)

+1 -1

hw/s390x/sclp.c

··· 322 322 323 323 object_property_add_child(qdev_get_machine(), TYPE_SCLP, new); 324 324 object_unref(new); 325 325 - qdev_init_nofail(DEVICE(new)); 325 325 + qdev_realize(DEVICE(new), NULL, &error_fatal); 326 326 } 327 327 328 328 static void sclp_realize(DeviceState *dev, Error **errp)

+1 -1

hw/s390x/tod.c

··· 29 29 object_property_add_child(qdev_get_machine(), TYPE_S390_TOD, obj); 30 30 object_unref(obj); 31 31 32 32 - qdev_init_nofail(DEVICE(obj)); 32 32 + qdev_realize(DEVICE(obj), NULL, &error_fatal); 33 33 } 34 34 35 35 S390TODState *s390_get_todstate(void)

+1 -2

target/i386/cpu.c

··· 6167 6167 if (cpu->apic_state == NULL) { 6168 6168 return; 6169 6169 } 6170 6170 - object_property_set_bool(OBJECT(cpu->apic_state), true, "realized", 6171 6171 - errp); 6170 6170 + qdev_realize(DEVICE(cpu->apic_state), NULL, errp); 6172 6171 6173 6172 /* Map APIC MMIO area */ 6174 6173 apic = APIC_COMMON(cpu->apic_state);

+5 -4

tests/test-qdev-global-props.c

··· 26 26 27 27 #include "hw/qdev-properties.h" 28 28 #include "qom/object.h" 29 29 + #include "qapi/error.h" 29 30 #include "qapi/visitor.h" 30 31 31 32 ··· 76 77 MyType *mt; 77 78 78 79 mt = STATIC_TYPE(object_new(TYPE_STATIC_PROPS)); 79 79 - qdev_init_nofail(DEVICE(mt)); 80 80 + qdev_realize(DEVICE(mt), NULL, &error_fatal); 80 81 81 82 g_assert_cmpuint(mt->prop1, ==, PROP_DEFAULT); 82 83 } ··· 111 112 register_global_properties(props); 112 113 113 114 mt = STATIC_TYPE(object_new(TYPE_STATIC_PROPS)); 114 114 - qdev_init_nofail(DEVICE(mt)); 115 115 + qdev_realize(DEVICE(mt), NULL, &error_fatal); 115 116 116 117 g_assert_cmpuint(mt->prop1, ==, 200); 117 118 g_assert_cmpuint(mt->prop2, ==, PROP_DEFAULT); ··· 229 230 register_global_properties(props); 230 231 231 232 mt = DYNAMIC_TYPE(object_new(TYPE_DYNAMIC_PROPS)); 232 232 - qdev_init_nofail(DEVICE(mt)); 233 233 + qdev_realize(DEVICE(mt), NULL, &error_fatal); 233 234 234 235 g_assert_cmpuint(mt->prop1, ==, 101); 235 236 g_assert_cmpuint(mt->prop2, ==, 102); ··· 272 273 register_global_properties(props); 273 274 274 275 mt = STATIC_TYPE(object_new(TYPE_SUBCLASS)); 275 275 - qdev_init_nofail(DEVICE(mt)); 276 276 + qdev_realize(DEVICE(mt), NULL, &error_fatal); 276 277 277 278 g_assert_cmpuint(mt->prop1, ==, 102); 278 279 g_assert_cmpuint(mt->prop2, ==, 104);