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qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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hw/intc/arm_gicv3_its: Implement a minimalist reset

At the moment the ITS is not properly reset and this causes
various bugs on save/restore. We implement a minimalist reset
through individual register writes but for kernel versions
before v4.15 this fails voiding the vITS cache. We cannot
claim we have a comprehensive reset (hence the error message)
but that's better than nothing.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1511883692-11511-3-git-send-email-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

authored by

Eric Auger and committed by
Peter Maydell c9aedf8c 7e724479

+42
+42
hw/intc/arm_gicv3_its_kvm.c
··· 28 28 29 29 #define TYPE_KVM_ARM_ITS "arm-its-kvm" 30 30 #define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_ITS) 31 + #define KVM_ARM_ITS_CLASS(klass) \ 32 + OBJECT_CLASS_CHECK(KVMARMITSClass, (klass), TYPE_KVM_ARM_ITS) 33 + #define KVM_ARM_ITS_GET_CLASS(obj) \ 34 + OBJECT_GET_CLASS(KVMARMITSClass, (obj), TYPE_KVM_ARM_ITS) 35 + 36 + typedef struct KVMARMITSClass { 37 + GICv3ITSCommonClass parent_class; 38 + void (*parent_reset)(DeviceState *dev); 39 + } KVMARMITSClass; 40 + 31 41 32 42 static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid) 33 43 { ··· 186 196 GITS_CTLR, &s->ctlr, true, &error_abort); 187 197 } 188 198 199 + static void kvm_arm_its_reset(DeviceState *dev) 200 + { 201 + GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev); 202 + KVMARMITSClass *c = KVM_ARM_ITS_GET_CLASS(s); 203 + int i; 204 + 205 + c->parent_reset(dev); 206 + 207 + error_report("ITS KVM: full reset is not supported by QEMU"); 208 + 209 + if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 210 + GITS_CTLR)) { 211 + return; 212 + } 213 + 214 + kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 215 + GITS_CTLR, &s->ctlr, true, &error_abort); 216 + 217 + kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 218 + GITS_CBASER, &s->cbaser, true, &error_abort); 219 + 220 + for (i = 0; i < 8; i++) { 221 + kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, 222 + GITS_BASER + i * 8, &s->baser[i], true, 223 + &error_abort); 224 + } 225 + } 226 + 189 227 static Property kvm_arm_its_props[] = { 190 228 DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3", 191 229 GICv3State *), ··· 196 234 { 197 235 DeviceClass *dc = DEVICE_CLASS(klass); 198 236 GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass); 237 + KVMARMITSClass *ic = KVM_ARM_ITS_CLASS(klass); 199 238 200 239 dc->realize = kvm_arm_its_realize; 201 240 dc->props = kvm_arm_its_props; 241 + ic->parent_reset = dc->reset; 202 242 icc->send_msi = kvm_its_send_msi; 203 243 icc->pre_save = kvm_arm_its_pre_save; 204 244 icc->post_load = kvm_arm_its_post_load; 245 + dc->reset = kvm_arm_its_reset; 205 246 } 206 247 207 248 static const TypeInfo kvm_arm_its_info = { ··· 209 250 .parent = TYPE_ARM_GICV3_ITS_COMMON, 210 251 .instance_size = sizeof(GICv3ITSState), 211 252 .class_init = kvm_arm_its_class_init, 253 + .class_size = sizeof(KVMARMITSClass), 212 254 }; 213 255 214 256 static void kvm_arm_its_register_types(void)