jcs.org
qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
rtc-test: cleanup register_b_set_flag test
Introduce set_datetime_bcd/assert_datetime_bcd, and handle
UIP correctly.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+46
-30
+46
-30
tests/rtc-test.c
+46
-30
tests/rtc-test.c
···
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#include "qemu/timer.h"
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#include "hw/timer/mc146818rtc_regs.h"
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#define UIP_HOLD_LENGTH (8 * NANOSECONDS_PER_SECOND / 32768)
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+
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static uint8_t base = 0x70;
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static int bcd2dec(int value)
···
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g_assert(cmos_read(RTC_REG_C) == 0);
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}
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static void set_time_regs(int h, int m, int s)
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{
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cmos_write(RTC_HOURS, h);
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cmos_write(RTC_MINUTES, m);
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cmos_write(RTC_SECONDS, s);
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}
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static void set_time(int mode, int h, int m, int s)
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{
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/* set BCD 12 hour mode */
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cmos_write(RTC_REG_B, mode);
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cmos_write(RTC_REG_A, 0x76);
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set_time_regs(h, m, s);
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cmos_write(RTC_REG_A, 0x26);
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}
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cmos_write(RTC_REG_A, 0x76);
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static void set_datetime_bcd(int h, int min, int s, int d, int m, int y)
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{
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cmos_write(RTC_HOURS, h);
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cmos_write(RTC_MINUTES, m);
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cmos_write(RTC_MINUTES, min);
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cmos_write(RTC_SECONDS, s);
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cmos_write(RTC_REG_A, 0x26);
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cmos_write(RTC_YEAR, y & 0xFF);
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cmos_write(RTC_CENTURY, y >> 8);
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cmos_write(RTC_MONTH, m);
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cmos_write(RTC_DAY_OF_MONTH, d);
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}
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#define assert_time(h, m, s) \
···
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g_assert_cmpint(cmos_read(RTC_HOURS), ==, h); \
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g_assert_cmpint(cmos_read(RTC_MINUTES), ==, m); \
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g_assert_cmpint(cmos_read(RTC_SECONDS), ==, s); \
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} while(0)
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#define assert_datetime_bcd(h, min, s, d, m, y) \
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do { \
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g_assert_cmpint(cmos_read(RTC_HOURS), ==, h); \
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g_assert_cmpint(cmos_read(RTC_MINUTES), ==, min); \
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g_assert_cmpint(cmos_read(RTC_SECONDS), ==, s); \
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g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, d); \
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g_assert_cmpint(cmos_read(RTC_MONTH), ==, m); \
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g_assert_cmpint(cmos_read(RTC_YEAR), ==, (y & 0xFF)); \
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g_assert_cmpint(cmos_read(RTC_CENTURY), ==, (y >> 8)); \
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} while(0)
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static void basic_12h_bcd(void)
···
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static void register_b_set_flag(void)
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{
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if (cmos_read(RTC_REG_A) & REG_A_UIP) {
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clock_step(UIP_HOLD_LENGTH + NANOSECONDS_PER_SECOND / 5);
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}
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g_assert_cmpint(cmos_read(RTC_REG_A) & REG_A_UIP, ==, 0);
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/* Enable binary-coded decimal (BCD) mode and SET flag in Register B*/
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cmos_write(RTC_REG_B, REG_B_24H | REG_B_SET);
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cmos_write(RTC_REG_A, 0x76);
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cmos_write(RTC_YEAR, 0x11);
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cmos_write(RTC_CENTURY, 0x20);
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cmos_write(RTC_MONTH, 0x02);
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cmos_write(RTC_DAY_OF_MONTH, 0x02);
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cmos_write(RTC_HOURS, 0x02);
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cmos_write(RTC_MINUTES, 0x04);
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cmos_write(RTC_SECONDS, 0x58);
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cmos_write(RTC_REG_A, 0x26);
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set_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
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assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
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/* Since SET flag is still enabled, these are equality checks. */
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g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
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g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
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g_assert_cmpint(cmos_read(RTC_SECONDS), ==, 0x58);
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g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
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g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
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g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x11);
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g_assert_cmpint(cmos_read(RTC_CENTURY), ==, 0x20);
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/* Since SET flag is still enabled, time does not advance. */
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clock_step(1000000000LL);
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assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
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/* Disable SET flag in Register B */
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cmos_write(RTC_REG_B, cmos_read(RTC_REG_B) & ~REG_B_SET);
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g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
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g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
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assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
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/* Since SET flag is disabled, this is an inequality check.
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* We (reasonably) assume that no (sexagesimal) overflow occurs. */
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g_assert_cmpint(cmos_read(RTC_SECONDS), >=, 0x58);
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g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
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g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
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g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x11);
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g_assert_cmpint(cmos_read(RTC_CENTURY), ==, 0x20);
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/* Since SET flag is disabled, the clock now advances. */
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clock_step(1000000000LL);
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assert_datetime_bcd(0x02, 0x04, 0x59, 0x02, 0x02, 0x2011);
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}
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#define RTC_PERIOD_CODE1 13 /* 8 Hz */