qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

target/microblaze: gdb: Extend the number of registers presented to GDB

Increase the number of Microblaze registers QEMU will report when
talking to GDB.

Signed-off-by: Joe Komlodi <komlodi@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-Id: <1589393329-223076-2-git-send-email-komlodi@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

authored by

Joe Komlodi and committed by
Edgar E. Iglesias
a44e82db 2016a6a7

+50 -4
+1 -1
target/microblaze/cpu.c
··· 329 329 #endif 330 330 dc->vmsd = &vmstate_mb_cpu; 331 331 device_class_set_props(dc, mb_properties); 332 - cc->gdb_num_core_regs = 32 + 5; 332 + cc->gdb_num_core_regs = 32 + 27; 333 333 334 334 cc->disas_set_info = mb_disas_set_info; 335 335 cc->tcg_initialize = mb_tcg_init;
+49 -3
target/microblaze/gdbstub.c
··· 26 26 MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); 27 27 CPUMBState *env = &cpu->env; 28 28 29 + /* 30 + * GDB expects registers to be reported in this order: 31 + * R0-R31 32 + * PC-BTR 33 + * PVR0-PVR11 34 + * EDR-TLBHI 35 + * SLR-SHR 36 + */ 29 37 if (n < 32) { 30 38 return gdb_get_reg32(mem_buf, env->regs[n]); 31 39 } else { 32 - return gdb_get_reg32(mem_buf, env->sregs[n - 32]); 40 + n -= 32; 41 + switch (n) { 42 + case 0 ... 5: 43 + return gdb_get_reg32(mem_buf, env->sregs[n]); 44 + /* PVR12 is intentionally skipped */ 45 + case 6 ... 17: 46 + n -= 6; 47 + return gdb_get_reg32(mem_buf, env->pvr.regs[n]); 48 + case 18 ... 24: 49 + /* Add an offset of 6 to resume where we left off with SRegs */ 50 + n = n - 18 + 6; 51 + return gdb_get_reg32(mem_buf, env->sregs[n]); 52 + case 25: 53 + return gdb_get_reg32(mem_buf, env->slr); 54 + case 26: 55 + return gdb_get_reg32(mem_buf, env->shr); 56 + default: 57 + return 0; 58 + } 33 59 } 34 - return 0; 35 60 } 36 61 37 62 int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) ··· 50 75 if (n < 32) { 51 76 env->regs[n] = tmp; 52 77 } else { 53 - env->sregs[n - 32] = tmp; 78 + n -= 32; 79 + switch (n) { 80 + case 0 ... 5: 81 + env->sregs[n] = tmp; 82 + break; 83 + /* PVR12 is intentionally skipped */ 84 + case 6 ... 17: 85 + n -= 6; 86 + env->pvr.regs[n] = tmp; 87 + break; 88 + case 18 ... 24: 89 + /* Add an offset of 6 to resume where we left off with SRegs */ 90 + n = n - 18 + 6; 91 + env->sregs[n] = tmp; 92 + break; 93 + case 25: 94 + env->slr = tmp; 95 + break; 96 + case 26: 97 + env->shr = tmp; 98 + break; 99 + } 54 100 } 55 101 return 4; 56 102 }