qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

tests/tcg/xtensa: add FP0 group arithmetic tests

Test arithmetic operations for normal, NaN and Inf arguments.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

+191
+1
tests/tcg/xtensa/Makefile
··· 39 39 TESTCASES += test_extui.tst 40 40 TESTCASES += test_fail.tst 41 41 TESTCASES += test_flix.tst 42 + TESTCASES += test_fp0_arith.tst 42 43 TESTCASES += test_interrupt.tst 43 44 TESTCASES += test_loop.tst 44 45 TESTCASES += test_lsc.tst
+17
tests/tcg/xtensa/macros.inc
··· 98 98 s32i a3, a2, 0 99 99 .endm 100 100 101 + .macro dump r 102 + #ifdef DEBUG 103 + .data 104 + .align 4 105 + 1: .word 0 106 + .text 107 + movi a4, 1b 108 + s32i a2, a4, 0 109 + movi a2, 4 110 + movi a3, 1 111 + movi a5, 4 112 + simcall 113 + movi a4, 1b 114 + l32i a2, a4, 0 115 + #endif 116 + .endm 117 + 101 118 #define glue(a, b) _glue(a, b) 102 119 #define _glue(a, b) a ## b 103 120
+173
tests/tcg/xtensa/test_fp0_arith.S
··· 1 + #include "macros.inc" 2 + 3 + test_suite fp0_arith 4 + 5 + #if XCHAL_HAVE_FP 6 + 7 + .macro movfp fr, v 8 + movi a2, \v 9 + wfr \fr, a2 10 + .endm 11 + 12 + .macro check_res fr, r 13 + rfr a2, \fr 14 + dump a2 15 + movi a3, \r 16 + assert eq, a2, a3 17 + rur a2, fsr 18 + assert eqi, a2, 0 19 + .endm 20 + 21 + .macro test_op2_rm op, fr0, fr1, fr2, v0, v1, r 22 + movi a2, 0 23 + wur a2, fsr 24 + movfp \fr0, \v0 25 + movfp \fr1, \v1 26 + \op \fr2, \fr0, \fr1 27 + check_res \fr2, \r 28 + .endm 29 + 30 + .macro test_op3_rm op, fr0, fr1, fr2, fr3, v0, v1, v2, r 31 + movi a2, 0 32 + wur a2, fsr 33 + movfp \fr0, \v0 34 + movfp \fr1, \v1 35 + movfp \fr2, \v2 36 + \op \fr0, \fr1, \fr2 37 + check_res \fr3, \r 38 + .endm 39 + 40 + .macro test_op2_ex op, fr0, fr1, fr2, v0, v1, rm, r 41 + movi a2, \rm 42 + wur a2, fcr 43 + test_op2_rm \op, \fr0, \fr1, \fr2, \v0, \v1, \r 44 + movi a2, (\rm) | 0x7c 45 + wur a2, fcr 46 + test_op2_rm \op, \fr0, \fr1, \fr2, \v0, \v1, \r 47 + .endm 48 + 49 + .macro test_op3_ex op, fr0, fr1, fr2, fr3, v0, v1, v2, rm, r 50 + movi a2, \rm 51 + wur a2, fcr 52 + test_op3_rm \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, \r 53 + movi a2, (\rm) | 0x7c 54 + wur a2, fcr 55 + test_op3_rm \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, \r 56 + .endm 57 + 58 + .macro test_op2 op, fr0, fr1, fr2, v0, v1, r0, r1, r2, r3 59 + test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 0, \r0 60 + test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 1, \r1 61 + test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 2, \r2 62 + test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 3, \r3 63 + .endm 64 + 65 + .macro test_op3 op, fr0, fr1, fr2, fr3, v0, v1, v2, r0, r1, r2, r3 66 + test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 0, \r0 67 + test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 1, \r1 68 + test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 2, \r2 69 + test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 3, \r3 70 + .endm 71 + 72 + .macro test_op2_cpe op 73 + set_vector kernel, 2f 74 + movi a2, 0 75 + wsr a2, cpenable 76 + 1: 77 + \op f2, f0, f1 78 + test_fail 79 + 2: 80 + rsr a2, excvaddr 81 + movi a3, 1b 82 + assert eq, a2, a3 83 + rsr a2, exccause 84 + movi a3, 32 85 + assert eq, a2, a3 86 + 87 + set_vector kernel, 0 88 + movi a2, 1 89 + wsr a2, cpenable 90 + .endm 91 + 92 + test add_s 93 + movi a2, 1 94 + wsr a2, cpenable 95 + 96 + test_op2 add.s, f0, f1, f2, 0x3fc00000, 0x34400000, \ 97 + 0x3fc00002, 0x3fc00001, 0x3fc00002, 0x3fc00001 98 + test_op2 add.s, f3, f4, f5, 0x3fc00000, 0x34a00000, \ 99 + 0x3fc00002, 0x3fc00002, 0x3fc00003, 0x3fc00002 100 + 101 + /* MAX_FLOAT + MAX_FLOAT = +inf/MAX_FLOAT */ 102 + test_op2 add.s, f6, f7, f8, 0x7f7fffff, 0x7f7fffff, \ 103 + 0x7f800000, 0x7f7fffff, 0x7f800000, 0x7f7fffff 104 + test_end 105 + 106 + test add_s_inf 107 + /* 1 + +inf = +inf */ 108 + test_op2 add.s, f6, f7, f8, 0x3fc00000, 0x7f800000, \ 109 + 0x7f800000, 0x7f800000, 0x7f800000, 0x7f800000 110 + 111 + /* +inf + -inf = default NaN */ 112 + test_op2 add.s, f0, f1, f2, 0x7f800000, 0xff800000, \ 113 + 0x7fc00000, 0x7fc00000, 0x7fc00000, 0x7fc00000 114 + test_end 115 + 116 + test add_s_nan 117 + /* 1 + NaN = NaN */ 118 + test_op2 add.s, f9, f10, f11, 0x3fc00000, 0x7fc00001, \ 119 + 0x7fc00001, 0x7fc00001, 0x7fc00001, 0x7fc00001 120 + test_op2 add.s, f12, f13, f14, 0x3fc00000, 0x7f800001, \ 121 + 0x7f800001, 0x7f800001, 0x7f800001, 0x7f800001 122 + 123 + /* NaN1 + NaN2 = NaN1 */ 124 + test_op2 add.s, f15, f0, f1, 0x7f800001, 0x7fbfffff, \ 125 + 0x7f800001, 0x7f800001, 0x7f800001, 0x7f800001 126 + test_op2 add.s, f2, f3, f4, 0x7fbfffff, 0x7f800001, \ 127 + 0x7fbfffff, 0x7fbfffff, 0x7fbfffff, 0x7fbfffff 128 + test_op2 add.s, f5, f6, f7, 0x7fc00001, 0x7fbfffff, \ 129 + 0x7fc00001, 0x7fc00001, 0x7fc00001, 0x7fc00001 130 + test_op2 add.s, f8, f9, f10, 0x7fbfffff, 0x7fc00001, \ 131 + 0x7fbfffff, 0x7fbfffff, 0x7fbfffff, 0x7fbfffff 132 + test_end 133 + 134 + test sub_s 135 + test_op2 sub.s, f0, f1, f0, 0x3f800001, 0x33800000, \ 136 + 0x3f800000, 0x3f800000, 0x3f800001, 0x3f800000 137 + test_op2 sub.s, f0, f1, f1, 0x3f800002, 0x33800000, \ 138 + 0x3f800002, 0x3f800001, 0x3f800002, 0x3f800001 139 + 140 + /* norm - norm = denorm */ 141 + test_op2 sub.s, f6, f7, f8, 0x00800001, 0x00800000, \ 142 + 0x00000001, 0x00000001, 0x00000001, 0x00000001 143 + test_end 144 + 145 + test mul_s 146 + test_op2 mul.s, f0, f1, f2, 0x3f800001, 0x3f800001, \ 147 + 0x3f800002, 0x3f800002, 0x3f800003, 0x3f800002 148 + 149 + /* MAX_FLOAT/2 * MAX_FLOAT/2 = +inf/MAX_FLOAT */ 150 + test_op2 mul.s, f6, f7, f8, 0x7f000000, 0x7f000000, \ 151 + 0x7f800000, 0x7f7fffff, 0x7f800000, 0x7f7fffff 152 + /* min norm * min norm = 0/denorm */ 153 + test_op2 mul.s, f6, f7, f8, 0x00800001, 0x00800000, \ 154 + 0x00000000, 0x00000000, 0x00000001, 0x00000000 155 + 156 + /* inf * 0 = default NaN */ 157 + test_op2 mul.s, f6, f7, f8, 0x7f800000, 0x00000000, \ 158 + 0x7fc00000, 0x7fc00000, 0x7fc00000, 0x7fc00000 159 + test_end 160 + 161 + test madd_s 162 + test_op3 madd.s, f0, f1, f2, f0, 0, 0x3f800001, 0x3f800001, \ 163 + 0x3f800002, 0x3f800002, 0x3f800003, 0x3f800002 164 + test_end 165 + 166 + test msub_s 167 + test_op3 msub.s, f0, f1, f2, f0, 0x3f800000, 0x3f800001, 0x3f800001, \ 168 + 0xb4800000, 0xb4800000, 0xb4800000, 0xb4800001 169 + test_end 170 + 171 + #endif 172 + 173 + test_suite_end