qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()

hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.

When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20200518140309.5220-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

authored by

Philippe Mathieu-Daudé and committed by
Peter Maydell
9904625f c4947e64

+15 -8
+15 -8
hw/arm/integratorcp.c
··· 20 20 #include "exec/address-spaces.h" 21 21 #include "sysemu/runstate.h" 22 22 #include "sysemu/sysemu.h" 23 + #include "qemu/log.h" 23 24 #include "qemu/error-report.h" 24 25 #include "hw/char/pl011.h" 25 26 #include "hw/hw.h" ··· 144 145 /* ??? Voltage control unimplemented. */ 145 146 return 0; 146 147 default: 147 - hw_error("integratorcm_read: Unimplemented offset 0x%x\n", 148 - (int)offset); 148 + qemu_log_mask(LOG_UNIMP, 149 + "%s: Unimplemented offset 0x%" HWADDR_PRIX "\n", 150 + __func__, offset); 149 151 return 0; 150 152 } 151 153 } ··· 252 254 /* ??? Voltage control unimplemented. */ 253 255 break; 254 256 default: 255 - hw_error("integratorcm_write: Unimplemented offset 0x%x\n", 256 - (int)offset); 257 + qemu_log_mask(LOG_UNIMP, 258 + "%s: Unimplemented offset 0x%" HWADDR_PRIX "\n", 259 + __func__, offset); 257 260 break; 258 261 } 259 262 } ··· 394 397 case 5: /* INT_SOFTCLR */ 395 398 case 11: /* FRQ_ENABLECLR */ 396 399 default: 397 - printf ("icp_pic_read: Bad register offset 0x%x\n", (int)offset); 400 + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n", 401 + __func__, offset); 398 402 return 0; 399 403 } 400 404 } ··· 430 434 case 8: /* FRQ_STATUS */ 431 435 case 9: /* FRQ_RAWSTAT */ 432 436 default: 433 - printf ("icp_pic_write: Bad register offset 0x%x\n", (int)offset); 437 + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n", 438 + __func__, offset); 434 439 return; 435 440 } 436 441 icp_pic_update(s); ··· 504 509 case 3: /* CP_DECODE */ 505 510 return 0x11; 506 511 default: 507 - hw_error("icp_control_read: Bad offset %x\n", (int)offset); 512 + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n", 513 + __func__, offset); 508 514 return 0; 509 515 } 510 516 } ··· 524 530 /* Nothing interesting implemented yet. */ 525 531 break; 526 532 default: 527 - hw_error("icp_control_write: Bad offset %x\n", (int)offset); 533 + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n", 534 + __func__, offset); 528 535 } 529 536 } 530 537