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qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree
Convert the Neon VQDMULH and VQRDMULH 3-reg-same insns to
decodetree. These are the last integer operations in the
3-reg-same group.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200512163904.10918-11-peter.maydell@linaro.org
+28
-23
+3
target/arm/neon-dp.decode
+3
target/arm/neon-dp.decode
···
152
152
VPMIN_S_3s 1111 001 0 0 . .. .... .... 1010 . . . 1 .... @3same_q0
153
153
VPMIN_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 1 .... @3same_q0
154
154
155
+
VQDMULH_3s 1111 001 0 0 . .. .... .... 1011 . . . 0 .... @3same
156
+
VQRDMULH_3s 1111 001 1 0 . .. .... .... 1011 . . . 0 .... @3same
157
+
155
158
VPADD_3s 1111 001 0 0 . .. .... .... 1011 . . . 1 .... @3same_q0
156
159
157
160
VQRDMLAH_3s 1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same
+24
target/arm/translate-neon.inc.c
+24
target/arm/translate-neon.inc.c
···
997
997
DO_3SAME_PAIR(VPMAX_U, pmax_u)
998
998
DO_3SAME_PAIR(VPMIN_U, pmin_u)
999
999
DO_3SAME_PAIR(VPADD, padd_u)
1000
+
1001
+
#define DO_3SAME_VQDMULH(INSN, FUNC) \
1002
+
WRAP_ENV_FN(gen_##INSN##_tramp16, gen_helper_neon_##FUNC##_s16); \
1003
+
WRAP_ENV_FN(gen_##INSN##_tramp32, gen_helper_neon_##FUNC##_s32); \
1004
+
static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \
1005
+
uint32_t rn_ofs, uint32_t rm_ofs, \
1006
+
uint32_t oprsz, uint32_t maxsz) \
1007
+
{ \
1008
+
static const GVecGen3 ops[2] = { \
1009
+
{ .fni4 = gen_##INSN##_tramp16 }, \
1010
+
{ .fni4 = gen_##INSN##_tramp32 }, \
1011
+
}; \
1012
+
tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &ops[vece - 1]); \
1013
+
} \
1014
+
static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \
1015
+
{ \
1016
+
if (a->size != 1 && a->size != 2) { \
1017
+
return false; \
1018
+
} \
1019
+
return do_3same(s, a, gen_##INSN##_3s); \
1020
+
}
1021
+
1022
+
DO_3SAME_VQDMULH(VQDMULH, qdmulh)
1023
+
DO_3SAME_VQDMULH(VQRDMULH, qrdmulh)
+1
-23
target/arm/translate.c
+1
-23
target/arm/translate.c
···
5432
5432
case NEON_3R_VPMAX:
5433
5433
case NEON_3R_VPMIN:
5434
5434
case NEON_3R_VPADD_VQRDMLAH:
5435
+
case NEON_3R_VQDMULH_VQRDMULH:
5435
5436
/* Already handled by decodetree */
5436
5437
return 1;
5437
5438
}
···
5496
5497
tmp2 = neon_load_reg(rm, pass);
5497
5498
}
5498
5499
switch (op) {
5499
-
case NEON_3R_VQDMULH_VQRDMULH: /* Multiply high. */
5500
-
if (!u) { /* VQDMULH */
5501
-
switch (size) {
5502
-
case 1:
5503
-
gen_helper_neon_qdmulh_s16(tmp, cpu_env, tmp, tmp2);
5504
-
break;
5505
-
case 2:
5506
-
gen_helper_neon_qdmulh_s32(tmp, cpu_env, tmp, tmp2);
5507
-
break;
5508
-
default: abort();
5509
-
}
5510
-
} else { /* VQRDMULH */
5511
-
switch (size) {
5512
-
case 1:
5513
-
gen_helper_neon_qrdmulh_s16(tmp, cpu_env, tmp, tmp2);
5514
-
break;
5515
-
case 2:
5516
-
gen_helper_neon_qrdmulh_s32(tmp, cpu_env, tmp, tmp2);
5517
-
break;
5518
-
default: abort();
5519
-
}
5520
-
}
5521
-
break;
5522
5500
case NEON_3R_FLOAT_ARITH: /* Floating point arithmetic. */
5523
5501
{
5524
5502
TCGv_ptr fpstatus = get_fpstatus_ptr(1);