+11 -11

block/bochs.c

··· 85 85 const struct bochs_header *bochs = (const void *)buf; 86 86 87 87 if (buf_size < HEADER_SIZE) 88 88 - return 0; 88 88 + return 0; 89 89 90 90 if (!strcmp(bochs->magic, HEADER_MAGIC) && 91 91 - !strcmp(bochs->type, REDOLOG_TYPE) && 92 92 - !strcmp(bochs->subtype, GROWING_TYPE) && 93 93 - ((le32_to_cpu(bochs->version) == HEADER_VERSION) || 94 94 - (le32_to_cpu(bochs->version) == HEADER_V1))) 95 95 - return 100; 91 91 + !strcmp(bochs->type, REDOLOG_TYPE) && 92 92 + !strcmp(bochs->subtype, GROWING_TYPE) && 93 93 + ((le32_to_cpu(bochs->version) == HEADER_VERSION) || 94 94 + (le32_to_cpu(bochs->version) == HEADER_V1))) 95 95 + return 100; 96 96 97 97 return 0; 98 98 } ··· 125 125 if (strcmp(bochs.magic, HEADER_MAGIC) || 126 126 strcmp(bochs.type, REDOLOG_TYPE) || 127 127 strcmp(bochs.subtype, GROWING_TYPE) || 128 128 - ((le32_to_cpu(bochs.version) != HEADER_VERSION) && 129 129 - (le32_to_cpu(bochs.version) != HEADER_V1))) { 128 128 + ((le32_to_cpu(bochs.version) != HEADER_VERSION) && 129 129 + (le32_to_cpu(bochs.version) != HEADER_V1))) { 130 130 error_setg(errp, "Image not in Bochs format"); 131 131 return -EINVAL; 132 132 } ··· 158 158 } 159 159 160 160 for (i = 0; i < s->catalog_size; i++) 161 161 - le32_to_cpus(&s->catalog_bitmap[i]); 161 161 + le32_to_cpus(&s->catalog_bitmap[i]); 162 162 163 163 s->data_offset = le32_to_cpu(bochs.header) + (s->catalog_size * 4); 164 164 ··· 217 217 extent_offset = (offset % s->extent_size) / 512; 218 218 219 219 if (s->catalog_bitmap[extent_index] == 0xffffffff) { 220 220 - return 0; /* not allocated */ 220 220 + return 0; /* not allocated */ 221 221 } 222 222 223 223 bitmap_offset = s->data_offset + ··· 232 232 } 233 233 234 234 if (!((bitmap_entry >> (extent_offset % 8)) & 1)) { 235 235 - return 0; /* not allocated */ 235 235 + return 0; /* not allocated */ 236 236 } 237 237 238 238 return bitmap_offset + (512 * (s->bitmap_blocks + extent_offset));

+1 -1

block/file-posix.c

··· 2083 2083 #endif 2084 2084 if (!fstat(fd, &sb) && (S_IFCHR & sb.st_mode)) { 2085 2085 #ifdef DIOCGMEDIASIZE 2086 2086 - if (ioctl(fd, DIOCGMEDIASIZE, (off_t *)&size)) 2086 2086 + if (ioctl(fd, DIOCGMEDIASIZE, (off_t *)&size)) 2087 2087 #elif defined(DIOCGPART) 2088 2088 { 2089 2089 struct partinfo pi;

+4 -4

block/file-win32.c

··· 176 176 BOOL res; 177 177 178 178 if ((GetVersion() & 0x80000000UL) && (length >> 32) != 0) 179 179 - return -1; 179 179 + return -1; 180 180 181 181 h = (HANDLE)_get_osfhandle(fd); 182 182 ··· 184 184 li.HighPart = 0; 185 185 li.LowPart = SetFilePointer (h, 0, &li.HighPart, FILE_CURRENT); 186 186 if (li.LowPart == INVALID_SET_FILE_POINTER && GetLastError() != NO_ERROR) { 187 187 - return -1; 187 187 + return -1; 188 188 } 189 189 190 190 high = length >> 32; 191 191 dw = SetFilePointer(h, (DWORD) length, &high, FILE_BEGIN); 192 192 if (dw == INVALID_SET_FILE_POINTER && GetLastError() != NO_ERROR) { 193 193 - return -1; 193 193 + return -1; 194 194 } 195 195 res = SetEndOfFile(h); 196 196 ··· 203 203 { 204 204 DWORD returned; 205 205 return (int) DeviceIoControl((HANDLE)_get_osfhandle(fd), FSCTL_SET_SPARSE, 206 206 - NULL, 0, NULL, 0, &returned, NULL); 206 206 + NULL, 0, NULL, 0, &returned, NULL); 207 207 } 208 208 209 209 static void raw_detach_aio_context(BlockDriverState *bs)

+2 -2

block/linux-aio.c

··· 384 384 switch (type) { 385 385 case QEMU_AIO_WRITE: 386 386 io_prep_pwritev(iocbs, fd, qiov->iov, qiov->niov, offset); 387 387 - break; 387 387 + break; 388 388 case QEMU_AIO_READ: 389 389 io_prep_preadv(iocbs, fd, qiov->iov, qiov->niov, offset); 390 390 - break; 390 390 + break; 391 391 /* Currently Linux kernel does not support other operations */ 392 392 default: 393 393 fprintf(stderr, "%s: invalid AIO request type 0x%x.\n",

+1 -1

block/qcow2-cluster.c

··· 402 402 } 403 403 } 404 404 405 405 - return i; 405 405 + return i; 406 406 } 407 407 408 408 /*

+1 -1

block/vpc.c

··· 187 187 static int vpc_probe(const uint8_t *buf, int buf_size, const char *filename) 188 188 { 189 189 if (buf_size >= 8 && !strncmp((char *)buf, "conectix", 8)) 190 190 - return 100; 190 190 + return 100; 191 191 return 0; 192 192 } 193 193

+1 -1

bsd-user/elfload.c

··· 1367 1367 if (!have_guest_base) { 1368 1368 /* 1369 1369 * Go through ELF program header table and find out whether 1370 1370 - * any of the segments drop below our current mmap_min_addr and 1370 1370 + * any of the segments drop below our current mmap_min_addr and 1371 1371 * in that case set guest_base to corresponding address. 1372 1372 */ 1373 1373 for (i = 0, elf_ppnt = elf_phdata; i < elf_ex.e_phnum;

+1 -1

contrib/elf2dmp/main.c

··· 296 296 static int fill_context(KDDEBUGGER_DATA64 *kdbg, 297 297 struct va_space *vs, QEMU_Elf *qe) 298 298 { 299 299 - int i; 299 299 + int i; 300 300 for (i = 0; i < qe->state_nr; i++) { 301 301 uint64_t Prcb; 302 302 uint64_t Context;

+6 -6

hw/alpha/typhoon.c

··· 664 664 pte_addr |= (addr & (wsm | 0xfe000)) >> 10; 665 665 return pte_translate(pte_addr, ret); 666 666 } else { 667 667 - /* Direct-mapped translation. */ 668 668 - return make_iommu_tlbe(tba & ~wsm_ext, wsm_ext, ret); 667 667 + /* Direct-mapped translation. */ 668 668 + return make_iommu_tlbe(tba & ~wsm_ext, wsm_ext, ret); 669 669 } 670 670 } 671 671 ··· 700 700 701 701 /* Check the fourth window for DAC disable. */ 702 702 if ((pchip->win[3].wba & 0x80000000000ull) == 0 703 703 - && window_translate(&pchip->win[3], addr, &ret)) { 703 703 + && window_translate(&pchip->win[3], addr, &ret)) { 704 704 goto success; 705 705 } 706 706 } else { ··· 711 711 if (pchip->ctl & 0x40) { 712 712 /* See 10.1.4.4; in particular <39:35> is ignored. */ 713 713 make_iommu_tlbe(0, 0x007ffffffffull, &ret); 714 714 - goto success; 714 714 + goto success; 715 715 } 716 716 } 717 717 ··· 723 723 pte_addr = pchip->win[3].tba & 0x7ffc00000ull; 724 724 pte_addr |= (addr & 0xffffe000u) >> 10; 725 725 if (pte_translate(pte_addr, &ret)) { 726 726 - goto success; 727 727 - } 726 726 + goto success; 727 727 + } 728 728 } 729 729 } 730 730 }

+1 -1

hw/arm/stellaris.c

··· 131 131 s->state |= 1; 132 132 if ((s->control & 0x20)) { 133 133 /* Output trigger. */ 134 134 - qemu_irq_pulse(s->trigger); 134 134 + qemu_irq_pulse(s->trigger); 135 135 } 136 136 if (s->mode[0] & 1) { 137 137 /* One-shot. */

+9 -9

hw/char/sh_serial.c

··· 90 90 91 91 #ifdef DEBUG_SERIAL 92 92 printf("sh_serial: write offs=0x%02x val=0x%02x\n", 93 93 - offs, val); 93 93 + offs, val); 94 94 #endif 95 95 switch(offs) { 96 96 case 0x00: /* SMR */ ··· 98 98 return; 99 99 case 0x04: /* BRR */ 100 100 s->brr = val; 101 101 - return; 101 101 + return; 102 102 case 0x08: /* SCR */ 103 103 /* TODO : For SH7751, SCIF mask should be 0xfb. */ 104 104 s->scr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0xfa : 0xff); 105 105 if (!(val & (1 << 5))) 106 106 s->flags |= SH_SERIAL_FLAG_TEND; 107 107 if ((s->feat & SH_SERIAL_FEAT_SCIF) && s->txi) { 108 108 - qemu_set_irq(s->txi, val & (1 << 7)); 108 108 + qemu_set_irq(s->txi, val & (1 << 7)); 109 109 } 110 110 if (!(val & (1 << 6))) { 111 111 - qemu_set_irq(s->rxi, 0); 111 111 + qemu_set_irq(s->rxi, 0); 112 112 } 113 113 return; 114 114 case 0x0c: /* FTDR / TDR */ ··· 117 117 /* XXX this blocks entire thread. Rewrite to use 118 118 * qemu_chr_fe_write and background I/O callbacks */ 119 119 qemu_chr_fe_write_all(&s->chr, &ch, 1); 120 120 - } 121 121 - s->dr = val; 122 122 - s->flags &= ~SH_SERIAL_FLAG_TDE; 120 120 + } 121 121 + s->dr = val; 122 122 + s->flags &= ~SH_SERIAL_FLAG_TDE; 123 123 return; 124 124 #if 0 125 125 case 0x14: /* FRDR / RDR */ ··· 210 210 break; 211 211 case 0x04: 212 212 ret = s->brr; 213 213 - break; 213 213 + break; 214 214 case 0x08: 215 215 ret = s->scr; 216 216 break; ··· 288 288 } 289 289 #ifdef DEBUG_SERIAL 290 290 printf("sh_serial: read offs=0x%02x val=0x%x\n", 291 291 - offs, ret); 291 291 + offs, ret); 292 292 #endif 293 293 294 294 if (ret & ~((1 << 16) - 1)) {

+1 -1

hw/char/virtio-serial-bus.c

··· 696 696 qemu_put_byte(f, port->guest_connected); 697 697 qemu_put_byte(f, port->host_connected); 698 698 699 699 - elem_popped = 0; 699 699 + elem_popped = 0; 700 700 if (port->elem) { 701 701 elem_popped = 1; 702 702 }

+29 -29

hw/char/xen_console.c

··· 60 60 61 61 size = prod - cons; 62 62 if ((size == 0) || (size > sizeof(intf->out))) 63 63 - return; 63 63 + return; 64 64 65 65 if ((buffer->capacity - buffer->size) < size) { 66 66 - buffer->capacity += (size + 1024); 67 67 - buffer->data = g_realloc(buffer->data, buffer->capacity); 66 66 + buffer->capacity += (size + 1024); 67 67 + buffer->data = g_realloc(buffer->data, buffer->capacity); 68 68 } 69 69 70 70 while (cons != prod) 71 71 - buffer->data[buffer->size++] = intf->out[ 72 72 - MASK_XENCONS_IDX(cons++, intf->out)]; 71 71 + buffer->data[buffer->size++] = intf->out[ 72 72 + MASK_XENCONS_IDX(cons++, intf->out)]; 73 73 74 74 xen_mb(); 75 75 intf->out_cons = cons; 76 76 xen_pv_send_notify(&con->xendev); 77 77 78 78 if (buffer->max_capacity && 79 79 - buffer->size > buffer->max_capacity) { 80 80 - /* Discard the middle of the data. */ 79 79 + buffer->size > buffer->max_capacity) { 80 80 + /* Discard the middle of the data. */ 81 81 82 82 - size_t over = buffer->size - buffer->max_capacity; 83 83 - uint8_t *maxpos = buffer->data + buffer->max_capacity; 82 82 + size_t over = buffer->size - buffer->max_capacity; 83 83 + uint8_t *maxpos = buffer->data + buffer->max_capacity; 84 84 85 85 - memmove(maxpos - over, maxpos, over); 86 86 - buffer->data = g_realloc(buffer->data, buffer->max_capacity); 87 87 - buffer->size = buffer->capacity = buffer->max_capacity; 85 85 + memmove(maxpos - over, maxpos, over); 86 86 + buffer->data = g_realloc(buffer->data, buffer->max_capacity); 87 87 + buffer->size = buffer->capacity = buffer->max_capacity; 88 88 89 89 - if (buffer->consumed > buffer->max_capacity - over) 90 90 - buffer->consumed = buffer->max_capacity - over; 89 89 + if (buffer->consumed > buffer->max_capacity - over) 90 90 + buffer->consumed = buffer->max_capacity - over; 91 91 } 92 92 } 93 93 ··· 95 95 { 96 96 buffer->consumed += len; 97 97 if (buffer->consumed == buffer->size) { 98 98 - buffer->consumed = 0; 99 99 - buffer->size = 0; 98 98 + buffer->consumed = 0; 99 99 + buffer->size = 0; 100 100 } 101 101 } 102 102 ··· 111 111 112 112 space = prod - cons; 113 113 if (space > sizeof(intf->in)) 114 114 - return 0; /* ring is screwed: ignore it */ 114 114 + return 0; /* ring is screwed: ignore it */ 115 115 116 116 return (sizeof(intf->in) - space); 117 117 } ··· 132 132 max = ring_free_bytes(con); 133 133 /* The can_receive() func limits this, but check again anyway */ 134 134 if (max < len) 135 135 - len = max; 135 135 + len = max; 136 136 137 137 prod = intf->in_prod; 138 138 for (i = 0; i < len; i++) { 139 139 - intf->in[MASK_XENCONS_IDX(prod++, intf->in)] = 140 140 - buf[i]; 139 139 + intf->in[MASK_XENCONS_IDX(prod++, intf->in)] = 140 140 + buf[i]; 141 141 } 142 142 xen_wmb(); 143 143 intf->in_prod = prod; ··· 228 228 int limit; 229 229 230 230 if (xenstore_read_int(con->console, "ring-ref", &con->ring_ref) == -1) 231 231 - return -1; 231 231 + return -1; 232 232 if (xenstore_read_int(con->console, "port", &con->xendev.remote_port) == -1) 233 233 - return -1; 233 233 + return -1; 234 234 if (xenstore_read_int(con->console, "limit", &limit) == 0) 235 235 - con->buffer.max_capacity = limit; 235 235 + con->buffer.max_capacity = limit; 236 236 237 237 if (!xendev->dev) { 238 238 xen_pfn_t mfn = con->ring_ref; ··· 244 244 PROT_READ | PROT_WRITE); 245 245 } 246 246 if (!con->sring) 247 247 - return -1; 247 247 + return -1; 248 248 249 249 xen_be_bind_evtchn(&con->xendev); 250 250 qemu_chr_fe_set_handlers(&con->chr, xencons_can_receive, ··· 252 252 253 253 xen_pv_printf(xendev, 1, 254 254 "ring mfn %d, remote port %d, local port %d, limit %zd\n", 255 255 - con->ring_ref, 256 256 - con->xendev.remote_port, 257 257 - con->xendev.local_port, 258 258 - con->buffer.max_capacity); 255 255 + con->ring_ref, 256 256 + con->xendev.remote_port, 257 257 + con->xendev.local_port, 258 258 + con->buffer.max_capacity); 259 259 return 0; 260 260 } 261 261 ··· 282 282 283 283 buffer_append(con); 284 284 if (con->buffer.size - con->buffer.consumed) 285 285 - xencons_send(con); 285 285 + xencons_send(con); 286 286 } 287 287 288 288 /* -------------------------------------------------------------------- */

+14 -14

hw/core/loader.c

··· 244 244 case OMAGIC: 245 245 if (e.a_text + e.a_data > max_sz) 246 246 goto fail; 247 247 - lseek(fd, N_TXTOFF(e), SEEK_SET); 248 248 - size = read_targphys(filename, fd, addr, e.a_text + e.a_data); 249 249 - if (size < 0) 250 250 - goto fail; 251 251 - break; 247 247 + lseek(fd, N_TXTOFF(e), SEEK_SET); 248 248 + size = read_targphys(filename, fd, addr, e.a_text + e.a_data); 249 249 + if (size < 0) 250 250 + goto fail; 251 251 + break; 252 252 case NMAGIC: 253 253 if (N_DATADDR(e, target_page_size) + e.a_data > max_sz) 254 254 goto fail; 255 255 - lseek(fd, N_TXTOFF(e), SEEK_SET); 256 256 - size = read_targphys(filename, fd, addr, e.a_text); 257 257 - if (size < 0) 258 258 - goto fail; 255 255 + lseek(fd, N_TXTOFF(e), SEEK_SET); 256 256 + size = read_targphys(filename, fd, addr, e.a_text); 257 257 + if (size < 0) 258 258 + goto fail; 259 259 ret = read_targphys(filename, fd, addr + N_DATADDR(e, target_page_size), 260 260 e.a_data); 261 261 - if (ret < 0) 262 262 - goto fail; 263 263 - size += ret; 264 264 - break; 261 261 + if (ret < 0) 262 262 + goto fail; 263 263 + size += ret; 264 264 + break; 265 265 default: 266 266 - goto fail; 266 266 + goto fail; 267 267 } 268 268 close(fd); 269 269 return size;

+3 -3

hw/display/tc6393xb.c

··· 319 319 SCR_REG_B(DEBUG); 320 320 } 321 321 fprintf(stderr, "tc6393xb_scr: unhandled write at %08x: %02x\n", 322 322 - (uint32_t) addr, value & 0xff); 322 322 + (uint32_t) addr, value & 0xff); 323 323 } 324 324 #undef SCR_REG_B 325 325 #undef SCR_REG_W ··· 358 358 return; 359 359 } 360 360 fprintf(stderr, "tc6393xb_nand_cfg: unhandled write at %08x: %02x\n", 361 361 - (uint32_t) addr, value & 0xff); 361 361 + (uint32_t) addr, value & 0xff); 362 362 } 363 363 364 364 static uint32_t tc6393xb_nand_readb(TC6393xbState *s, hwaddr addr) { ··· 421 421 return; 422 422 } 423 423 fprintf(stderr, "tc6393xb_nand: unhandled write at %08x: %02x\n", 424 424 - (uint32_t) addr, value & 0xff); 424 424 + (uint32_t) addr, value & 0xff); 425 425 } 426 426 427 427 #define BITS 8

+4 -4

hw/display/vga.c

··· 85 85 86 86 #define cbswap_32(__x) \ 87 87 ((uint32_t)( \ 88 88 - (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \ 89 89 - (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \ 90 90 - (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \ 91 91 - (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) )) 88 88 + (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \ 89 89 + (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \ 90 90 + (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \ 91 91 + (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) )) 92 92 93 93 #ifdef HOST_WORDS_BIGENDIAN 94 94 #define PAT(x) cbswap_32(x)

+3 -3

hw/display/virtio-gpu-3d.c

··· 498 498 499 499 QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) { 500 500 /* 501 501 - * the guest can end up emitting fences out of order 502 502 - * so we should check all fenced cmds not just the first one. 503 503 - */ 501 501 + * the guest can end up emitting fences out of order 502 502 + * so we should check all fenced cmds not just the first one. 503 503 + */ 504 504 if (cmd->cmd_hdr.fence_id > fence) { 505 505 continue; 506 506 }

+2 -2

hw/dma/pxa2xx_dma.c

··· 228 228 !(ch->state & DCSR_NODESCFETCH)) 229 229 pxa2xx_dma_descriptor_fetch(s, c); 230 230 break; 231 231 - } 231 231 + } 232 232 } 233 233 234 234 ch->cmd = (ch->cmd & ~DCMD_LEN) | length; ··· 283 283 284 284 case DCSR0 ... DCSR31: 285 285 channel = offset >> 2; 286 286 - if (s->chan[channel].request) 286 286 + if (s->chan[channel].request) 287 287 return s->chan[channel].state | DCSR_REQPEND; 288 288 return s->chan[channel].state; 289 289

+1 -1

hw/dma/soc_dma.c

··· 345 345 while (entry < dma->memmap + dma->memmap_size && 346 346 entry->addr <= virt_base) 347 347 entry ++; 348 348 - } 348 348 + } 349 349 350 350 memmove(entry + 1, entry, 351 351 (uint8_t *) (dma->memmap + dma->memmap_size ++) -

+1 -1

hw/gpio/max7310.c

··· 118 118 break; 119 119 120 120 case 0x00: /* Input port - ignore writes */ 121 121 - break; 121 121 + break; 122 122 default: 123 123 #ifdef VERBOSE 124 124 printf("%s: unknown register %02x\n", __func__, s->command);

+2 -2

hw/i386/xen/xen-hvm.c

··· 570 570 } 571 571 572 572 static void xen_device_realize(DeviceListener *listener, 573 573 - DeviceState *dev) 573 573 + DeviceState *dev) 574 574 { 575 575 XenIOState *state = container_of(listener, XenIOState, device_listener); 576 576 ··· 588 588 } 589 589 590 590 static void xen_device_unrealize(DeviceListener *listener, 591 591 - DeviceState *dev) 591 591 + DeviceState *dev) 592 592 { 593 593 XenIOState *state = container_of(listener, XenIOState, device_listener); 594 594

+47 -47

hw/ide/core.c

··· 575 575 int64_t sector_num; 576 576 if (s->select & 0x40) { 577 577 /* lba */ 578 578 - if (!s->lba48) { 579 579 - sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) | 580 580 - (s->lcyl << 8) | s->sector; 581 581 - } else { 582 582 - sector_num = ((int64_t)s->hob_hcyl << 40) | 583 583 - ((int64_t) s->hob_lcyl << 32) | 584 584 - ((int64_t) s->hob_sector << 24) | 585 585 - ((int64_t) s->hcyl << 16) | 586 586 - ((int64_t) s->lcyl << 8) | s->sector; 587 587 - } 578 578 + if (!s->lba48) { 579 579 + sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) | 580 580 + (s->lcyl << 8) | s->sector; 581 581 + } else { 582 582 + sector_num = ((int64_t)s->hob_hcyl << 40) | 583 583 + ((int64_t) s->hob_lcyl << 32) | 584 584 + ((int64_t) s->hob_sector << 24) | 585 585 + ((int64_t) s->hcyl << 16) | 586 586 + ((int64_t) s->lcyl << 8) | s->sector; 587 587 + } 588 588 } else { 589 589 sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors + 590 590 (s->select & 0x0f) * s->sectors + (s->sector - 1); ··· 596 596 { 597 597 unsigned int cyl, r; 598 598 if (s->select & 0x40) { 599 599 - if (!s->lba48) { 599 599 + if (!s->lba48) { 600 600 s->select = (s->select & 0xf0) | (sector_num >> 24); 601 601 s->hcyl = (sector_num >> 16); 602 602 s->lcyl = (sector_num >> 8); 603 603 s->sector = (sector_num); 604 604 - } else { 605 605 - s->sector = sector_num; 606 606 - s->lcyl = sector_num >> 8; 607 607 - s->hcyl = sector_num >> 16; 608 608 - s->hob_sector = sector_num >> 24; 609 609 - s->hob_lcyl = sector_num >> 32; 610 610 - s->hob_hcyl = sector_num >> 40; 611 611 - } 604 604 + } else { 605 605 + s->sector = sector_num; 606 606 + s->lcyl = sector_num >> 8; 607 607 + s->hcyl = sector_num >> 16; 608 608 + s->hob_sector = sector_num >> 24; 609 609 + s->hob_lcyl = sector_num >> 32; 610 610 + s->hob_hcyl = sector_num >> 40; 611 611 + } 612 612 } else { 613 613 cyl = sector_num / (s->heads * s->sectors); 614 614 r = sector_num % (s->heads * s->sectors); ··· 1188 1188 * full sector count in ->nsector and ignore ->hob_nsector from now 1189 1189 */ 1190 1190 if (!s->lba48) { 1191 1191 - if (!s->nsector) 1192 1192 - s->nsector = 256; 1191 1191 + if (!s->nsector) 1192 1192 + s->nsector = 256; 1193 1193 } else { 1194 1194 - if (!s->nsector && !s->hob_nsector) 1195 1195 - s->nsector = 65536; 1196 1196 - else { 1197 1197 - int lo = s->nsector; 1198 1198 - int hi = s->hob_nsector; 1194 1194 + if (!s->nsector && !s->hob_nsector) 1195 1195 + s->nsector = 65536; 1196 1196 + else { 1197 1197 + int lo = s->nsector; 1198 1198 + int hi = s->hob_nsector; 1199 1199 1200 1200 - s->nsector = (hi << 8) | lo; 1201 1201 - } 1200 1200 + s->nsector = (hi << 8) | lo; 1201 1201 + } 1202 1202 } 1203 1203 } 1204 1204 ··· 1258 1258 bus->ifs[1].feature = val; 1259 1259 break; 1260 1260 case ATA_IOPORT_WR_SECTOR_COUNT: 1261 1261 - ide_clear_hob(bus); 1262 1262 - bus->ifs[0].hob_nsector = bus->ifs[0].nsector; 1263 1263 - bus->ifs[1].hob_nsector = bus->ifs[1].nsector; 1261 1261 + ide_clear_hob(bus); 1262 1262 + bus->ifs[0].hob_nsector = bus->ifs[0].nsector; 1263 1263 + bus->ifs[1].hob_nsector = bus->ifs[1].nsector; 1264 1264 bus->ifs[0].nsector = val; 1265 1265 bus->ifs[1].nsector = val; 1266 1266 break; 1267 1267 case ATA_IOPORT_WR_SECTOR_NUMBER: 1268 1268 - ide_clear_hob(bus); 1269 1269 - bus->ifs[0].hob_sector = bus->ifs[0].sector; 1270 1270 - bus->ifs[1].hob_sector = bus->ifs[1].sector; 1268 1268 + ide_clear_hob(bus); 1269 1269 + bus->ifs[0].hob_sector = bus->ifs[0].sector; 1270 1270 + bus->ifs[1].hob_sector = bus->ifs[1].sector; 1271 1271 bus->ifs[0].sector = val; 1272 1272 bus->ifs[1].sector = val; 1273 1273 break; 1274 1274 case ATA_IOPORT_WR_CYLINDER_LOW: 1275 1275 - ide_clear_hob(bus); 1276 1276 - bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl; 1277 1277 - bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl; 1275 1275 + ide_clear_hob(bus); 1276 1276 + bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl; 1277 1277 + bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl; 1278 1278 bus->ifs[0].lcyl = val; 1279 1279 bus->ifs[1].lcyl = val; 1280 1280 break; 1281 1281 case ATA_IOPORT_WR_CYLINDER_HIGH: 1282 1282 - ide_clear_hob(bus); 1283 1283 - bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl; 1284 1284 - bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl; 1282 1282 + ide_clear_hob(bus); 1283 1283 + bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl; 1284 1284 + bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl; 1285 1285 bus->ifs[0].hcyl = val; 1286 1286 bus->ifs[1].hcyl = val; 1287 1287 break; 1288 1288 case ATA_IOPORT_WR_DEVICE_HEAD: 1289 1289 - /* FIXME: HOB readback uses bit 7 */ 1289 1289 + /* FIXME: HOB readback uses bit 7 */ 1290 1290 bus->ifs[0].select = (val & ~0x10) | 0xa0; 1291 1291 bus->ifs[1].select = (val | 0x10) | 0xa0; 1292 1292 /* select drive */ ··· 2146 2146 } else if (!hob) { 2147 2147 ret = s->error; 2148 2148 } else { 2149 2149 - ret = s->hob_feature; 2149 2149 + ret = s->hob_feature; 2150 2150 } 2151 2151 break; 2152 2152 case ATA_IOPORT_RR_SECTOR_COUNT: ··· 2155 2155 } else if (!hob) { 2156 2156 ret = s->nsector & 0xff; 2157 2157 } else { 2158 2158 - ret = s->hob_nsector; 2158 2158 + ret = s->hob_nsector; 2159 2159 } 2160 2160 break; 2161 2161 case ATA_IOPORT_RR_SECTOR_NUMBER: ··· 2164 2164 } else if (!hob) { 2165 2165 ret = s->sector; 2166 2166 } else { 2167 2167 - ret = s->hob_sector; 2167 2167 + ret = s->hob_sector; 2168 2168 } 2169 2169 break; 2170 2170 case ATA_IOPORT_RR_CYLINDER_LOW: ··· 2173 2173 } else if (!hob) { 2174 2174 ret = s->lcyl; 2175 2175 } else { 2176 2176 - ret = s->hob_lcyl; 2176 2176 + ret = s->hob_lcyl; 2177 2177 } 2178 2178 break; 2179 2179 case ATA_IOPORT_RR_CYLINDER_HIGH: ··· 2182 2182 } else if (!hob) { 2183 2183 ret = s->hcyl; 2184 2184 } else { 2185 2185 - ret = s->hob_hcyl; 2185 2185 + ret = s->hob_hcyl; 2186 2186 } 2187 2187 break; 2188 2188 case ATA_IOPORT_RR_DEVICE_HEAD: ··· 2847 2847 .fields = (VMStateField[]) { 2848 2848 VMSTATE_INT32(req_nb_sectors, IDEState), 2849 2849 VMSTATE_VARRAY_INT32(io_buffer, IDEState, io_buffer_total_len, 1, 2850 2850 - vmstate_info_uint8, uint8_t), 2850 2850 + vmstate_info_uint8, uint8_t), 2851 2851 VMSTATE_INT32(cur_io_buffer_offset, IDEState), 2852 2852 VMSTATE_INT32(cur_io_buffer_len, IDEState), 2853 2853 VMSTATE_UINT8(end_transfer_fn_idx, IDEState),

+1 -1

hw/input/lm832x.c

··· 66 66 67 67 struct { 68 68 uint16_t file[256]; 69 69 - uint8_t faddr; 69 69 + uint8_t faddr; 70 70 uint8_t addr[3]; 71 71 QEMUTimer *tm[3]; 72 72 } pwm;

+1 -1

hw/input/pckbd.c

··· 55 55 #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */ 56 56 #define KBD_CCMD_WRITE_OBUF 0xD2 57 57 #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if 58 58 - initiated by the auxiliary device */ 58 58 + initiated by the auxiliary device */ 59 59 #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */ 60 60 #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */ 61 61 #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */

+1 -1

hw/input/tsc210x.c

··· 577 577 case 0x01: /* Status / Keypad Control */ 578 578 if ((s->model & 0xff00) == 0x2100) 579 579 s->pin_func = value >> 14; 580 580 - else { 580 580 + else { 581 581 s->kb.scan = (value >> 14) & 1; 582 582 s->kb.debounce = (value >> 11) & 7; 583 583 if (s->kb.intr && s->kb.scan) {

+1 -1

hw/intc/apic.c

··· 442 442 443 443 for (i = 0; i < MAX_APICS; i++) { 444 444 apic = local_apics[i]; 445 445 - if (apic && apic->id == dest) 445 445 + if (apic && apic->id == dest) 446 446 return i; 447 447 if (!apic) 448 448 break;

+3 -3

hw/mips/gt64xxx_pci.c

··· 395 395 s->regs[GT_CPU] = val; 396 396 break; 397 397 case GT_MULTI: 398 398 - /* Read-only register as only one GT64xxx is present on the CPU bus */ 398 398 + /* Read-only register as only one GT64xxx is present on the CPU bus */ 399 399 break; 400 400 401 401 /* CPU Address Decode */ ··· 457 457 case GT_CPUERR_DATALO: 458 458 case GT_CPUERR_DATAHI: 459 459 case GT_CPUERR_PARITY: 460 460 - /* Read-only registers, do nothing */ 460 460 + /* Read-only registers, do nothing */ 461 461 break; 462 462 463 463 /* CPU Sync Barrier */ 464 464 case GT_PCI0SYNC: 465 465 case GT_PCI1SYNC: 466 466 - /* Read-only registers, do nothing */ 466 466 + /* Read-only registers, do nothing */ 467 467 break; 468 468 469 469 /* SDRAM and Device Address Decode */

+2 -2

hw/mips/mips_r4k.c

··· 239 239 sector_len, mips_rom / sector_len, 240 240 4, 0, 0, 0, 0, be)) { 241 241 fprintf(stderr, "qemu: Error registering flash memory.\n"); 242 242 - } 242 242 + } 243 243 } else if (!qtest_enabled()) { 244 244 /* not fatal */ 245 245 warn_report("could not load MIPS bios '%s'", bios_name); ··· 285 285 for(i = 0; i < MAX_IDE_BUS; i++) 286 286 isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], 287 287 hd[MAX_IDE_DEVS * i], 288 288 - hd[MAX_IDE_DEVS * i + 1]); 288 288 + hd[MAX_IDE_DEVS * i + 1]); 289 289 290 290 isa_create_simple(isa_bus, TYPE_I8042); 291 291 }

+3 -3

hw/misc/max111x.c

··· 43 43 #define CB_START (1 << 7) 44 44 45 45 #define CHANNEL_NUM(v, b0, b1, b2) \ 46 46 - ((((v) >> (2 + (b0))) & 4) | \ 47 47 - (((v) >> (3 + (b1))) & 2) | \ 48 48 - (((v) >> (4 + (b2))) & 1)) 46 46 + ((((v) >> (2 + (b0))) & 4) | \ 47 47 + (((v) >> (3 + (b1))) & 2) | \ 48 48 + (((v) >> (4 + (b2))) & 1)) 49 49 50 50 static uint32_t max111x_read(MAX111xState *s) 51 51 {

+2 -2

hw/misc/omap_l4.c

··· 112 112 113 113 struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus, 114 114 const struct omap_l4_region_s *regions, 115 115 - const struct omap_l4_agent_info_s *agents, 116 116 - int cs) 115 115 + const struct omap_l4_agent_info_s *agents, 116 116 + int cs) 117 117 { 118 118 int i; 119 119 struct omap_target_agent_s *ta = NULL;

+8 -8

hw/net/mipsnet.c

··· 112 112 addr &= 0x3f; 113 113 switch (addr) { 114 114 case MIPSNET_DEV_ID: 115 115 - ret = be32_to_cpu(0x4d495053); /* MIPS */ 115 115 + ret = be32_to_cpu(0x4d495053); /* MIPS */ 116 116 break; 117 117 case MIPSNET_DEV_ID + 4: 118 118 - ret = be32_to_cpu(0x4e455430); /* NET0 */ 118 118 + ret = be32_to_cpu(0x4e455430); /* NET0 */ 119 119 break; 120 120 case MIPSNET_BUSY: 121 121 - ret = s->busy; 121 121 + ret = s->busy; 122 122 break; 123 123 case MIPSNET_RX_DATA_COUNT: 124 124 - ret = s->rx_count; 124 124 + ret = s->rx_count; 125 125 break; 126 126 case MIPSNET_TX_DATA_COUNT: 127 127 - ret = s->tx_count; 127 127 + ret = s->tx_count; 128 128 break; 129 129 case MIPSNET_INT_CTL: 130 130 - ret = s->intctl; 130 130 + ret = s->intctl; 131 131 s->intctl &= ~MIPSNET_INTCTL_TESTBIT; 132 132 break; 133 133 case MIPSNET_INTERRUPT_INFO: 134 134 /* XXX: This seems to be a per-VPE interrupt number. */ 135 135 - ret = 0; 135 135 + ret = 0; 136 136 break; 137 137 case MIPSNET_RX_DATA_BUFFER: 138 138 if (s->rx_count) { ··· 161 161 trace_mipsnet_write(addr, val); 162 162 switch (addr) { 163 163 case MIPSNET_TX_DATA_COUNT: 164 164 - s->tx_count = (val <= MAX_ETH_FRAME_SIZE) ? val : 0; 164 164 + s->tx_count = (val <= MAX_ETH_FRAME_SIZE) ? val : 0; 165 165 s->tx_written = 0; 166 166 break; 167 167 case MIPSNET_INT_CTL:

+22 -22

hw/net/ne2000.c

··· 145 145 isr = (s->isr & s->imr) & 0x7f; 146 146 #if defined(DEBUG_NE2000) 147 147 printf("NE2000: Set IRQ to %d (%02x %02x)\n", 148 148 - isr ? 1 : 0, s->isr, s->imr); 148 148 + isr ? 1 : 0, s->isr, s->imr); 149 149 #endif 150 150 qemu_set_irq(s->irq, (isr != 0)); 151 151 } ··· 396 396 case EN0_ISR: 397 397 ret = s->isr; 398 398 break; 399 399 - case EN0_RSARLO: 400 400 - ret = s->rsar & 0x00ff; 401 401 - break; 402 402 - case EN0_RSARHI: 403 403 - ret = s->rsar >> 8; 404 404 - break; 399 399 + case EN0_RSARLO: 400 400 + ret = s->rsar & 0x00ff; 401 401 + break; 402 402 + case EN0_RSARHI: 403 403 + ret = s->rsar >> 8; 404 404 + break; 405 405 case EN1_PHYS ... EN1_PHYS + 5: 406 406 ret = s->phys[offset - EN1_PHYS]; 407 407 break; ··· 420 420 case EN2_STOPPG: 421 421 ret = s->stop >> 8; 422 422 break; 423 423 - case EN0_RTL8029ID0: 424 424 - ret = 0x50; 425 425 - break; 426 426 - case EN0_RTL8029ID1: 427 427 - ret = 0x43; 428 428 - break; 429 429 - case EN3_CONFIG0: 430 430 - ret = 0; /* 10baseT media */ 431 431 - break; 432 432 - case EN3_CONFIG2: 433 433 - ret = 0x40; /* 10baseT active */ 434 434 - break; 435 435 - case EN3_CONFIG3: 436 436 - ret = 0x40; /* Full duplex */ 437 437 - break; 423 423 + case EN0_RTL8029ID0: 424 424 + ret = 0x50; 425 425 + break; 426 426 + case EN0_RTL8029ID1: 427 427 + ret = 0x43; 428 428 + break; 429 429 + case EN3_CONFIG0: 430 430 + ret = 0; /* 10baseT media */ 431 431 + break; 432 432 + case EN3_CONFIG2: 433 433 + ret = 0x40; /* 10baseT active */ 434 434 + break; 435 435 + case EN3_CONFIG3: 436 436 + ret = 0x40; /* Full duplex */ 437 437 + break; 438 438 default: 439 439 ret = 0x00; 440 440 break;

+1 -1

hw/net/rocker/rocker.c

··· 1279 1279 for (i = 0; i < ROCKER_WORLD_TYPE_MAX; i++) { 1280 1280 if (strcmp(name, world_name(r->worlds[i])) == 0) { 1281 1281 return r->worlds[i]; 1282 1282 - } 1282 1282 + } 1283 1283 } 1284 1284 return NULL; 1285 1285 }

+2 -2

hw/net/virtio-net.c

··· 1375 1375 n->guest_hdr_len, -1); 1376 1376 if (out_num == VIRTQUEUE_MAX_SIZE) { 1377 1377 goto drop; 1378 1378 - } 1378 1378 + } 1379 1379 out_num += 1; 1380 1380 out_sg = sg2; 1381 1381 - } 1381 1381 + } 1382 1382 } 1383 1383 /* 1384 1384 * If host wants to see the guest header as is, we can

+3 -3

hw/net/vmxnet3.c

··· 137 137 OBJECT_GET_CLASS(VMXNET3Class, (obj), TYPE_VMXNET3) 138 138 139 139 static inline void vmxnet3_ring_init(PCIDevice *d, 140 140 - Vmxnet3Ring *ring, 140 140 + Vmxnet3Ring *ring, 141 141 hwaddr pa, 142 142 uint32_t size, 143 143 uint32_t cell_size, ··· 181 181 } 182 182 183 183 static inline void vmxnet3_ring_read_curr_cell(PCIDevice *d, Vmxnet3Ring *ring, 184 184 - void *buff) 184 184 + void *buff) 185 185 { 186 186 vmw_shmem_read(d, vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size); 187 187 } 188 188 189 189 static inline void vmxnet3_ring_write_curr_cell(PCIDevice *d, Vmxnet3Ring *ring, 190 190 - void *buff) 190 190 + void *buff) 191 191 { 192 192 vmw_shmem_write(d, vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size); 193 193 }

+1 -1

hw/pci/msix.c

··· 501 501 } 502 502 msix_clear_all_vectors(dev); 503 503 dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &= 504 504 - ~dev->wmask[dev->msix_cap + MSIX_CONTROL_OFFSET]; 504 504 + ~dev->wmask[dev->msix_cap + MSIX_CONTROL_OFFSET]; 505 505 memset(dev->msix_table, 0, dev->msix_entries_nr * PCI_MSIX_ENTRY_SIZE); 506 506 memset(dev->msix_pba, 0, QEMU_ALIGN_UP(dev->msix_entries_nr, 64) / 8); 507 507 msix_mask_all(dev, dev->msix_entries_nr);

+22 -22

hw/pci/pci.c

··· 211 211 212 212 static inline int pci_irq_state(PCIDevice *d, int irq_num) 213 213 { 214 214 - return (d->irq_state >> irq_num) & 0x1; 214 214 + return (d->irq_state >> irq_num) & 0x1; 215 215 } 216 216 217 217 static inline void pci_set_irq_state(PCIDevice *d, int irq_num, int level) 218 218 { 219 219 - d->irq_state &= ~(0x1 << irq_num); 220 220 - d->irq_state |= level << irq_num; 219 219 + d->irq_state &= ~(0x1 << irq_num); 220 220 + d->irq_state |= level << irq_num; 221 221 } 222 222 223 223 static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change) ··· 604 604 0, vmstate_info_pci_config, 605 605 PCIE_CONFIG_SPACE_SIZE), 606 606 VMSTATE_BUFFER_UNSAFE_INFO(irq_state, PCIDevice, 2, 607 607 - vmstate_info_pci_irq_state, 608 608 - PCI_NUM_PINS * sizeof(int32_t)), 607 607 + vmstate_info_pci_irq_state, 608 608 + PCI_NUM_PINS * sizeof(int32_t)), 609 609 VMSTATE_END_OF_LIST() 610 610 } 611 611 }; ··· 657 657 p = addr; 658 658 val = strtoul(p, &e, 16); 659 659 if (e == p) 660 660 - return -1; 660 660 + return -1; 661 661 if (*e == ':') { 662 662 - bus = val; 663 663 - p = e + 1; 664 664 - val = strtoul(p, &e, 16); 665 665 - if (e == p) 666 666 - return -1; 667 667 - if (*e == ':') { 668 668 - dom = bus; 669 669 - bus = val; 670 670 - p = e + 1; 671 671 - val = strtoul(p, &e, 16); 672 672 - if (e == p) 673 673 - return -1; 674 674 - } 662 662 + bus = val; 663 663 + p = e + 1; 664 664 + val = strtoul(p, &e, 16); 665 665 + if (e == p) 666 666 + return -1; 667 667 + if (*e == ':') { 668 668 + dom = bus; 669 669 + bus = val; 670 670 + p = e + 1; 671 671 + val = strtoul(p, &e, 16); 672 672 + if (e == p) 673 673 + return -1; 674 674 + } 675 675 } 676 676 677 677 slot = val; ··· 690 690 691 691 /* if funcp == NULL func is 0 */ 692 692 if (dom > 0xffff || bus > 0xff || slot > 0x1f || func > 7) 693 693 - return -1; 693 693 + return -1; 694 694 695 695 if (*e) 696 696 - return -1; 696 696 + return -1; 697 697 698 698 *domp = dom; 699 699 *busp = bus; ··· 1250 1250 } 1251 1251 1252 1252 static pcibus_t pci_bar_address(PCIDevice *d, 1253 1253 - int reg, uint8_t type, pcibus_t size) 1253 1253 + int reg, uint8_t type, pcibus_t size) 1254 1254 { 1255 1255 pcibus_t new_addr, last_addr; 1256 1256 int bar = pci_bar(d, reg);

+1 -1

hw/pci/pci_bridge.c

··· 369 369 * let users address the bus using the device name. 370 370 */ 371 371 if (!br->bus_name && dev->qdev.id && *dev->qdev.id) { 372 372 - br->bus_name = dev->qdev.id; 372 372 + br->bus_name = dev->qdev.id; 373 373 } 374 374 375 375 qbus_create_inplace(sec_bus, sizeof(br->sec_bus), typename, DEVICE(dev),

+1 -1

hw/ppc/ppc405_uc.c

··· 1885 1885 pic = ppcuic_init(env, irqs, 0x0C0, 0, 1); 1886 1886 *picp = pic; 1887 1887 /* SDRAM controller */ 1888 1888 - /* XXX 405EP has no ECC interrupt */ 1888 1888 + /* XXX 405EP has no ECC interrupt */ 1889 1889 ppc4xx_sdram_init(env, pic[17], 2, ram_memories, 1890 1890 ram_bases, ram_sizes, do_init); 1891 1891 /* External bus controller */

+2 -2

hw/ppc/prep.c

··· 538 538 nb_nics1 = NE2000_NB_MAX; 539 539 for(i = 0; i < nb_nics1; i++) { 540 540 if (nd_table[i].model == NULL) { 541 541 - nd_table[i].model = g_strdup("ne2k_isa"); 541 541 + nd_table[i].model = g_strdup("ne2k_isa"); 542 542 } 543 543 if (strcmp(nd_table[i].model, "ne2k_isa") == 0) { 544 544 isa_ne2000_init(isa_bus, ne2000_io[i], ne2000_irq[i], ··· 552 552 for(i = 0; i < MAX_IDE_BUS; i++) { 553 553 isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], 554 554 hd[2 * i], 555 555 - hd[2 * i + 1]); 555 555 + hd[2 * i + 1]); 556 556 } 557 557 558 558 cpu = POWERPC_CPU(first_cpu);

+3 -3

hw/scsi/lsi53c895a.c

··· 1850 1850 break; 1851 1851 case 0x0a: case 0x0b: 1852 1852 /* Openserver writes to these readonly registers on startup */ 1853 1853 - return; 1853 1853 + return; 1854 1854 case 0x0c: case 0x0d: case 0x0e: case 0x0f: 1855 1855 /* Linux writes to these readonly registers on startup. */ 1856 1856 return; ··· 1884 1884 /* nothing to do */ 1885 1885 break; 1886 1886 case 0x1a: /* CTEST2 */ 1887 1887 - s->ctest2 = val & LSI_CTEST2_PCICIE; 1888 1888 - break; 1887 1887 + s->ctest2 = val & LSI_CTEST2_PCICIE; 1888 1888 + break; 1889 1889 case 0x1b: /* CTEST3 */ 1890 1890 s->ctest3 = val & 0x0f; 1891 1891 break;

+8 -8

hw/sh4/r2d.c

··· 139 139 case PA_IRLMSK: 140 140 return s->irlmsk; 141 141 case PA_OUTPORT: 142 142 - return s->outport; 142 142 + return s->outport; 143 143 case PA_POWOFF: 144 144 - return 0x00; 144 144 + return 0x00; 145 145 case PA_VERREG: 146 146 - return 0x10; 146 146 + return 0x10; 147 147 } 148 148 149 149 return 0; ··· 158 158 case PA_IRLMSK: 159 159 s->irlmsk = value; 160 160 update_irl(s); 161 161 - break; 161 161 + break; 162 162 case PA_OUTPORT: 163 163 - s->outport = value; 164 164 - break; 163 163 + s->outport = value; 164 164 + break; 165 165 case PA_POWOFF: 166 166 if (value & 1) { 167 167 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 168 168 } 169 169 break; 170 170 case PA_VERREG: 171 171 - /* Discard writes */ 172 172 - break; 171 171 + /* Discard writes */ 172 172 + break; 173 173 } 174 174 } 175 175

+1 -1

hw/usb/dev-bluetooth.c

··· 46 46 47 47 struct usb_hci_out_fifo_s { 48 48 uint8_t data[4096]; 49 49 - int len; 49 49 + int len; 50 50 } outcmd, outacl, outsco; 51 51 }; 52 52

+3 -3

hw/usb/dev-hid.c

··· 592 592 switch (value >> 8) { 593 593 case 0x22: 594 594 if (hs->kind == HID_MOUSE) { 595 595 - memcpy(data, qemu_mouse_hid_report_descriptor, 596 596 - sizeof(qemu_mouse_hid_report_descriptor)); 595 595 + memcpy(data, qemu_mouse_hid_report_descriptor, 596 596 + sizeof(qemu_mouse_hid_report_descriptor)); 597 597 p->actual_length = sizeof(qemu_mouse_hid_report_descriptor); 598 598 } else if (hs->kind == HID_TABLET) { 599 599 memcpy(data, qemu_tablet_hid_report_descriptor, 600 600 - sizeof(qemu_tablet_hid_report_descriptor)); 600 600 + sizeof(qemu_tablet_hid_report_descriptor)); 601 601 p->actual_length = sizeof(qemu_tablet_hid_report_descriptor); 602 602 } else if (hs->kind == HID_KEYBOARD) { 603 603 memcpy(data, qemu_keyboard_hid_report_descriptor,

+7 -7

hw/usb/dev-hub.c

··· 147 147 148 148 static const uint8_t qemu_hub_hub_descriptor[] = 149 149 { 150 150 - 0x00, /* u8 bLength; patched in later */ 151 151 - 0x29, /* u8 bDescriptorType; Hub-descriptor */ 152 152 - 0x00, /* u8 bNbrPorts; (patched later) */ 153 153 - 0x0a, /* u16 wHubCharacteristics; */ 154 154 - 0x00, /* (per-port OC, no power switching) */ 155 155 - 0x01, /* u8 bPwrOn2pwrGood; 2ms */ 156 156 - 0x00 /* u8 bHubContrCurrent; 0 mA */ 150 150 + 0x00, /* u8 bLength; patched in later */ 151 151 + 0x29, /* u8 bDescriptorType; Hub-descriptor */ 152 152 + 0x00, /* u8 bNbrPorts; (patched later) */ 153 153 + 0x0a, /* u16 wHubCharacteristics; */ 154 154 + 0x00, /* (per-port OC, no power switching) */ 155 155 + 0x01, /* u8 bPwrOn2pwrGood; 2ms */ 156 156 + 0x00 /* u8 bHubContrCurrent; 0 mA */ 157 157 158 158 /* DeviceRemovable and PortPwrCtrlMask patched in later */ 159 159 };

+1 -1

hw/xen/xen_devconfig.c

··· 6 6 /* ------------------------------------------------------------- */ 7 7 8 8 static int xen_config_dev_dirs(const char *ftype, const char *btype, int vdev, 9 9 - char *fe, char *be, int len) 9 9 + char *fe, char *be, int len) 10 10 { 11 11 char *dom; 12 12

+4 -4

hw/xenpv/xen_domainbuild.c

··· 27 27 28 28 if (!xs_mkdir(xenstore, 0, path)) { 29 29 fprintf(stderr, "%s: xs_mkdir %s: failed\n", __func__, path); 30 30 - return -1; 30 30 + return -1; 31 31 } 32 32 if (!xs_set_permissions(xenstore, 0, path, perms_ro, 2)) { 33 33 fprintf(stderr, "%s: xs_set_permissions failed\n", __func__); 34 34 - return -1; 34 34 + return -1; 35 35 } 36 36 37 37 for (i = 0; writable[i]; i++) { ··· 82 82 83 83 /* cpus */ 84 84 for (i = 0; i < smp_cpus; i++) { 85 85 - snprintf(path, sizeof(path), "cpu/%d/availability",i); 86 86 - xenstore_write_str(dom, path, "online"); 85 85 + snprintf(path, sizeof(path), "cpu/%d/availability",i); 86 86 + xenstore_write_str(dom, path, "online"); 87 87 } 88 88 xenstore_write_int(vm, "vcpu_avail", smp_cpus); 89 89 xenstore_write_int(vm, "vcpus", smp_cpus);

+5 -5

include/elf.h

··· 782 782 /* ARM-specific values for sh_flags */ 783 783 #define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ 784 784 #define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined 785 785 - in the input to a link step */ 785 785 + in the input to a link step */ 786 786 787 787 /* ARM-specific program header flags */ 788 788 #define PF_ARM_SB 0x10000000 /* Segment contains the location 789 789 - addressed by the static base */ 789 789 + addressed by the static base */ 790 790 791 791 /* ARM relocs. */ 792 792 #define R_ARM_NONE 0 /* No reloc */ ··· 1047 1047 #define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ 1048 1048 #define R_X86_64_RELATIVE 8 /* Adjust by program base */ 1049 1049 #define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative 1050 1050 - offset to GOT */ 1050 1050 + offset to GOT */ 1051 1051 #define R_X86_64_32 10 /* Direct 32 bit zero extended */ 1052 1052 #define R_X86_64_32S 11 /* Direct 32 bit sign extended */ 1053 1053 #define R_X86_64_16 12 /* Direct 16 bit zero extended */ ··· 1070 1070 #define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */ 1071 1071 #define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */ 1072 1072 #define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch 1073 1073 - prediction. */ 1073 1073 + prediction. */ 1074 1074 #define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */ 1075 1075 #define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */ 1076 1076 ··· 1083 1083 /* Additional section indeces. */ 1084 1084 1085 1085 #define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared 1086 1086 - symbols in ANSI C. */ 1086 1086 + symbols in ANSI C. */ 1087 1087 #define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */ 1088 1088 1089 1089 /* Legal values for sh_type field of Elf32_Shdr. */

+7 -7

include/hw/acpi/acpi.h

··· 69 69 #define ACPI_BITMASK_WAKE_STATUS 0x8000 70 70 71 71 #define ACPI_BITMASK_ALL_FIXED_STATUS (\ 72 72 - ACPI_BITMASK_TIMER_STATUS | \ 73 73 - ACPI_BITMASK_BUS_MASTER_STATUS | \ 74 74 - ACPI_BITMASK_GLOBAL_LOCK_STATUS | \ 75 75 - ACPI_BITMASK_POWER_BUTTON_STATUS | \ 76 76 - ACPI_BITMASK_SLEEP_BUTTON_STATUS | \ 77 77 - ACPI_BITMASK_RT_CLOCK_STATUS | \ 78 78 - ACPI_BITMASK_WAKE_STATUS) 72 72 + ACPI_BITMASK_TIMER_STATUS | \ 73 73 + ACPI_BITMASK_BUS_MASTER_STATUS | \ 74 74 + ACPI_BITMASK_GLOBAL_LOCK_STATUS | \ 75 75 + ACPI_BITMASK_POWER_BUTTON_STATUS | \ 76 76 + ACPI_BITMASK_SLEEP_BUTTON_STATUS | \ 77 77 + ACPI_BITMASK_RT_CLOCK_STATUS | \ 78 78 + ACPI_BITMASK_WAKE_STATUS) 79 79 80 80 /* PM1x_EN */ 81 81 #define ACPI_BITMASK_TIMER_ENABLE 0x0001

+1 -1

include/hw/elf_ops.h

··· 343 343 } 344 344 345 345 if (pentry) 346 346 - *pentry = (uint64_t)(elf_sword)ehdr.e_entry; 346 346 + *pentry = (uint64_t)(elf_sword)ehdr.e_entry; 347 347 348 348 glue(load_symbols, SZ)(&ehdr, fd, must_swab, clear_lsb, sym_cb); 349 349

+1 -1

include/hw/ide/internal.h

··· 342 342 extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT]; 343 343 344 344 #define ide_cmd_is_read(s) \ 345 345 - ((s)->dma_cmd == IDE_DMA_READ) 345 345 + ((s)->dma_cmd == IDE_DMA_READ) 346 346 347 347 typedef struct IDEBufferedRequest { 348 348 QLIST_ENTRY(IDEBufferedRequest) list;

+10 -10

include/hw/sh4/sh_intc.h

··· 61 61 int sh_intc_get_pending_vector(struct intc_desc *desc, int imask); 62 62 struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id); 63 63 void sh_intc_toggle_source(struct intc_source *source, 64 64 - int enable_adj, int assert_adj); 64 64 + int enable_adj, int assert_adj); 65 65 66 66 void sh_intc_register_sources(struct intc_desc *desc, 67 67 - struct intc_vect *vectors, 68 68 - int nr_vectors, 69 69 - struct intc_group *groups, 70 70 - int nr_groups); 67 67 + struct intc_vect *vectors, 68 68 + int nr_vectors, 69 69 + struct intc_group *groups, 70 70 + int nr_groups); 71 71 72 72 int sh_intc_init(MemoryRegion *sysmem, 73 73 struct intc_desc *desc, 74 74 - int nr_sources, 75 75 - struct intc_mask_reg *mask_regs, 76 76 - int nr_mask_regs, 77 77 - struct intc_prio_reg *prio_regs, 78 78 - int nr_prio_regs); 74 74 + int nr_sources, 75 75 + struct intc_mask_reg *mask_regs, 76 76 + int nr_mask_regs, 77 77 + struct intc_prio_reg *prio_regs, 78 78 + int nr_prio_regs); 79 79 80 80 void sh_intc_set_irl(void *opaque, int n, int level); 81 81

+2 -2

include/hw/xen/io/ring.h

··· 235 235 * to be ineffective where _req is a struct which consists of only bitfields. 236 236 */ 237 237 #define RING_COPY_REQUEST(_r, _idx, _req) do { \ 238 238 - /* Use volatile to force the copy into _req. */ \ 239 239 - *(_req) = *(volatile typeof(_req))RING_GET_REQUEST(_r, _idx); \ 238 238 + /* Use volatile to force the copy into _req. */ \ 239 239 + *(_req) = *(volatile typeof(_req))RING_GET_REQUEST(_r, _idx); \ 240 240 } while (0) 241 241 242 242 #define RING_GET_RESPONSE(_r, _idx) \

+7 -7

include/qemu/acl.h

··· 49 49 qemu_acl *qemu_acl_find(const char *aclname); 50 50 51 51 int qemu_acl_party_is_allowed(qemu_acl *acl, 52 52 - const char *party); 52 52 + const char *party); 53 53 54 54 void qemu_acl_reset(qemu_acl *acl); 55 55 56 56 int qemu_acl_append(qemu_acl *acl, 57 57 - int deny, 58 58 - const char *match); 57 57 + int deny, 58 58 + const char *match); 59 59 int qemu_acl_insert(qemu_acl *acl, 60 60 - int deny, 61 61 - const char *match, 62 62 - int index); 60 60 + int deny, 61 61 + const char *match, 62 62 + int index); 63 63 int qemu_acl_remove(qemu_acl *acl, 64 64 - const char *match); 64 64 + const char *match); 65 65 66 66 #endif /* QEMU_ACL_H */

+1 -1

include/qemu/iov.h

··· 35 35 size_t iov_from_buf_full(const struct iovec *iov, unsigned int iov_cnt, 36 36 size_t offset, const void *buf, size_t bytes); 37 37 size_t iov_to_buf_full(const struct iovec *iov, const unsigned int iov_cnt, 38 38 - size_t offset, void *buf, size_t bytes); 38 38 + size_t offset, void *buf, size_t bytes); 39 39 40 40 static inline size_t 41 41 iov_from_buf(const struct iovec *iov, unsigned int iov_cnt,

+1 -1

include/scsi/constants.h

··· 212 212 #define TYPE_ROM 0x05 213 213 #define TYPE_SCANNER 0x06 214 214 #define TYPE_MOD 0x07 /* Magneto-optical disk - 215 215 - * - treated as TYPE_DISK */ 215 215 + * - treated as TYPE_DISK */ 216 216 #define TYPE_MEDIUM_CHANGER 0x08 217 217 #define TYPE_STORAGE_ARRAY 0x0c /* Storage array device */ 218 218 #define TYPE_ENCLOSURE 0x0d /* Enclosure Services Device */

+1 -1

include/sysemu/balloon.h

··· 20 20 typedef void (QEMUBalloonStatus)(void *opaque, BalloonInfo *info); 21 21 22 22 int qemu_add_balloon_handler(QEMUBalloonEvent *event_func, 23 23 - QEMUBalloonStatus *stat_func, void *opaque); 23 23 + QEMUBalloonStatus *stat_func, void *opaque); 24 24 void qemu_remove_balloon_handler(void *opaque); 25 25 bool qemu_balloon_is_inhibited(void); 26 26 void qemu_balloon_inhibit(bool state);

+7 -7

linux-user/linuxload.c

··· 38 38 int retval; 39 39 40 40 if(fstat(bprm->fd, &st) < 0) { 41 41 - return(-errno); 41 41 + return(-errno); 42 42 } 43 43 44 44 mode = st.st_mode; 45 45 if(!S_ISREG(mode)) { /* Must be regular file */ 46 46 - return(-EACCES); 46 46 + return(-EACCES); 47 47 } 48 48 if(!(mode & 0111)) { /* Must have at least one execute bit set */ 49 49 - return(-EACCES); 49 49 + return(-EACCES); 50 50 } 51 51 52 52 bprm->e_uid = geteuid(); ··· 54 54 55 55 /* Set-uid? */ 56 56 if(mode & S_ISUID) { 57 57 - bprm->e_uid = st.st_uid; 57 57 + bprm->e_uid = st.st_uid; 58 58 } 59 59 60 60 /* Set-gid? */ ··· 64 64 * executable. 65 65 */ 66 66 if ((mode & (S_ISGID | S_IXGRP)) == (S_ISGID | S_IXGRP)) { 67 67 - bprm->e_gid = st.st_gid; 67 67 + bprm->e_gid = st.st_gid; 68 68 } 69 69 70 70 retval = read(bprm->fd, bprm->buf, BPRM_BUF_SIZE); 71 71 if (retval < 0) { 72 72 - perror("prepare_binprm"); 73 73 - exit(-1); 72 72 + perror("prepare_binprm"); 73 73 + exit(-1); 74 74 } 75 75 if (retval < BPRM_BUF_SIZE) { 76 76 /* Make sure the rest of the loader won't read garbage. */

+2 -2

linux-user/main.c

··· 740 740 target_argc = argc - optind; 741 741 target_argv = calloc(target_argc + 1, sizeof (char *)); 742 742 if (target_argv == NULL) { 743 743 - (void) fprintf(stderr, "Unable to allocate memory for target_argv\n"); 744 744 - exit(EXIT_FAILURE); 743 743 + (void) fprintf(stderr, "Unable to allocate memory for target_argv\n"); 744 744 + exit(EXIT_FAILURE); 745 745 } 746 746 747 747 /*

+5 -5

linux-user/mmap.c

··· 485 485 end = start + len; 486 486 real_end = HOST_PAGE_ALIGN(end); 487 487 488 488 - /* 489 489 - * Test if requested memory area fits target address space 490 490 - * It can fail only on 64-bit host with 32-bit target. 491 491 - * On any other target/host host mmap() handles this error correctly. 492 492 - */ 488 488 + /* 489 489 + * Test if requested memory area fits target address space 490 490 + * It can fail only on 64-bit host with 32-bit target. 491 491 + * On any other target/host host mmap() handles this error correctly. 492 492 + */ 493 493 if (!guest_range_valid(start, len)) { 494 494 errno = ENOMEM; 495 495 goto fail;

+2 -2

linux-user/qemu.h

··· 50 50 abi_ulong env_strings; 51 51 abi_ulong file_string; 52 52 uint32_t elf_flags; 53 53 - int personality; 53 53 + int personality; 54 54 abi_ulong alignment; 55 55 56 56 /* The fields below are used in FDPIC mode. */ ··· 174 174 struct linux_binprm { 175 175 char buf[BPRM_BUF_SIZE] __attribute__((aligned)); 176 176 abi_ulong p; 177 177 - int fd; 177 177 + int fd; 178 178 int e_uid, e_gid; 179 179 int argc, envc; 180 180 char **argv;

+8 -8

linux-user/signal.c

··· 727 727 } 728 728 #endif 729 729 730 730 - ret = -TARGET_EFAULT; 730 730 + ret = -TARGET_EFAULT; 731 731 if (!lock_user_struct(VERIFY_READ, uss, uss_addr, 1)) { 732 732 goto out; 733 733 } ··· 736 736 __get_user(ss.ss_flags, &uss->ss_flags); 737 737 unlock_user_struct(uss, uss_addr, 0); 738 738 739 739 - ret = -TARGET_EPERM; 740 740 - if (on_sig_stack(sp)) 739 739 + ret = -TARGET_EPERM; 740 740 + if (on_sig_stack(sp)) 741 741 goto out; 742 742 743 743 - ret = -TARGET_EINVAL; 744 744 - if (ss.ss_flags != TARGET_SS_DISABLE 743 743 + ret = -TARGET_EINVAL; 744 744 + if (ss.ss_flags != TARGET_SS_DISABLE 745 745 && ss.ss_flags != TARGET_SS_ONSTACK 746 746 && ss.ss_flags != 0) 747 747 goto out; 748 748 749 749 - if (ss.ss_flags == TARGET_SS_DISABLE) { 749 749 + if (ss.ss_flags == TARGET_SS_DISABLE) { 750 750 ss.ss_size = 0; 751 751 ss.ss_sp = 0; 752 752 - } else { 752 752 + } else { 753 753 ret = -TARGET_ENOMEM; 754 754 if (ss.ss_size < minstacksize) { 755 755 goto out; 756 756 } 757 757 - } 757 757 + } 758 758 759 759 target_sigaltstack_used.ss_sp = ss.ss_sp; 760 760 target_sigaltstack_used.ss_size = ss.ss_size;

+2 -2

linux-user/strace.c

··· 647 647 for (arg_ptr_addr = arg2; ; arg_ptr_addr += sizeof(abi_ulong)) { 648 648 abi_ulong *arg_ptr, arg_addr; 649 649 650 650 - arg_ptr = lock_user(VERIFY_READ, arg_ptr_addr, sizeof(abi_ulong), 1); 650 650 + arg_ptr = lock_user(VERIFY_READ, arg_ptr_addr, sizeof(abi_ulong), 1); 651 651 if (!arg_ptr) 652 652 return; 653 653 arg_addr = tswapal(*arg_ptr); 654 654 - unlock_user(arg_ptr, arg_ptr_addr, 0); 654 654 + unlock_user(arg_ptr, arg_ptr_addr, 0); 655 655 if (!arg_addr) 656 656 break; 657 657 if ((s = lock_user_string(arg_addr))) {

+1 -1

linux-user/uaccess.c

··· 30 30 31 31 if ((ghptr = lock_user(VERIFY_WRITE, gaddr, len, 0))) { 32 32 memcpy(ghptr, hptr, len); 33 33 - unlock_user(ghptr, gaddr, len); 33 33 + unlock_user(ghptr, gaddr, len); 34 34 } else 35 35 ret = -TARGET_EFAULT; 36 36

+1 -1

linux-user/vm86.c

··· 257 257 #define CHECK_IF_IN_TRAP() \ 258 258 if ((ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) && \ 259 259 (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_TFpendig)) \ 260 260 - newflags |= TF_MASK 260 260 + newflags |= TF_MASK 261 261 262 262 #define VM86_FAULT_RETURN \ 263 263 if ((ts->vm86plus.vm86plus.flags & TARGET_force_return_for_pic) && \

+1 -1

net/checksum.c

··· 43 43 uint16_t net_checksum_finish(uint32_t sum) 44 44 { 45 45 while (sum>>16) 46 46 - sum = (sum & 0xFFFF)+(sum >> 16); 46 46 + sum = (sum & 0xFFFF)+(sum >> 16); 47 47 return ~sum; 48 48 } 49 49

+2 -2

qtest.c

··· 301 301 if (!dev) { 302 302 qtest_send_prefix(chr); 303 303 qtest_send(chr, "FAIL Unknown device\n"); 304 304 - return; 304 304 + return; 305 305 } 306 306 307 307 if (irq_intercept_dev) { ··· 311 311 } else { 312 312 qtest_send(chr, "OK\n"); 313 313 } 314 314 - return; 314 314 + return; 315 315 } 316 316 317 317 QLIST_FOREACH(ngl, &dev->gpios, node) {

+1 -1

target/alpha/translate.c

··· 804 804 805 805 static void gen_ieee_intcvt(DisasContext *ctx, 806 806 void (*helper)(TCGv, TCGv_ptr, TCGv), 807 807 - int rb, int rc, int fn11) 807 807 + int rb, int rc, int fn11) 808 808 { 809 809 TCGv vb, vc; 810 810

+1 -1

target/cris/helper.c

··· 240 240 /* Exception starts with dslot cleared. */ 241 241 env->dslot = 0; 242 242 } 243 243 - 243 243 + 244 244 if (env->pregs[PR_CCS] & U_FLAG) { 245 245 /* Swap stack pointers. */ 246 246 env->pregs[PR_USP] = env->regs[R_SP];

+5 -5

target/cris/mmu.h

··· 5 5 6 6 struct cris_mmu_result 7 7 { 8 8 - uint32_t phy; 9 9 - int prot; 10 10 - int bf_vec; 8 8 + uint32_t phy; 9 9 + int prot; 10 10 + int bf_vec; 11 11 }; 12 12 13 13 void cris_mmu_init(CPUCRISState *env); 14 14 void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid); 15 15 int cris_mmu_translate(struct cris_mmu_result *res, 16 16 - CPUCRISState *env, uint32_t vaddr, 17 17 - int rw, int mmu_idx, int debug); 16 16 + CPUCRISState *env, uint32_t vaddr, 17 17 + int rw, int mmu_idx, int debug);

+1 -1

target/cris/translate_v10.inc.c

··· 384 384 } 385 385 386 386 static inline void dec10_reg_prep_sext(DisasContext *dc, int size, int sext, 387 387 - TCGv dd, TCGv ds, TCGv sd, TCGv ss) 387 387 + TCGv dd, TCGv ds, TCGv sd, TCGv ss) 388 388 { 389 389 if (sext) { 390 390 t_gen_sext(dd, sd, size);

+6 -6

target/i386/translate.c

··· 3445 3445 case 0x172: 3446 3446 case 0x173: 3447 3447 if (b1 >= 2) { 3448 3448 - goto unknown_op; 3448 3448 + goto unknown_op; 3449 3449 } 3450 3450 val = x86_ldub_code(env, s); 3451 3451 if (is_xmm) { ··· 6400 6400 SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); 6401 6401 if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { 6402 6402 gen_io_start(); 6403 6403 - } 6403 6403 + } 6404 6404 tcg_gen_movi_i32(s->tmp2_i32, val); 6405 6405 gen_helper_in_func(ot, s->T1, s->tmp2_i32); 6406 6406 gen_op_mov_reg_v(s, ot, R_EAX, s->T1); ··· 6421 6421 6422 6422 if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { 6423 6423 gen_io_start(); 6424 6424 - } 6424 6424 + } 6425 6425 tcg_gen_movi_i32(s->tmp2_i32, val); 6426 6426 tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); 6427 6427 gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32); ··· 6439 6439 SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); 6440 6440 if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { 6441 6441 gen_io_start(); 6442 6442 - } 6442 6442 + } 6443 6443 tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); 6444 6444 gen_helper_in_func(ot, s->T1, s->tmp2_i32); 6445 6445 gen_op_mov_reg_v(s, ot, R_EAX, s->T1); ··· 6459 6459 6460 6460 if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { 6461 6461 gen_io_start(); 6462 6462 - } 6462 6462 + } 6463 6463 tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); 6464 6464 tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); 6465 6465 gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32); ··· 7166 7166 gen_jmp_im(s, pc_start - s->cs_base); 7167 7167 if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { 7168 7168 gen_io_start(); 7169 7169 - } 7169 7169 + } 7170 7170 gen_helper_rdtsc(cpu_env); 7171 7171 if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { 7172 7172 gen_io_end();

+1 -1

target/mips/translate.c

··· 7036 7036 /* Mark as an IO operation because we read the time. */ 7037 7037 if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { 7038 7038 gen_io_start(); 7039 7039 - } 7039 7039 + } 7040 7040 gen_helper_mfc0_count(arg, cpu_env); 7041 7041 if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { 7042 7042 gen_io_end();

+1 -1

target/tilegx/translate.c

··· 297 297 } 298 298 299 299 tcg_gen_qemu_st_tl(load_gr(dc, srcb), load_gr(dc, srca), 300 300 - dc->mmuidx, memop); 300 300 + dc->mmuidx, memop); 301 301 302 302 qemu_log_mask(CPU_LOG_TB_IN_ASM, "%s %s, %s", name, 303 303 reg_names[srca], reg_names[srcb]);

+2 -2

tcg/i386/tcg-target.inc.c

··· 3392 3392 tcg_out_addi(s, TCG_REG_ESP, -stack_addend); 3393 3393 /* jmp *tb. */ 3394 3394 tcg_out_modrm_offset(s, OPC_GRP5, EXT5_JMPN_Ev, TCG_REG_ESP, 3395 3395 - (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4 3396 3396 - + stack_addend); 3395 3395 + (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4 3396 3396 + + stack_addend); 3397 3397 #else 3398 3398 # if !defined(CONFIG_SOFTMMU) && TCG_TARGET_REG_BITS == 64 3399 3399 if (guest_base) {

+2 -2

tests/tcg/alpha/test-cond.c

··· 6 6 int test_##N (long a) \ 7 7 { \ 8 8 int res = 1; \ 9 9 - \ 9 9 + \ 10 10 asm ("cmov"#N" %1,$31,%0" \ 11 11 : "+r" (res) : "r" (a)); \ 12 12 return !res; \ ··· 18 18 int test_##N (long a) \ 19 19 { \ 20 20 int res = 1; \ 21 21 - \ 21 21 + \ 22 22 asm ("b"#N" %1,1f\n\t" \ 23 23 "addq $31,$31,%0\n\t" \ 24 24 "1: unop\n" \

+10 -10

tests/tcg/arm/hello-arm.c

··· 11 11 12 12 #define __syscall_return(type, res) \ 13 13 do { \ 14 14 - return (type) (res); \ 14 14 + return (type) (res); \ 15 15 } while (0) 16 16 17 17 #define _syscall0(type,name) \ ··· 33 33 "mov %0,r0" \ 34 34 : "=r" (__res) \ 35 35 : "r" ((long)(arg1)) \ 36 36 - : "r0","lr"); \ 36 36 + : "r0","lr"); \ 37 37 __syscall_return(type,__res); \ 38 38 } 39 39 ··· 47 47 "mov\t%0,r0" \ 48 48 : "=r" (__res) \ 49 49 : "r" ((long)(arg1)),"r" ((long)(arg2)) \ 50 50 - : "r0","r1","lr"); \ 50 50 + : "r0","r1","lr"); \ 51 51 __syscall_return(type,__res); \ 52 52 } 53 53 ··· 78 78 "mov\tr3,%4\n\t" \ 79 79 __syscall(name) \ 80 80 "mov\t%0,r0" \ 81 81 - : "=r" (__res) \ 82 82 - : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)) \ 83 83 - : "r0","r1","r2","r3","lr"); \ 81 81 + : "=r" (__res) \ 82 82 + : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)) \ 83 83 + : "r0","r1","r2","r3","lr"); \ 84 84 __syscall_return(type,__res); \ 85 85 } 86 86 ··· 96 96 "mov\tr4,%5\n\t" \ 97 97 __syscall(name) \ 98 98 "mov\t%0,r0" \ 99 99 - : "=r" (__res) \ 100 100 - : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)), \ 101 101 - "r" ((long)(arg5)) \ 102 102 - : "r0","r1","r2","r3","r4","lr"); \ 99 99 + : "=r" (__res) \ 100 100 + : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)), \ 101 101 + "r" ((long)(arg5)) \ 102 102 + : "r0","r1","r2","r3","r4","lr"); \ 103 103 __syscall_return(type,__res); \ 104 104 } 105 105

+4 -4

tests/tcg/cris/check_glibc_kernelversion.c

··· 109 109 110 110 if (parts < 3) 111 111 version <<= 8 * (3 - parts); 112 112 - if (version < __LINUX_KERNEL_VERSION) 113 113 - err(); 114 114 - pass(); 115 115 - exit(0); 112 112 + if (version < __LINUX_KERNEL_VERSION) 113 113 + err(); 114 114 + pass(); 115 115 + exit(0); 116 116 }

+1 -1

tests/tcg/cris/check_mmap3.c

··· 17 17 18 18 /* Check that we can map a non-multiple of a page and still get a full page. */ 19 19 a = mmap (NULL, 0x4c, PROT_READ | PROT_WRITE | PROT_EXEC, 20 20 - MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); 20 20 + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); 21 21 if (a == NULL || a == (unsigned char *) -1) 22 22 abort (); 23 23

+1 -1

tests/tcg/cris/check_openpf1.c

··· 19 19 { 20 20 fnam = malloc (strlen (argv[0]) + 2); 21 21 if (fnam == NULL) 22 22 - abort (); 22 22 + abort (); 23 23 strcpy (fnam, "/"); 24 24 strcat (fnam, argv[0]); 25 25 }

+1 -1

tests/tcg/cris/check_settls1.c

··· 35 35 syscall (SYS_set_thread_area, old_tp); 36 36 37 37 if (tp != 0xeddeed00) { 38 38 - * (volatile int *) 0 = 0; 38 38 + * (volatile int *) 0 = 0; 39 39 perror ("tls2"); 40 40 abort (); 41 41 }

+7 -7

tests/tcg/i386/hello-i386.c

··· 4 4 { 5 5 int __res; 6 6 __asm__ volatile ("movl %%ecx,%%ebx\n"\ 7 7 - "int $0x80" \ 8 8 - : "=a" (__res) : "0" (__NR_exit),"c" ((long)(status))); 7 7 + "int $0x80" \ 8 8 + : "=a" (__res) : "0" (__NR_exit),"c" ((long)(status))); 9 9 } 10 10 11 11 static inline int write(int fd, const char * buf, int len) 12 12 { 13 13 int status; 14 14 __asm__ volatile ("pushl %%ebx\n"\ 15 15 - "movl %%esi,%%ebx\n"\ 16 16 - "int $0x80\n" \ 17 17 - "popl %%ebx\n"\ 18 18 - : "=a" (status) \ 19 19 - : "0" (__NR_write),"S" ((long)(fd)),"c" ((long)(buf)),"d" ((long)(len))); 15 15 + "movl %%esi,%%ebx\n"\ 16 16 + "int $0x80\n" \ 17 17 + "popl %%ebx\n"\ 18 18 + : "=a" (status) \ 19 19 + : "0" (__NR_write),"S" ((long)(fd)),"c" ((long)(buf)),"d" ((long)(len))); 20 20 return status; 21 21 } 22 22

+5 -5

tests/tcg/mips/hello-mips.c

··· 24 24 " syscall \n" 25 25 " .set pop " 26 26 : 27 27 - : "i" (__NR_exit), "r" (__a0) 28 28 - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", 29 29 - "memory"); 27 27 + : "i" (__NR_exit), "r" (__a0) 28 28 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", 29 29 + "memory"); 30 30 } 31 31 32 32 static inline int write(int fd, const char *buf, int len) ··· 46 46 " .set pop " 47 47 : "=r" (__v0), "=r" (__a3) 48 48 : "i" (__NR_write), "r" (__a0), "r" (__a1), "r" (__a2) 49 49 - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", 50 50 - "memory"); 49 49 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", 50 50 + "memory"); 51 51 52 52 /* if (__a3 == 0) */ 53 53 return (int) __v0;

+6 -6

tests/tcg/multiarch/sha1.c

··· 152 152 153 153 j = context->count[0]; 154 154 if ((context->count[0] += len << 3) < j) 155 155 - context->count[1]++; 155 155 + context->count[1]++; 156 156 context->count[1] += (len>>29); 157 157 j = (j >> 3) & 63; 158 158 if ((j + len) > 63) { ··· 186 186 187 187 for (i = 0; i < 2; i++) 188 188 { 189 189 - uint32_t t = context->count[i]; 190 190 - int j; 189 189 + uint32_t t = context->count[i]; 190 190 + int j; 191 191 192 192 - for (j = 0; j < 4; t >>= 8, j++) 193 193 - *--fcp = (unsigned char) t; 192 192 + for (j = 0; j < 4; t >>= 8, j++) 193 193 + *--fcp = (unsigned char) t; 194 194 } 195 195 #else 196 196 for (i = 0; i < 8; i++) { ··· 201 201 c = 0200; 202 202 SHA1Update(context, &c, 1); 203 203 while ((context->count[0] & 504) != 448) { 204 204 - c = 0000; 204 204 + c = 0000; 205 205 SHA1Update(context, &c, 1); 206 206 } 207 207 SHA1Update(context, finalcount, 8); /* Should cause a SHA1Transform() */

+2 -2

tests/vhost-user-test.c

··· 354 354 break; 355 355 356 356 case VHOST_USER_SET_FEATURES: 357 357 - g_assert_cmpint(msg.payload.u64 & (0x1ULL << VHOST_USER_F_PROTOCOL_FEATURES), 358 358 - !=, 0ULL); 357 357 + g_assert_cmpint(msg.payload.u64 & (0x1ULL << VHOST_USER_F_PROTOCOL_FEATURES), 358 358 + !=, 0ULL); 359 359 if (s->test_flags == TEST_FLAGS_DISCONNECT) { 360 360 qemu_chr_fe_disconnect(chr); 361 361 s->test_flags = TEST_FLAGS_BAD;

+2 -2

ui/keymaps.h

··· 28 28 #include "qemu-common.h" 29 29 30 30 typedef struct { 31 31 - const char* name; 32 32 - int keysym; 31 31 + const char* name; 32 32 + int keysym; 33 33 } name2keysym_t; 34 34 35 35 /* scancode without modifiers */

+1 -1

ui/qemu-pixman.c

··· 36 36 pf.rshift = 0; 37 37 break; 38 38 case PIXMAN_TYPE_BGRA: 39 39 - pf.bshift = bpp - pf.bbits; 39 39 + pf.bshift = bpp - pf.bbits; 40 40 pf.gshift = bpp - (pf.bbits + pf.gbits); 41 41 pf.rshift = bpp - (pf.bbits + pf.gbits + pf.rbits); 42 42 pf.ashift = 0;

+2 -2

ui/vnc-enc-zywrle-template.c

··· 44 44 45 45 /* Change Log: 46 46 V0.02 : 2008/02/04 : Fix mis encode/decode when width != scanline 47 47 - (Thanks Johannes Schindelin, author of LibVNC 48 48 - Server/Client) 47 47 + (Thanks Johannes Schindelin, author of LibVNC 48 48 + Server/Client) 49 49 V0.01 : 2007/02/06 : Initial release 50 50 */ 51 51

+2 -2

ui/vnc.c

··· 3097 3097 buffer_init(&vs->zrle.zlib, "vnc-zrle-zlib/%p", sioc); 3098 3098 3099 3099 if (skipauth) { 3100 3100 - vs->auth = VNC_AUTH_NONE; 3101 3101 - vs->subauth = VNC_AUTH_INVALID; 3100 3100 + vs->auth = VNC_AUTH_NONE; 3101 3101 + vs->subauth = VNC_AUTH_INVALID; 3102 3102 } else { 3103 3103 if (websocket) { 3104 3104 vs->auth = vd->ws_auth;

+2 -2

util/bitops.c

··· 18 18 * Find the next set bit in a memory region. 19 19 */ 20 20 unsigned long find_next_bit(const unsigned long *addr, unsigned long size, 21 21 - unsigned long offset) 21 21 + unsigned long offset) 22 22 { 23 23 const unsigned long *p = addr + BIT_WORD(offset); 24 24 unsigned long result = offset & ~(BITS_PER_LONG-1); ··· 83 83 * Linus' asm-alpha/bitops.h. 84 84 */ 85 85 unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, 86 86 - unsigned long offset) 86 86 + unsigned long offset) 87 87 { 88 88 const unsigned long *p = addr + BIT_WORD(offset); 89 89 unsigned long result = offset & ~(BITS_PER_LONG-1);

+2 -2

util/osdep.c

··· 470 470 471 471 #ifdef _FIPS_DEBUG 472 472 fprintf(stderr, "FIPS mode %s (requested %s)\n", 473 473 - (fips_enabled ? "enabled" : "disabled"), 474 474 - (requested ? "enabled" : "disabled")); 473 473 + (fips_enabled ? "enabled" : "disabled"), 474 474 + (requested ? "enabled" : "disabled")); 475 475 #endif 476 476 } 477 477

+2 -2

util/qemu-sockets.c

··· 270 270 /* create socket + bind/listen */ 271 271 for (e = res; e != NULL; e = e->ai_next) { 272 272 getnameinfo((struct sockaddr*)e->ai_addr,e->ai_addrlen, 273 273 - uaddr,INET6_ADDRSTRLEN,uport,32, 274 274 - NI_NUMERICHOST | NI_NUMERICSERV); 273 273 + uaddr,INET6_ADDRSTRLEN,uport,32, 274 274 + NI_NUMERICHOST | NI_NUMERICSERV); 275 275 276 276 port_min = inet_getport(e); 277 277 port_max = saddr->has_to ? saddr->to + port_offset : port_min;