qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

hw/arm/fsl-imx7: Instantiate various unimplemented devices

Instantiating PWM, CAN, CAAM, and OCOTP devices is necessary to avoid
crashes when booting mainline Linux.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 20200517162135.110364-8-linux@roeck-us.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

authored by

Guenter Roeck and committed by
Peter Maydell
72465e1e 5671e960

+40
+24
hw/arm/fsl-imx7.c
··· 459 459 */ 460 460 create_unimplemented_device("sdma", FSL_IMX7_SDMA_ADDR, FSL_IMX7_SDMA_SIZE); 461 461 462 + /* 463 + * CAAM 464 + */ 465 + create_unimplemented_device("caam", FSL_IMX7_CAAM_ADDR, FSL_IMX7_CAAM_SIZE); 466 + 467 + /* 468 + * PWM 469 + */ 470 + create_unimplemented_device("pwm1", FSL_IMX7_PWM1_ADDR, FSL_IMX7_PWMn_SIZE); 471 + create_unimplemented_device("pwm2", FSL_IMX7_PWM2_ADDR, FSL_IMX7_PWMn_SIZE); 472 + create_unimplemented_device("pwm3", FSL_IMX7_PWM3_ADDR, FSL_IMX7_PWMn_SIZE); 473 + create_unimplemented_device("pwm4", FSL_IMX7_PWM4_ADDR, FSL_IMX7_PWMn_SIZE); 474 + 475 + /* 476 + * CAN 477 + */ 478 + create_unimplemented_device("can1", FSL_IMX7_CAN1_ADDR, FSL_IMX7_CANn_SIZE); 479 + create_unimplemented_device("can2", FSL_IMX7_CAN2_ADDR, FSL_IMX7_CANn_SIZE); 480 + 481 + /* 482 + * OCOTP 483 + */ 484 + create_unimplemented_device("ocotp", FSL_IMX7_OCOTP_ADDR, 485 + FSL_IMX7_OCOTP_SIZE); 462 486 463 487 object_property_set_bool(OBJECT(&s->gpr), true, "realized", 464 488 &error_abort);
+16
include/hw/arm/fsl-imx7.h
··· 113 113 FSL_IMX7_IOMUXC_GPR_ADDR = 0x30340000, 114 114 FSL_IMX7_IOMUXCn_SIZE = 0x1000, 115 115 116 + FSL_IMX7_OCOTP_ADDR = 0x30350000, 117 + FSL_IMX7_OCOTP_SIZE = 0x10000, 118 + 116 119 FSL_IMX7_ANALOG_ADDR = 0x30360000, 117 120 FSL_IMX7_SNVS_ADDR = 0x30370000, 118 121 FSL_IMX7_CCM_ADDR = 0x30380000, ··· 124 127 FSL_IMX7_ADC2_ADDR = 0x30620000, 125 128 FSL_IMX7_ADCn_SIZE = 0x1000, 126 129 130 + FSL_IMX7_PWM1_ADDR = 0x30660000, 131 + FSL_IMX7_PWM2_ADDR = 0x30670000, 132 + FSL_IMX7_PWM3_ADDR = 0x30680000, 133 + FSL_IMX7_PWM4_ADDR = 0x30690000, 134 + FSL_IMX7_PWMn_SIZE = 0x10000, 135 + 127 136 FSL_IMX7_PCIE_PHY_ADDR = 0x306D0000, 128 137 FSL_IMX7_PCIE_PHY_SIZE = 0x10000, 129 138 130 139 FSL_IMX7_GPC_ADDR = 0x303A0000, 140 + 141 + FSL_IMX7_CAAM_ADDR = 0x30900000, 142 + FSL_IMX7_CAAM_SIZE = 0x40000, 143 + 144 + FSL_IMX7_CAN1_ADDR = 0x30A00000, 145 + FSL_IMX7_CAN2_ADDR = 0x30A10000, 146 + FSL_IMX7_CANn_SIZE = 0x10000, 131 147 132 148 FSL_IMX7_I2C1_ADDR = 0x30A20000, 133 149 FSL_IMX7_I2C2_ADDR = 0x30A30000,