qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

target/*helper: don't check retaddr before calling cpu_restore_state

cpu_restore_state officially supports being passed an address it can't
resolve the state for. As a result the checks in the helpers are
superfluous and can be removed. This makes the code consistent with
other users of cpu_restore_state.

Of course this does nothing to address what to do if cpu_restore_state
can't resolve the state but so far it seems this is handled elsewhere.

The change was made with included coccinelle script.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
[rth: Fixed up comment indentation. Added second hunk to script to
combine cpu_restore_state and cpu_loop_exit.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

authored by

Alex Bennée and committed by
Richard Henderson
65255e8e 281f3274

+44 -68
+19
scripts/coccinelle/cpu_restore_state.cocci
··· 1 + // Remove unneeded tests before calling cpu_restore_state 2 + // 3 + // spatch --macro-file scripts/cocci-macro-file.h \ 4 + // --sp-file ./scripts/coccinelle/cpu_restore_state.cocci \ 5 + // --keep-comments --in-place --use-gitgrep --dir target 6 + @@ 7 + expression A; 8 + expression C; 9 + @@ 10 + -if (A) { 11 + cpu_restore_state(C, A); 12 + -} 13 + @@ 14 + expression A; 15 + expression C; 16 + @@ 17 + - cpu_restore_state(C, A); 18 + - cpu_loop_exit(C); 19 + + cpu_loop_exit_restore(C, A);
+3 -10
target/alpha/mem_helper.c
··· 34 34 uint64_t pc; 35 35 uint32_t insn; 36 36 37 - if (retaddr) { 38 - cpu_restore_state(cs, retaddr); 39 - } 37 + cpu_restore_state(cs, retaddr); 40 38 41 39 pc = env->pc; 42 40 insn = cpu_ldl_code(env, pc); ··· 58 56 AlphaCPU *cpu = ALPHA_CPU(cs); 59 57 CPUAlphaState *env = &cpu->env; 60 58 61 - if (retaddr) { 62 - cpu_restore_state(cs, retaddr); 63 - } 59 + cpu_restore_state(cs, retaddr); 64 60 65 61 env->trap_arg0 = addr; 66 62 env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0; ··· 80 76 81 77 ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); 82 78 if (unlikely(ret != 0)) { 83 - if (retaddr) { 84 - cpu_restore_state(cs, retaddr); 85 - } 86 79 /* Exception index and error code are already set */ 87 - cpu_loop_exit(cs); 80 + cpu_loop_exit_restore(cs, retaddr); 88 81 } 89 82 } 90 83 #endif /* CONFIG_USER_ONLY */
+6 -12
target/arm/op_helper.c
··· 182 182 if (unlikely(ret)) { 183 183 ARMCPU *cpu = ARM_CPU(cs); 184 184 185 - if (retaddr) { 186 - /* now we have a real cpu fault */ 187 - cpu_restore_state(cs, retaddr); 188 - } 185 + /* now we have a real cpu fault */ 186 + cpu_restore_state(cs, retaddr); 189 187 190 188 deliver_fault(cpu, addr, access_type, mmu_idx, &fi); 191 189 } ··· 199 197 ARMCPU *cpu = ARM_CPU(cs); 200 198 ARMMMUFaultInfo fi = {}; 201 199 202 - if (retaddr) { 203 - /* now we have a real cpu fault */ 204 - cpu_restore_state(cs, retaddr); 205 - } 200 + /* now we have a real cpu fault */ 201 + cpu_restore_state(cs, retaddr); 206 202 207 203 fi.type = ARMFault_Alignment; 208 204 deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi); ··· 221 217 ARMCPU *cpu = ARM_CPU(cs); 222 218 ARMMMUFaultInfo fi = {}; 223 219 224 - if (retaddr) { 225 - /* now we have a real cpu fault */ 226 - cpu_restore_state(cs, retaddr); 227 - } 220 + /* now we have a real cpu fault */ 221 + cpu_restore_state(cs, retaddr); 228 222 229 223 /* The EA bit in syndromes and fault status registers is an 230 224 * IMPDEF classification of external aborts. ARM implementations
+1 -3
target/i386/svm_helper.c
··· 584 584 { 585 585 CPUState *cs = CPU(x86_env_get_cpu(env)); 586 586 587 - if (retaddr) { 588 - cpu_restore_state(cs, retaddr); 589 - } 587 + cpu_restore_state(cs, retaddr); 590 588 591 589 qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" 592 590 PRIx64 ", " TARGET_FMT_lx ")!\n",
+2 -5
target/lm32/op_helper.c
··· 151 151 152 152 ret = lm32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); 153 153 if (unlikely(ret)) { 154 - if (retaddr) { 155 - /* now we have a real cpu fault */ 156 - cpu_restore_state(cs, retaddr); 157 - } 158 - cpu_loop_exit(cs); 154 + /* now we have a real cpu fault */ 155 + cpu_loop_exit_restore(cs, retaddr); 159 156 } 160 157 } 161 158 #endif
+2 -5
target/m68k/op_helper.c
··· 46 46 47 47 ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); 48 48 if (unlikely(ret)) { 49 - if (retaddr) { 50 - /* now we have a real cpu fault */ 51 - cpu_restore_state(cs, retaddr); 52 - } 53 - cpu_loop_exit(cs); 49 + /* now we have a real cpu fault */ 50 + cpu_loop_exit_restore(cs, retaddr); 54 51 } 55 52 } 56 53
+2 -5
target/microblaze/op_helper.c
··· 40 40 41 41 ret = mb_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); 42 42 if (unlikely(ret)) { 43 - if (retaddr) { 44 - /* now we have a real cpu fault */ 45 - cpu_restore_state(cs, retaddr); 46 - } 47 - cpu_loop_exit(cs); 43 + /* now we have a real cpu fault */ 44 + cpu_loop_exit_restore(cs, retaddr); 48 45 } 49 46 } 50 47 #endif
+1 -3
target/moxie/helper.c
··· 36 36 37 37 ret = moxie_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); 38 38 if (unlikely(ret)) { 39 - if (retaddr) { 40 - cpu_restore_state(cs, retaddr); 41 - } 39 + cpu_restore_state(cs, retaddr); 42 40 } 43 41 cpu_loop_exit(cs); 44 42 }
+2 -5
target/nios2/mmu.c
··· 42 42 43 43 ret = nios2_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); 44 44 if (unlikely(ret)) { 45 - if (retaddr) { 46 - /* now we have a real cpu fault */ 47 - cpu_restore_state(cs, retaddr); 48 - } 49 - cpu_loop_exit(cs); 45 + /* now we have a real cpu fault */ 46 + cpu_loop_exit_restore(cs, retaddr); 50 47 } 51 48 } 52 49
+1 -5
target/openrisc/mmu_helper.c
··· 33 33 ret = openrisc_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); 34 34 35 35 if (ret) { 36 - if (retaddr) { 37 - /* now we have a real cpu fault. */ 38 - cpu_restore_state(cs, retaddr); 39 - } 40 36 /* Raise Exception. */ 41 - cpu_loop_exit(cs); 37 + cpu_loop_exit_restore(cs, retaddr); 42 38 } 43 39 } 44 40 #endif
+3 -10
target/tricore/op_helper.c
··· 31 31 { 32 32 CPUState *cs = CPU(tricore_env_get_cpu(env)); 33 33 /* in case we come from a helper-call we need to restore the PC */ 34 - if (pc) { 35 - cpu_restore_state(cs, pc); 36 - } 34 + cpu_restore_state(cs, pc); 37 35 38 36 /* Tin is loaded into d[15] */ 39 37 env->gpr_d[15] = tin; ··· 2804 2802 CPUState *cs = CPU(tricore_env_get_cpu(env)); 2805 2803 cs->exception_index = exception; 2806 2804 env->error_code = error_code; 2807 - 2808 - if (pc) { 2809 - /* now we have a real cpu fault */ 2810 - cpu_restore_state(cs, pc); 2811 - } 2812 - 2813 - cpu_loop_exit(cs); 2805 + /* now we have a real cpu fault */ 2806 + cpu_loop_exit_restore(cs, pc); 2814 2807 } 2815 2808 2816 2809 void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
+2 -5
target/unicore32/op_helper.c
··· 251 251 252 252 ret = uc32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); 253 253 if (unlikely(ret)) { 254 - if (retaddr) { 255 - /* now we have a real cpu fault */ 256 - cpu_restore_state(cs, retaddr); 257 - } 258 - cpu_loop_exit(cs); 254 + /* now we have a real cpu fault */ 255 + cpu_loop_exit_restore(cs, retaddr); 259 256 } 260 257 } 261 258 #endif