qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

wire in the dwc-hsotg (dwc2) USB host controller emulation

Wire the dwc-hsotg (dwc2) emulation into Qemu

Signed-off-by: Paul Zimmerman <pauldzim@gmail.com>
Reviewed-by: Philippe Mathieu-Daude <f4bug@amsat.org>
Message-id: 20200520235349.21215-7-pauldzim@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

authored by

Paul Zimmerman and committed by
Peter Maydell
60bf734e 7ad3d51e

+22 -2
+20 -1
hw/arm/bcm2835_peripherals.c
··· 129 129 /* Mphi */ 130 130 sysbus_init_child_obj(obj, "mphi", &s->mphi, sizeof(s->mphi), 131 131 TYPE_BCM2835_MPHI); 132 + 133 + /* DWC2 */ 134 + sysbus_init_child_obj(obj, "dwc2", &s->dwc2, sizeof(s->dwc2), 135 + TYPE_DWC2_USB); 136 + 137 + object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr", 138 + OBJECT(&s->gpu_bus_mr)); 132 139 } 133 140 134 141 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) ··· 377 384 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 378 385 INTERRUPT_HOSTPORT)); 379 386 387 + /* DWC2 */ 388 + object_property_set_bool(OBJECT(&s->dwc2), true, "realized", &err); 389 + if (err) { 390 + error_propagate(errp, err); 391 + return; 392 + } 393 + 394 + memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET, 395 + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0)); 396 + sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0, 397 + qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 398 + INTERRUPT_USB)); 399 + 380 400 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40); 381 401 create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000); 382 402 create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000); ··· 390 410 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); 391 411 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); 392 412 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); 393 - create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x1000); 394 413 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100); 395 414 } 396 415
+2 -1
include/hw/arm/bcm2835_peripherals.h
··· 27 27 #include "hw/sd/bcm2835_sdhost.h" 28 28 #include "hw/gpio/bcm2835_gpio.h" 29 29 #include "hw/timer/bcm2835_systmr.h" 30 + #include "hw/usb/hcd-dwc2.h" 30 31 #include "hw/misc/unimp.h" 31 32 32 33 #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals" ··· 67 68 UnimplementedDeviceState ave0; 68 69 UnimplementedDeviceState bscsl; 69 70 UnimplementedDeviceState smi; 70 - UnimplementedDeviceState dwc2; 71 + DWC2State dwc2; 71 72 UnimplementedDeviceState sdramc; 72 73 } BCM2835PeripheralState; 73 74