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qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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target/microblaze: Add the ill-opcode-exception property

Add the ill-opcode-exception property to control if illegal
instructions will raise exceptions.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Edgar E. Iglesias 5143fdf3 1ee1bd28

+6 -1
+4
target/microblaze/cpu.c
··· 207 207 PVR2_DOPB_BUS_EXC_MASK : 0) | 208 208 (cpu->cfg.iopb_bus_exception ? 209 209 PVR2_IOPB_BUS_EXC_MASK : 0) | 210 + (cpu->cfg.illegal_opcode_exception ? 211 + PVR2_ILL_OPCODE_EXC_MASK : 0) | 210 212 (cpu->cfg.opcode_0_illegal ? 211 213 PVR2_OPCODE_0x0_ILL_MASK : 0); 212 214 ··· 276 278 /* Enables bus exceptions on failed instruction fetches. */ 277 279 DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU, 278 280 cfg.iopb_bus_exception, false), 281 + DEFINE_PROP_BOOL("ill-opcode-exception", MicroBlazeCPU, 282 + cfg.illegal_opcode_exception, false), 279 283 DEFINE_PROP_BOOL("opcode-0x0-illegal", MicroBlazeCPU, 280 284 cfg.opcode_0_illegal, false), 281 285 DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version),
+1
target/microblaze/cpu.h
··· 303 303 bool endi; 304 304 bool dopb_bus_exception; 305 305 bool iopb_bus_exception; 306 + bool illegal_opcode_exception; 306 307 bool opcode_0_illegal; 307 308 char *version; 308 309 uint8_t pvr;
+1 -1
target/microblaze/translate.c
··· 185 185 static bool trap_illegal(DisasContext *dc, bool cond) 186 186 { 187 187 if (cond && (dc->tb_flags & MSR_EE_FLAG) 188 - && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)) { 188 + && dc->cpu->cfg.illegal_opcode_exception) { 189 189 tcg_gen_movi_i64(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); 190 190 t_gen_raise_exception(dc, EXCP_HW_EXCP); 191 191 }