jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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target/openrisc: Rename the cpu from or32 to or1k

This is in keeping with the toolchain and or1ksim.

Signed-off-by: Richard Henderson <rth@twiddle.net>

Richard Henderson 4a09d0bb 305e6c8a

+13 -13
+3 -3
configure
··· 5843 5843 target_bigendian="no" 5844 5844 5845 5845 case "$target_name" in 5846 - armeb|hppa|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb) 5846 + armeb|hppa|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or1k|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb) 5847 5847 target_bigendian=yes 5848 5848 ;; 5849 5849 esac ··· 5937 5937 ;; 5938 5938 nios2) 5939 5939 ;; 5940 - or32) 5940 + or1k) 5941 5941 TARGET_ARCH=openrisc 5942 5942 TARGET_BASE_ARCH=openrisc 5943 5943 ;; ··· 6145 6145 nios2) 6146 6146 disas_config "NIOS2" 6147 6147 ;; 6148 - or32) 6148 + or1k) 6149 6149 disas_config "OPENRISC" 6150 6150 ;; 6151 6151 ppc*)
+1
default-configs/or1k-linux-user.mak
··· 1 + # Default configuration for or1k-linux-user
+4
default-configs/or1k-softmmu.mak
··· 1 + # Default configuration for or1k-softmmu 2 + 3 + CONFIG_SERIAL=y 4 + CONFIG_OPENCORES_ETH=y
-1
default-configs/or32-linux-user.mak
··· 1 - # Default configuration for or32-linux-user
-4
default-configs/or32-softmmu.mak
··· 1 - # Default configuration for or32-softmmu 2 - 3 - CONFIG_SERIAL=y 4 - CONFIG_OPENCORES_ETH=y
+2 -2
hw/openrisc/openrisc_sim.c
··· 139 139 140 140 static void openrisc_sim_machine_init(MachineClass *mc) 141 141 { 142 - mc->desc = "or32 simulation"; 142 + mc->desc = "or1k simulation"; 143 143 mc->init = openrisc_sim_init; 144 144 mc->max_cpus = 1; 145 145 mc->is_default = 1; 146 146 } 147 147 148 - DEFINE_MACHINE("or32-sim", openrisc_sim_machine_init) 148 + DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)
+1 -1
target/openrisc/cpu.h
··· 32 32 #include "fpu/softfloat.h" 33 33 #include "qom/cpu.h" 34 34 35 - #define TYPE_OPENRISC_CPU "or32-cpu" 35 + #define TYPE_OPENRISC_CPU "or1k-cpu" 36 36 37 37 #define OPENRISC_CPU_CLASS(klass) \ 38 38 OBJECT_CLASS_CHECK(OpenRISCCPUClass, (klass), TYPE_OPENRISC_CPU)
+2 -2
tests/tcg/openrisc/Makefile
··· 1 1 -include ../../config-host.mak 2 2 3 - CROSS = or32-linux- 3 + CROSS = or1k-linux- 4 4 5 - SIM = qemu-or32 5 + SIM = qemu-or1k 6 6 7 7 CC = $(CROSS)gcc 8 8