jcs.org / qemu
qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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target-i386: Use ctpop helper

Signed-off-by: Richard Henderson <rth@twiddle.net>

Richard Henderson 4885c3c4 3253cddd

+15 -29
+3
target/i386/cc_helper.c
··· 105 105 return src1; 106 106 case CC_OP_CLR: 107 107 return CC_Z | CC_P; 108 + case CC_OP_POPCNT: 109 + return src1 ? 0 : CC_Z; 108 110 109 111 case CC_OP_MULB: 110 112 return compute_all_mulb(dst, src1); ··· 232 234 case CC_OP_LOGICL: 233 235 case CC_OP_LOGICQ: 234 236 case CC_OP_CLR: 237 + case CC_OP_POPCNT: 235 238 return 0; 236 239 237 240 case CC_OP_EFLAGS:
+1
target/i386/cpu.h
··· 777 777 CC_OP_ADCOX, /* CC_DST = C, CC_SRC2 = O, CC_SRC = rest. */ 778 778 779 779 CC_OP_CLR, /* Z set, all other flags clear. */ 780 + CC_OP_POPCNT, /* Z via CC_SRC, all other flags clear. */ 780 781 781 782 CC_OP_NB, 782 783 } CCOp;
-26
target/i386/ops_sse.h
··· 2157 2157 return crc; 2158 2158 } 2159 2159 2160 - #define POPMASK(i) ((target_ulong) -1 / ((1LL << (1 << i)) + 1)) 2161 - #define POPCOUNT(n, i) ((n & POPMASK(i)) + ((n >> (1 << i)) & POPMASK(i))) 2162 - target_ulong helper_popcnt(CPUX86State *env, target_ulong n, uint32_t type) 2163 - { 2164 - CC_SRC = n ? 0 : CC_Z; 2165 - 2166 - n = POPCOUNT(n, 0); 2167 - n = POPCOUNT(n, 1); 2168 - n = POPCOUNT(n, 2); 2169 - n = POPCOUNT(n, 3); 2170 - if (type == 1) { 2171 - return n & 0xff; 2172 - } 2173 - 2174 - n = POPCOUNT(n, 4); 2175 - #ifndef TARGET_X86_64 2176 - return n; 2177 - #else 2178 - if (type == 2) { 2179 - return n & 0xff; 2180 - } 2181 - 2182 - return POPCOUNT(n, 5); 2183 - #endif 2184 - } 2185 - 2186 2160 void glue(helper_pclmulqdq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, 2187 2161 uint32_t ctrl) 2188 2162 {
-1
target/i386/ops_sse_header.h
··· 333 333 DEF_HELPER_4(glue(pcmpistri, SUFFIX), void, env, Reg, Reg, i32) 334 334 DEF_HELPER_4(glue(pcmpistrm, SUFFIX), void, env, Reg, Reg, i32) 335 335 DEF_HELPER_3(crc32, tl, i32, tl, i32) 336 - DEF_HELPER_3(popcnt, tl, env, tl, i32) 337 336 #endif 338 337 339 338 /* AES-NI op helpers */
+11 -2
target/i386/translate.c
··· 222 222 [CC_OP_ADOX] = USES_CC_SRC | USES_CC_SRC2, 223 223 [CC_OP_ADCOX] = USES_CC_DST | USES_CC_SRC | USES_CC_SRC2, 224 224 [CC_OP_CLR] = 0, 225 + [CC_OP_POPCNT] = USES_CC_SRC, 225 226 }; 226 227 227 228 static void set_cc_op(DisasContext *s, CCOp op) ··· 757 758 758 759 case CC_OP_LOGICB ... CC_OP_LOGICQ: 759 760 case CC_OP_CLR: 761 + case CC_OP_POPCNT: 760 762 return (CCPrepare) { .cond = TCG_COND_NEVER, .mask = -1 }; 761 763 762 764 case CC_OP_INCB ... CC_OP_INCQ: ··· 824 826 return (CCPrepare) { .cond = TCG_COND_NE, .reg = cpu_cc_src, 825 827 .mask = CC_S }; 826 828 case CC_OP_CLR: 829 + case CC_OP_POPCNT: 827 830 return (CCPrepare) { .cond = TCG_COND_NEVER, .mask = -1 }; 828 831 default: 829 832 { ··· 843 846 return (CCPrepare) { .cond = TCG_COND_NE, .reg = cpu_cc_src2, 844 847 .mask = -1, .no_setcond = true }; 845 848 case CC_OP_CLR: 849 + case CC_OP_POPCNT: 846 850 return (CCPrepare) { .cond = TCG_COND_NEVER, .mask = -1 }; 847 851 default: 848 852 gen_compute_eflags(s); ··· 866 870 .mask = CC_Z }; 867 871 case CC_OP_CLR: 868 872 return (CCPrepare) { .cond = TCG_COND_ALWAYS, .mask = -1 }; 873 + case CC_OP_POPCNT: 874 + return (CCPrepare) { .cond = TCG_COND_EQ, .reg = cpu_cc_src, 875 + .mask = -1 }; 869 876 default: 870 877 { 871 878 TCGMemOp size = (s->cc_op - CC_OP_ADDB) & 3; ··· 8205 8212 } 8206 8213 8207 8214 gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); 8208 - gen_helper_popcnt(cpu_T0, cpu_env, cpu_T0, tcg_const_i32(ot)); 8215 + gen_extu(ot, cpu_T0); 8216 + tcg_gen_mov_tl(cpu_cc_src, cpu_T0); 8217 + tcg_gen_ctpop_tl(cpu_T0, cpu_T0); 8209 8218 gen_op_mov_reg_v(ot, reg, cpu_T0); 8210 8219 8211 - set_cc_op(s, CC_OP_EFLAGS); 8220 + set_cc_op(s, CC_OP_POPCNT); 8212 8221 break; 8213 8222 case 0x10e ... 0x10f: 8214 8223 /* 3DNow! instructions, ignore prefixes */