+4

.gitignore

··· 103 103 /pc-bios/optionrom/linuxboot_dma.bin 104 104 /pc-bios/optionrom/linuxboot_dma.raw 105 105 /pc-bios/optionrom/linuxboot_dma.img 106 106 + /pc-bios/optionrom/pvh.asm 107 107 + /pc-bios/optionrom/pvh.bin 108 108 + /pc-bios/optionrom/pvh.raw 109 109 + /pc-bios/optionrom/pvh.img 106 110 /pc-bios/optionrom/multiboot.asm 107 111 /pc-bios/optionrom/multiboot.bin 108 112 /pc-bios/optionrom/multiboot.raw

+3 -3

Makefile

··· 570 570 qemu-ga: qemu-ga$(EXESUF) $(QGA_VSS_PROVIDER) $(QEMU_GA_MSI) 571 571 endif 572 572 573 573 - elf2dmp: LIBS = $(CURL_LIBS) 574 574 - elf2dmp: $(elf2dmp-obj-y) 573 573 + elf2dmp$(EXESUF): LIBS += $(CURL_LIBS) 574 574 + elf2dmp$(EXESUF): $(elf2dmp-obj-y) 575 575 $(call LINK, $^) 576 576 577 577 ifdef CONFIG_IVSHMEM ··· 673 673 efi-pcnet.rom efi-rtl8139.rom efi-virtio.rom \ 674 674 efi-e1000e.rom efi-vmxnet3.rom \ 675 675 bamboo.dtb canyonlands.dtb petalogix-s3adsp1800.dtb petalogix-ml605.dtb \ 676 676 - multiboot.bin linuxboot.bin linuxboot_dma.bin kvmvapic.bin \ 676 676 + multiboot.bin linuxboot.bin linuxboot_dma.bin kvmvapic.bin pvh.bin \ 677 677 s390-ccw.img s390-netboot.img \ 678 678 spapr-rtas.bin slof.bin skiboot.lid \ 679 679 palcode-clipper \

+4

accel/tcg/cpu-exec.c

··· 266 266 #ifndef CONFIG_SOFTMMU 267 267 tcg_debug_assert(!have_mmap_lock()); 268 268 #endif 269 269 + if (qemu_mutex_iothread_locked()) { 270 270 + qemu_mutex_unlock_iothread(); 271 271 + } 269 272 assert_no_pages_locked(); 270 273 } 271 274 ··· 702 705 if (qemu_mutex_iothread_locked()) { 703 706 qemu_mutex_unlock_iothread(); 704 707 } 708 708 + assert_no_pages_locked(); 705 709 } 706 710 707 711 /* if an exception is pending, we execute it here */

+14 -6

configure

··· 4612 4612 libs_qga="$libs_qga -lrt" 4613 4613 fi 4614 4614 4615 4615 - if test "$darwin" != "yes" -a "$mingw32" != "yes" -a "$solaris" != yes -a \ 4616 4616 - "$haiku" != "yes" ; then 4615 4615 + # Check whether we need to link libutil for openpty() 4616 4616 + cat > $TMPC << EOF 4617 4617 + extern int openpty(int *am, int *as, char *name, void *termp, void *winp); 4618 4618 + int main(void) { return openpty(0, 0, 0, 0, 0); } 4619 4619 + EOF 4620 4620 + 4621 4621 + if ! compile_prog "" "" ; then 4622 4622 + if compile_prog "" "-lutil" ; then 4617 4623 libs_softmmu="-lutil $libs_softmmu" 4624 4624 + libs_tools="-lutil $libs_tools" 4625 4625 + fi 4618 4626 fi 4619 4627 4620 4628 ########################################## ··· 5782 5790 if [ "$ivshmem" = "yes" ]; then 5783 5791 tools="ivshmem-client\$(EXESUF) ivshmem-server\$(EXESUF) $tools" 5784 5792 fi 5785 5785 - if [ "$posix" = "yes" ] && [ "$curl" = "yes" ]; then 5786 5786 - tools="elf2dmp $tools" 5793 5793 + if [ "$curl" = "yes" ]; then 5794 5794 + tools="elf2dmp\$(EXESUF) $tools" 5787 5795 fi 5788 5796 fi 5789 5797 if test "$softmmu" = yes ; then ··· 7129 7137 case "$target_name" in 7130 7138 i386) 7131 7139 mttcg="yes" 7132 7132 - gdb_xml_files="i386-32bit.xml i386-32bit-core.xml i386-32bit-sse.xml" 7140 7140 + gdb_xml_files="i386-32bit.xml" 7133 7141 target_compiler=$cross_cc_i386 7134 7142 target_compiler_cflags=$cross_cc_ccflags_i386 7135 7143 ;; 7136 7144 x86_64) 7137 7145 TARGET_BASE_ARCH=i386 7138 7146 mttcg="yes" 7139 7139 - gdb_xml_files="i386-64bit.xml i386-64bit-core.xml i386-64bit-sse.xml" 7147 7147 + gdb_xml_files="i386-64bit.xml" 7140 7148 target_compiler=$cross_cc_x86_64 7141 7149 ;; 7142 7150 alpha)

+8 -4

contrib/elf2dmp/kdbg.h

··· 25 25 uint64_t DebuggerDataList; 26 26 } DBGKD_GET_VERSION64; 27 27 28 28 + #ifndef _WIN32 29 29 + typedef struct LIST_ENTRY64 { 30 30 + struct LIST_ENTRY64 *Flink; 31 31 + struct LIST_ENTRY64 *Blink; 32 32 + } LIST_ENTRY64; 33 33 + #endif 34 34 + 28 35 typedef struct DBGKD_DEBUG_DATA_HEADER64 { 29 29 - struct LIST_ENTRY64 { 30 30 - struct LIST_ENTRY64 *Flink; 31 31 - struct LIST_ENTRY64 *Blink; 32 32 - } List; 36 36 + LIST_ENTRY64 List; 33 37 uint32_t OwnerTag; 34 38 uint32_t Size; 35 39 } DBGKD_DEBUG_DATA_HEADER64;

+15 -12

contrib/elf2dmp/main.c

··· 5 5 * 6 6 */ 7 7 8 8 + #include <inttypes.h> 9 9 + 8 10 #include "qemu/osdep.h" 9 11 #include "err.h" 10 12 #include "addrspace.h" ··· 41 43 #define KUSD_OFFSET_PRODUCT_TYPE 0x264 42 44 43 45 #define SYM_RESOLVE(base, r, s) ((s = pdb_resolve(base, r, #s)),\ 44 44 - s ? printf(#s" = 0x%016lx\n", s) : eprintf("Failed to resolve "#s"\n"), s) 46 46 + s ? printf(#s" = 0x%016"PRIx64"\n", s) :\ 47 47 + eprintf("Failed to resolve "#s"\n"), s) 45 48 46 49 static uint64_t rol(uint64_t x, uint64_t y) 47 50 { ··· 98 101 return NULL; 99 102 } 100 103 101 101 - printf("[KiWaitNever] = 0x%016lx\n", kwn); 102 102 - printf("[KiWaitAlways] = 0x%016lx\n", kwa); 104 104 + printf("[KiWaitNever] = 0x%016"PRIx64"\n", kwn); 105 105 + printf("[KiWaitAlways] = 0x%016"PRIx64"\n", kwa); 103 106 104 107 /* 105 108 * If KDBG header can be decoded, KDBG size is available ··· 202 205 203 206 if (is_system(s)) { 204 207 va_space_set_dtb(vs, s->cr[3]); 205 205 - printf("DTB 0x%016lx has been found from CPU #%zu" 208 208 + printf("DTB 0x%016"PRIx64" has been found from CPU #%zu" 206 209 " as system task CR3\n", vs->dtb, i); 207 210 return !(va_space_resolve(vs, SharedUserData)); 208 211 } ··· 222 225 } 223 226 224 227 va_space_set_dtb(vs, *cr3); 225 225 - printf("DirectoryTableBase = 0x%016lx has been found from CPU #0" 228 228 + printf("DirectoryTableBase = 0x%016"PRIx64" has been found from CPU #0" 226 229 " as interrupt handling CR3\n", vs->dtb); 227 230 return !(va_space_resolve(vs, SharedUserData)); 228 231 } ··· 393 396 return 1; 394 397 } 395 398 396 396 - printf("Debug Directory RVA = 0x%016x\n", 397 397 - data_dir[IMAGE_FILE_DEBUG_DIRECTORY].VirtualAddress); 399 399 + printf("Debug Directory RVA = 0x%08"PRIx32"\n", 400 400 + (uint32_t)data_dir[IMAGE_FILE_DEBUG_DIRECTORY].VirtualAddress); 398 401 399 402 if (va_space_rw(vs, 400 403 base + data_dir[IMAGE_FILE_DEBUG_DIRECTORY].VirtualAddress, ··· 488 491 } 489 492 490 493 state = qemu_elf.state[0]; 491 491 - printf("CPU #0 CR3 is 0x%016lx\n", state->cr[3]); 494 494 + printf("CPU #0 CR3 is 0x%016"PRIx64"\n", state->cr[3]); 492 495 493 496 va_space_create(&vs, &ps, state->cr[3]); 494 497 if (fix_dtb(&vs, &qemu_elf)) { ··· 497 500 goto out_elf; 498 501 } 499 502 500 500 - printf("CPU #0 IDT is at 0x%016lx\n", state->idt.base); 503 503 + printf("CPU #0 IDT is at 0x%016"PRIx64"\n", state->idt.base); 501 504 502 505 if (va_space_rw(&vs, state->idt.base, 503 506 &first_idt_desc, sizeof(first_idt_desc), 0)) { ··· 505 508 err = 1; 506 509 goto out_ps; 507 510 } 508 508 - printf("CPU #0 IDT[0] -> 0x%016lx\n", idt_desc_addr(first_idt_desc)); 511 511 + printf("CPU #0 IDT[0] -> 0x%016"PRIx64"\n", idt_desc_addr(first_idt_desc)); 509 512 510 513 KernBase = idt_desc_addr(first_idt_desc) & ~(PAGE_SIZE - 1); 511 511 - printf("Searching kernel downwards from 0x%16lx...\n", KernBase); 514 514 + printf("Searching kernel downwards from 0x%016"PRIx64"...\n", KernBase); 512 515 513 516 for (; KernBase >= 0xfffff78000000000; KernBase -= PAGE_SIZE) { 514 517 nt_start_addr = va_space_resolve(&vs, KernBase); ··· 521 524 } 522 525 } 523 526 524 524 - printf("KernBase = 0x%16lx, signature is \'%.2s\'\n", KernBase, 527 527 + printf("KernBase = 0x%016"PRIx64", signature is \'%.2s\'\n", KernBase, 525 528 (char *)nt_start_addr); 526 529 527 530 if (pe_get_pdb_symstore_hash(KernBase, nt_start_addr, pdb_hash, &vs)) {

+11 -22

contrib/elf2dmp/pdb.c

··· 18 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA 19 19 */ 20 20 21 21 + #include <inttypes.h> 22 22 + 21 23 #include "qemu/osdep.h" 22 24 #include "pdb.h" 23 25 #include "err.h" ··· 66 68 uint32_t sect_rva = segment->dword[1]; 67 69 uint64_t rva = sect_rva + sym->public_v3.offset; 68 70 69 69 - printf("%s: 0x%016x(%d:\'%.8s\') + 0x%08x = 0x%09lx\n", name, 71 71 + printf("%s: 0x%016x(%d:\'%.8s\') + 0x%08x = 0x%09"PRIx64"\n", name, 70 72 sect_rva, sym->public_v3.segment, 71 73 ((char *)segment - 8), sym->public_v3.offset, rva); 72 74 return rva; ··· 277 279 278 280 int pdb_init_from_file(const char *name, struct pdb_reader *reader) 279 281 { 282 282 + GError *gerr = NULL; 280 283 int err = 0; 281 281 - int fd; 282 284 void *map; 283 283 - struct stat st; 284 285 285 285 - fd = open(name, O_RDONLY, 0); 286 286 - if (fd == -1) { 287 287 - eprintf("Failed to open PDB file \'%s\'\n", name); 286 286 + reader->gmf = g_mapped_file_new(name, TRUE, &gerr); 287 287 + if (gerr) { 288 288 + eprintf("Failed to map PDB file \'%s\'\n", name); 288 289 return 1; 289 290 } 290 290 - reader->fd = fd; 291 291 292 292 - fstat(fd, &st); 293 293 - reader->file_size = st.st_size; 294 294 - 295 295 - map = mmap(NULL, st.st_size, PROT_READ, MAP_PRIVATE, fd, 0); 296 296 - if (map == MAP_FAILED) { 297 297 - eprintf("Failed to map PDB file\n"); 298 298 - err = 1; 299 299 - goto out_fd; 300 300 - } 301 301 - 292 292 + reader->file_size = g_mapped_file_get_length(reader->gmf); 293 293 + map = g_mapped_file_get_contents(reader->gmf); 302 294 if (pdb_reader_init(reader, map)) { 303 295 err = 1; 304 296 goto out_unmap; ··· 307 299 return 0; 308 300 309 301 out_unmap: 310 310 - munmap(map, st.st_size); 311 311 - out_fd: 312 312 - close(fd); 302 302 + g_mapped_file_unref(reader->gmf); 313 303 314 304 return err; 315 305 } 316 306 317 307 void pdb_exit(struct pdb_reader *reader) 318 308 { 319 319 - munmap(reader->ds.header, reader->file_size); 320 320 - close(reader->fd); 309 309 + g_mapped_file_unref(reader->gmf); 321 310 pdb_reader_exit(reader); 322 311 }

+3 -1

contrib/elf2dmp/pdb.h

··· 9 9 #define PDB_H 10 10 11 11 12 12 + #ifndef _WIN32 12 13 typedef struct GUID { 13 14 unsigned int Data1; 14 15 unsigned short Data2; 15 16 unsigned short Data3; 16 17 unsigned char Data4[8]; 17 18 } GUID; 19 19 + #endif 18 20 19 21 struct PDB_FILE { 20 22 uint32_t size; ··· 216 218 #define IMAGE_FILE_MACHINE_AMD64 0x8664 217 219 218 220 struct pdb_reader { 219 219 - int fd; 221 221 + GMappedFile *gmf; 220 222 size_t file_size; 221 223 struct { 222 224 PDB_DS_HEADER *header;

+4 -2

contrib/elf2dmp/pe.h

··· 9 9 #define PE_H 10 10 11 11 12 12 + #ifndef _WIN32 12 13 typedef struct IMAGE_DOS_HEADER { 13 14 uint16_t e_magic; /* 0x00: MZ Header signature */ 14 15 uint16_t e_cblp; /* 0x02: Bytes on last page of file */ ··· 87 88 IMAGE_OPTIONAL_HEADER64 OptionalHeader; 88 89 } __attribute__ ((packed)) IMAGE_NT_HEADERS64; 89 90 90 90 - #define IMAGE_FILE_DEBUG_DIRECTORY 6 91 91 - 92 91 typedef struct IMAGE_DEBUG_DIRECTORY { 93 92 uint32_t Characteristics; 94 93 uint32_t TimeDateStamp; ··· 101 100 } __attribute__ ((packed)) IMAGE_DEBUG_DIRECTORY; 102 101 103 102 #define IMAGE_DEBUG_TYPE_CODEVIEW 2 103 103 + #endif 104 104 + 105 105 + #define IMAGE_FILE_DEBUG_DIRECTORY 6 104 106 105 107 typedef struct guid_t { 106 108 uint32_t a;

+8 -19

contrib/elf2dmp/qemu_elf.c

··· 120 120 121 121 int QEMU_Elf_init(QEMU_Elf *qe, const char *filename) 122 122 { 123 123 + GError *gerr = NULL; 123 124 int err = 0; 124 124 - struct stat st; 125 125 126 126 - qe->fd = open(filename, O_RDONLY, 0); 127 127 - if (qe->fd == -1) { 128 128 - eprintf("Failed to open ELF dump file \'%s\'\n", filename); 126 126 + qe->gmf = g_mapped_file_new(filename, TRUE, &gerr); 127 127 + if (gerr) { 128 128 + eprintf("Failed to map ELF dump file \'%s\'\n", filename); 129 129 return 1; 130 130 } 131 131 132 132 - fstat(qe->fd, &st); 133 133 - qe->size = st.st_size; 134 134 - 135 135 - qe->map = mmap(NULL, qe->size, PROT_READ | PROT_WRITE, 136 136 - MAP_PRIVATE, qe->fd, 0); 137 137 - if (qe->map == MAP_FAILED) { 138 138 - eprintf("Failed to map ELF file\n"); 139 139 - err = 1; 140 140 - goto out_fd; 141 141 - } 132 132 + qe->map = g_mapped_file_get_contents(qe->gmf); 133 133 + qe->size = g_mapped_file_get_length(qe->gmf); 142 134 143 135 if (init_states(qe)) { 144 136 eprintf("Failed to extract QEMU CPU states\n"); ··· 149 141 return 0; 150 142 151 143 out_unmap: 152 152 - munmap(qe->map, qe->size); 153 153 - out_fd: 154 154 - close(qe->fd); 144 144 + g_mapped_file_unref(qe->gmf); 155 145 156 146 return err; 157 147 } ··· 159 149 void QEMU_Elf_exit(QEMU_Elf *qe) 160 150 { 161 151 exit_states(qe); 162 162 - munmap(qe->map, qe->size); 163 163 - close(qe->fd); 152 152 + g_mapped_file_unref(qe->gmf); 164 153 }

+5 -5

contrib/elf2dmp/qemu_elf.h

··· 5 5 * 6 6 */ 7 7 8 8 - #ifndef QEMU_ELF_H 9 9 - #define QEMU_ELF_H 8 8 + #ifndef ELF2DMP_ELF_H 9 9 + #define ELF2DMP_ELF_H 10 10 11 11 - #include <elf.h> 11 11 + #include "elf.h" 12 12 13 13 typedef struct QEMUCPUSegment { 14 14 uint32_t selector; ··· 33 33 int is_system(QEMUCPUState *s); 34 34 35 35 typedef struct QEMU_Elf { 36 36 - int fd; 36 36 + GMappedFile *gmf; 37 37 size_t size; 38 38 void *map; 39 39 QEMUCPUState **state; ··· 47 47 Elf64_Phdr *elf64_getphdr(void *map); 48 48 Elf64_Half elf_getphdrnum(void *map); 49 49 50 50 - #endif /* QEMU_ELF_H */ 50 50 + #endif /* ELF2DMP_ELF_H */

+1 -1

cpus.c

··· 1778 1778 } 1779 1779 cpu->thread_kicked = true; 1780 1780 err = pthread_kill(cpu->thread->thread, SIG_IPI); 1781 1781 - if (err) { 1781 1781 + if (err && err != ESRCH) { 1782 1782 fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); 1783 1783 exit(1); 1784 1784 }

+207 -207

crypto/aes.c

··· 1059 1059 0x55555555U, 0x21212121U, 0x0c0c0c0cU, 0x7d7d7d7dU, 1060 1060 }; 1061 1061 static const u32 rcon[] = { 1062 1062 - 0x01000000, 0x02000000, 0x04000000, 0x08000000, 1063 1063 - 0x10000000, 0x20000000, 0x40000000, 0x80000000, 1064 1064 - 0x1B000000, 0x36000000, /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */ 1062 1062 + 0x01000000, 0x02000000, 0x04000000, 0x08000000, 1063 1063 + 0x10000000, 0x20000000, 0x40000000, 0x80000000, 1064 1064 + 0x1B000000, 0x36000000, /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */ 1065 1065 }; 1066 1066 1067 1067 /** 1068 1068 * Expand the cipher key into the encryption key schedule. 1069 1069 */ 1070 1070 int AES_set_encrypt_key(const unsigned char *userKey, const int bits, 1071 1071 - AES_KEY *key) { 1071 1071 + AES_KEY *key) { 1072 1072 1073 1073 - u32 *rk; 1074 1074 - int i = 0; 1075 1075 - u32 temp; 1073 1073 + u32 *rk; 1074 1074 + int i = 0; 1075 1075 + u32 temp; 1076 1076 1077 1077 - if (!userKey || !key) 1078 1078 - return -1; 1079 1079 - if (bits != 128 && bits != 192 && bits != 256) 1080 1080 - return -2; 1077 1077 + if (!userKey || !key) 1078 1078 + return -1; 1079 1079 + if (bits != 128 && bits != 192 && bits != 256) 1080 1080 + return -2; 1081 1081 1082 1082 - rk = key->rd_key; 1082 1082 + rk = key->rd_key; 1083 1083 1084 1084 - if (bits==128) 1085 1085 - key->rounds = 10; 1086 1086 - else if (bits==192) 1087 1087 - key->rounds = 12; 1088 1088 - else 1089 1089 - key->rounds = 14; 1084 1084 + if (bits==128) 1085 1085 + key->rounds = 10; 1086 1086 + else if (bits==192) 1087 1087 + key->rounds = 12; 1088 1088 + else 1089 1089 + key->rounds = 14; 1090 1090 1091 1091 - rk[0] = GETU32(userKey ); 1092 1092 - rk[1] = GETU32(userKey + 4); 1093 1093 - rk[2] = GETU32(userKey + 8); 1094 1094 - rk[3] = GETU32(userKey + 12); 1095 1095 - if (bits == 128) { 1096 1096 - while (1) { 1097 1097 - temp = rk[3]; 1098 1098 - rk[4] = rk[0] ^ 1091 1091 + rk[0] = GETU32(userKey ); 1092 1092 + rk[1] = GETU32(userKey + 4); 1093 1093 + rk[2] = GETU32(userKey + 8); 1094 1094 + rk[3] = GETU32(userKey + 12); 1095 1095 + if (bits == 128) { 1096 1096 + while (1) { 1097 1097 + temp = rk[3]; 1098 1098 + rk[4] = rk[0] ^ 1099 1099 (AES_Te4[(temp >> 16) & 0xff] & 0xff000000) ^ 1100 1100 (AES_Te4[(temp >> 8) & 0xff] & 0x00ff0000) ^ 1101 1101 (AES_Te4[(temp ) & 0xff] & 0x0000ff00) ^ 1102 1102 (AES_Te4[(temp >> 24) ] & 0x000000ff) ^ 1103 1103 - rcon[i]; 1104 1104 - rk[5] = rk[1] ^ rk[4]; 1105 1105 - rk[6] = rk[2] ^ rk[5]; 1106 1106 - rk[7] = rk[3] ^ rk[6]; 1107 1107 - if (++i == 10) { 1108 1108 - return 0; 1109 1109 - } 1110 1110 - rk += 4; 1111 1111 - } 1112 1112 - } 1113 1113 - rk[4] = GETU32(userKey + 16); 1114 1114 - rk[5] = GETU32(userKey + 20); 1115 1115 - if (bits == 192) { 1116 1116 - while (1) { 1117 1117 - temp = rk[ 5]; 1118 1118 - rk[ 6] = rk[ 0] ^ 1103 1103 + rcon[i]; 1104 1104 + rk[5] = rk[1] ^ rk[4]; 1105 1105 + rk[6] = rk[2] ^ rk[5]; 1106 1106 + rk[7] = rk[3] ^ rk[6]; 1107 1107 + if (++i == 10) { 1108 1108 + return 0; 1109 1109 + } 1110 1110 + rk += 4; 1111 1111 + } 1112 1112 + } 1113 1113 + rk[4] = GETU32(userKey + 16); 1114 1114 + rk[5] = GETU32(userKey + 20); 1115 1115 + if (bits == 192) { 1116 1116 + while (1) { 1117 1117 + temp = rk[ 5]; 1118 1118 + rk[ 6] = rk[ 0] ^ 1119 1119 (AES_Te4[(temp >> 16) & 0xff] & 0xff000000) ^ 1120 1120 (AES_Te4[(temp >> 8) & 0xff] & 0x00ff0000) ^ 1121 1121 (AES_Te4[(temp ) & 0xff] & 0x0000ff00) ^ 1122 1122 (AES_Te4[(temp >> 24) ] & 0x000000ff) ^ 1123 1123 - rcon[i]; 1124 1124 - rk[ 7] = rk[ 1] ^ rk[ 6]; 1125 1125 - rk[ 8] = rk[ 2] ^ rk[ 7]; 1126 1126 - rk[ 9] = rk[ 3] ^ rk[ 8]; 1127 1127 - if (++i == 8) { 1128 1128 - return 0; 1129 1129 - } 1130 1130 - rk[10] = rk[ 4] ^ rk[ 9]; 1131 1131 - rk[11] = rk[ 5] ^ rk[10]; 1132 1132 - rk += 6; 1133 1133 - } 1134 1134 - } 1135 1135 - rk[6] = GETU32(userKey + 24); 1136 1136 - rk[7] = GETU32(userKey + 28); 1137 1137 - if (bits == 256) { 1138 1138 - while (1) { 1139 1139 - temp = rk[ 7]; 1140 1140 - rk[ 8] = rk[ 0] ^ 1123 1123 + rcon[i]; 1124 1124 + rk[ 7] = rk[ 1] ^ rk[ 6]; 1125 1125 + rk[ 8] = rk[ 2] ^ rk[ 7]; 1126 1126 + rk[ 9] = rk[ 3] ^ rk[ 8]; 1127 1127 + if (++i == 8) { 1128 1128 + return 0; 1129 1129 + } 1130 1130 + rk[10] = rk[ 4] ^ rk[ 9]; 1131 1131 + rk[11] = rk[ 5] ^ rk[10]; 1132 1132 + rk += 6; 1133 1133 + } 1134 1134 + } 1135 1135 + rk[6] = GETU32(userKey + 24); 1136 1136 + rk[7] = GETU32(userKey + 28); 1137 1137 + if (bits == 256) { 1138 1138 + while (1) { 1139 1139 + temp = rk[ 7]; 1140 1140 + rk[ 8] = rk[ 0] ^ 1141 1141 (AES_Te4[(temp >> 16) & 0xff] & 0xff000000) ^ 1142 1142 (AES_Te4[(temp >> 8) & 0xff] & 0x00ff0000) ^ 1143 1143 (AES_Te4[(temp ) & 0xff] & 0x0000ff00) ^ 1144 1144 (AES_Te4[(temp >> 24) ] & 0x000000ff) ^ 1145 1145 - rcon[i]; 1146 1146 - rk[ 9] = rk[ 1] ^ rk[ 8]; 1147 1147 - rk[10] = rk[ 2] ^ rk[ 9]; 1148 1148 - rk[11] = rk[ 3] ^ rk[10]; 1149 1149 - if (++i == 7) { 1150 1150 - return 0; 1151 1151 - } 1152 1152 - temp = rk[11]; 1153 1153 - rk[12] = rk[ 4] ^ 1145 1145 + rcon[i]; 1146 1146 + rk[ 9] = rk[ 1] ^ rk[ 8]; 1147 1147 + rk[10] = rk[ 2] ^ rk[ 9]; 1148 1148 + rk[11] = rk[ 3] ^ rk[10]; 1149 1149 + if (++i == 7) { 1150 1150 + return 0; 1151 1151 + } 1152 1152 + temp = rk[11]; 1153 1153 + rk[12] = rk[ 4] ^ 1154 1154 (AES_Te4[(temp >> 24) ] & 0xff000000) ^ 1155 1155 (AES_Te4[(temp >> 16) & 0xff] & 0x00ff0000) ^ 1156 1156 (AES_Te4[(temp >> 8) & 0xff] & 0x0000ff00) ^ 1157 1157 (AES_Te4[(temp ) & 0xff] & 0x000000ff); 1158 1158 - rk[13] = rk[ 5] ^ rk[12]; 1159 1159 - rk[14] = rk[ 6] ^ rk[13]; 1160 1160 - rk[15] = rk[ 7] ^ rk[14]; 1158 1158 + rk[13] = rk[ 5] ^ rk[12]; 1159 1159 + rk[14] = rk[ 6] ^ rk[13]; 1160 1160 + rk[15] = rk[ 7] ^ rk[14]; 1161 1161 1162 1162 - rk += 8; 1163 1163 - } 1164 1164 - } 1162 1162 + rk += 8; 1163 1163 + } 1164 1164 + } 1165 1165 abort(); 1166 1166 } 1167 1167 ··· 1169 1169 * Expand the cipher key into the decryption key schedule. 1170 1170 */ 1171 1171 int AES_set_decrypt_key(const unsigned char *userKey, const int bits, 1172 1172 - AES_KEY *key) { 1172 1172 + AES_KEY *key) { 1173 1173 1174 1174 u32 *rk; 1175 1175 - int i, j, status; 1176 1176 - u32 temp; 1175 1175 + int i, j, status; 1176 1176 + u32 temp; 1177 1177 1178 1178 - /* first, start with an encryption schedule */ 1179 1179 - status = AES_set_encrypt_key(userKey, bits, key); 1180 1180 - if (status < 0) 1181 1181 - return status; 1178 1178 + /* first, start with an encryption schedule */ 1179 1179 + status = AES_set_encrypt_key(userKey, bits, key); 1180 1180 + if (status < 0) 1181 1181 + return status; 1182 1182 1183 1183 - rk = key->rd_key; 1183 1183 + rk = key->rd_key; 1184 1184 1185 1185 - /* invert the order of the round keys: */ 1186 1186 - for (i = 0, j = 4*(key->rounds); i < j; i += 4, j -= 4) { 1187 1187 - temp = rk[i ]; rk[i ] = rk[j ]; rk[j ] = temp; 1188 1188 - temp = rk[i + 1]; rk[i + 1] = rk[j + 1]; rk[j + 1] = temp; 1189 1189 - temp = rk[i + 2]; rk[i + 2] = rk[j + 2]; rk[j + 2] = temp; 1190 1190 - temp = rk[i + 3]; rk[i + 3] = rk[j + 3]; rk[j + 3] = temp; 1191 1191 - } 1192 1192 - /* apply the inverse MixColumn transform to all round keys but the first and the last: */ 1193 1193 - for (i = 1; i < (key->rounds); i++) { 1194 1194 - rk += 4; 1195 1195 - rk[0] = 1185 1185 + /* invert the order of the round keys: */ 1186 1186 + for (i = 0, j = 4*(key->rounds); i < j; i += 4, j -= 4) { 1187 1187 + temp = rk[i ]; rk[i ] = rk[j ]; rk[j ] = temp; 1188 1188 + temp = rk[i + 1]; rk[i + 1] = rk[j + 1]; rk[j + 1] = temp; 1189 1189 + temp = rk[i + 2]; rk[i + 2] = rk[j + 2]; rk[j + 2] = temp; 1190 1190 + temp = rk[i + 3]; rk[i + 3] = rk[j + 3]; rk[j + 3] = temp; 1191 1191 + } 1192 1192 + /* apply the inverse MixColumn transform to all round keys but the first and the last: */ 1193 1193 + for (i = 1; i < (key->rounds); i++) { 1194 1194 + rk += 4; 1195 1195 + rk[0] = 1196 1196 AES_Td0[AES_Te4[(rk[0] >> 24) ] & 0xff] ^ 1197 1197 AES_Td1[AES_Te4[(rk[0] >> 16) & 0xff] & 0xff] ^ 1198 1198 AES_Td2[AES_Te4[(rk[0] >> 8) & 0xff] & 0xff] ^ 1199 1199 AES_Td3[AES_Te4[(rk[0] ) & 0xff] & 0xff]; 1200 1200 - rk[1] = 1200 1200 + rk[1] = 1201 1201 AES_Td0[AES_Te4[(rk[1] >> 24) ] & 0xff] ^ 1202 1202 AES_Td1[AES_Te4[(rk[1] >> 16) & 0xff] & 0xff] ^ 1203 1203 AES_Td2[AES_Te4[(rk[1] >> 8) & 0xff] & 0xff] ^ 1204 1204 AES_Td3[AES_Te4[(rk[1] ) & 0xff] & 0xff]; 1205 1205 - rk[2] = 1205 1205 + rk[2] = 1206 1206 AES_Td0[AES_Te4[(rk[2] >> 24) ] & 0xff] ^ 1207 1207 AES_Td1[AES_Te4[(rk[2] >> 16) & 0xff] & 0xff] ^ 1208 1208 AES_Td2[AES_Te4[(rk[2] >> 8) & 0xff] & 0xff] ^ 1209 1209 AES_Td3[AES_Te4[(rk[2] ) & 0xff] & 0xff]; 1210 1210 - rk[3] = 1210 1210 + rk[3] = 1211 1211 AES_Td0[AES_Te4[(rk[3] >> 24) ] & 0xff] ^ 1212 1212 AES_Td1[AES_Te4[(rk[3] >> 16) & 0xff] & 0xff] ^ 1213 1213 AES_Td2[AES_Te4[(rk[3] >> 8) & 0xff] & 0xff] ^ 1214 1214 AES_Td3[AES_Te4[(rk[3] ) & 0xff] & 0xff]; 1215 1215 - } 1216 1216 - return 0; 1215 1215 + } 1216 1216 + return 0; 1217 1217 } 1218 1218 1219 1219 #ifndef AES_ASM ··· 1222 1222 * in and out can overlap 1223 1223 */ 1224 1224 void AES_encrypt(const unsigned char *in, unsigned char *out, 1225 1225 - const AES_KEY *key) { 1225 1225 + const AES_KEY *key) { 1226 1226 1227 1227 - const u32 *rk; 1228 1228 - u32 s0, s1, s2, s3, t0, t1, t2, t3; 1227 1227 + const u32 *rk; 1228 1228 + u32 s0, s1, s2, s3, t0, t1, t2, t3; 1229 1229 #ifndef FULL_UNROLL 1230 1230 - int r; 1230 1230 + int r; 1231 1231 #endif /* ?FULL_UNROLL */ 1232 1232 1233 1233 - assert(in && out && key); 1234 1234 - rk = key->rd_key; 1233 1233 + assert(in && out && key); 1234 1234 + rk = key->rd_key; 1235 1235 1236 1236 - /* 1237 1237 - * map byte array block to cipher state 1238 1238 - * and add initial round key: 1239 1239 - */ 1240 1240 - s0 = GETU32(in ) ^ rk[0]; 1241 1241 - s1 = GETU32(in + 4) ^ rk[1]; 1242 1242 - s2 = GETU32(in + 8) ^ rk[2]; 1243 1243 - s3 = GETU32(in + 12) ^ rk[3]; 1236 1236 + /* 1237 1237 + * map byte array block to cipher state 1238 1238 + * and add initial round key: 1239 1239 + */ 1240 1240 + s0 = GETU32(in ) ^ rk[0]; 1241 1241 + s1 = GETU32(in + 4) ^ rk[1]; 1242 1242 + s2 = GETU32(in + 8) ^ rk[2]; 1243 1243 + s3 = GETU32(in + 12) ^ rk[3]; 1244 1244 #ifdef FULL_UNROLL 1245 1245 - /* round 1: */ 1245 1245 + /* round 1: */ 1246 1246 t0 = AES_Te0[s0 >> 24] ^ AES_Te1[(s1 >> 16) & 0xff] ^ AES_Te2[(s2 >> 8) & 0xff] ^ AES_Te3[s3 & 0xff] ^ rk[ 4]; 1247 1247 t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[ 5]; 1248 1248 t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[ 6]; 1249 1249 t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0xff] ^ rk[ 7]; 1250 1250 - /* round 2: */ 1250 1250 + /* round 2: */ 1251 1251 s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[ 8]; 1252 1252 s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0xff] ^ rk[ 9]; 1253 1253 s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0xff] ^ rk[10]; 1254 1254 s3 = AES_Te0[t3 >> 24] ^ AES_Te1[(t0 >> 16) & 0xff] ^ AES_Te2[(t1 >> 8) & 0xff] ^ AES_Te3[t2 & 0xff] ^ rk[11]; 1255 1255 - /* round 3: */ 1255 1255 + /* round 3: */ 1256 1256 t0 = AES_Te0[s0 >> 24] ^ AES_Te1[(s1 >> 16) & 0xff] ^ AES_Te2[(s2 >> 8) & 0xff] ^ AES_Te3[s3 & 0xff] ^ rk[12]; 1257 1257 t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[13]; 1258 1258 t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[14]; 1259 1259 t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0xff] ^ rk[15]; 1260 1260 - /* round 4: */ 1260 1260 + /* round 4: */ 1261 1261 s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[16]; 1262 1262 s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0xff] ^ rk[17]; 1263 1263 s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0xff] ^ rk[18]; 1264 1264 s3 = AES_Te0[t3 >> 24] ^ AES_Te1[(t0 >> 16) & 0xff] ^ AES_Te2[(t1 >> 8) & 0xff] ^ AES_Te3[t2 & 0xff] ^ rk[19]; 1265 1265 - /* round 5: */ 1265 1265 + /* round 5: */ 1266 1266 t0 = AES_Te0[s0 >> 24] ^ AES_Te1[(s1 >> 16) & 0xff] ^ AES_Te2[(s2 >> 8) & 0xff] ^ AES_Te3[s3 & 0xff] ^ rk[20]; 1267 1267 t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[21]; 1268 1268 t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[22]; 1269 1269 t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0xff] ^ rk[23]; 1270 1270 - /* round 6: */ 1270 1270 + /* round 6: */ 1271 1271 s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[24]; 1272 1272 s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0xff] ^ rk[25]; 1273 1273 s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0xff] ^ rk[26]; 1274 1274 s3 = AES_Te0[t3 >> 24] ^ AES_Te1[(t0 >> 16) & 0xff] ^ AES_Te2[(t1 >> 8) & 0xff] ^ AES_Te3[t2 & 0xff] ^ rk[27]; 1275 1275 - /* round 7: */ 1275 1275 + /* round 7: */ 1276 1276 t0 = AES_Te0[s0 >> 24] ^ AES_Te1[(s1 >> 16) & 0xff] ^ AES_Te2[(s2 >> 8) & 0xff] ^ AES_Te3[s3 & 0xff] ^ rk[28]; 1277 1277 t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[29]; 1278 1278 t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[30]; 1279 1279 t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0xff] ^ rk[31]; 1280 1280 - /* round 8: */ 1280 1280 + /* round 8: */ 1281 1281 s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[32]; 1282 1282 s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0xff] ^ rk[33]; 1283 1283 s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0xff] ^ rk[34]; 1284 1284 s3 = AES_Te0[t3 >> 24] ^ AES_Te1[(t0 >> 16) & 0xff] ^ AES_Te2[(t1 >> 8) & 0xff] ^ AES_Te3[t2 & 0xff] ^ rk[35]; 1285 1285 - /* round 9: */ 1285 1285 + /* round 9: */ 1286 1286 t0 = AES_Te0[s0 >> 24] ^ AES_Te1[(s1 >> 16) & 0xff] ^ AES_Te2[(s2 >> 8) & 0xff] ^ AES_Te3[s3 & 0xff] ^ rk[36]; 1287 1287 t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[37]; 1288 1288 t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[38]; ··· 1375 1375 } 1376 1376 #endif /* ?FULL_UNROLL */ 1377 1377 /* 1378 1378 - * apply last round and 1379 1379 - * map cipher state to byte array block: 1380 1380 - */ 1381 1381 - s0 = 1378 1378 + * apply last round and 1379 1379 + * map cipher state to byte array block: 1380 1380 + */ 1381 1381 + s0 = 1382 1382 (AES_Te4[(t0 >> 24) ] & 0xff000000) ^ 1383 1383 (AES_Te4[(t1 >> 16) & 0xff] & 0x00ff0000) ^ 1384 1384 (AES_Te4[(t2 >> 8) & 0xff] & 0x0000ff00) ^ 1385 1385 (AES_Te4[(t3 ) & 0xff] & 0x000000ff) ^ 1386 1386 - rk[0]; 1387 1387 - PUTU32(out , s0); 1388 1388 - s1 = 1386 1386 + rk[0]; 1387 1387 + PUTU32(out , s0); 1388 1388 + s1 = 1389 1389 (AES_Te4[(t1 >> 24) ] & 0xff000000) ^ 1390 1390 (AES_Te4[(t2 >> 16) & 0xff] & 0x00ff0000) ^ 1391 1391 (AES_Te4[(t3 >> 8) & 0xff] & 0x0000ff00) ^ 1392 1392 (AES_Te4[(t0 ) & 0xff] & 0x000000ff) ^ 1393 1393 - rk[1]; 1394 1394 - PUTU32(out + 4, s1); 1395 1395 - s2 = 1393 1393 + rk[1]; 1394 1394 + PUTU32(out + 4, s1); 1395 1395 + s2 = 1396 1396 (AES_Te4[(t2 >> 24) ] & 0xff000000) ^ 1397 1397 (AES_Te4[(t3 >> 16) & 0xff] & 0x00ff0000) ^ 1398 1398 (AES_Te4[(t0 >> 8) & 0xff] & 0x0000ff00) ^ 1399 1399 (AES_Te4[(t1 ) & 0xff] & 0x000000ff) ^ 1400 1400 - rk[2]; 1401 1401 - PUTU32(out + 8, s2); 1402 1402 - s3 = 1400 1400 + rk[2]; 1401 1401 + PUTU32(out + 8, s2); 1402 1402 + s3 = 1403 1403 (AES_Te4[(t3 >> 24) ] & 0xff000000) ^ 1404 1404 (AES_Te4[(t0 >> 16) & 0xff] & 0x00ff0000) ^ 1405 1405 (AES_Te4[(t1 >> 8) & 0xff] & 0x0000ff00) ^ 1406 1406 (AES_Te4[(t2 ) & 0xff] & 0x000000ff) ^ 1407 1407 - rk[3]; 1408 1408 - PUTU32(out + 12, s3); 1407 1407 + rk[3]; 1408 1408 + PUTU32(out + 12, s3); 1409 1409 } 1410 1410 1411 1411 /* ··· 1413 1413 * in and out can overlap 1414 1414 */ 1415 1415 void AES_decrypt(const unsigned char *in, unsigned char *out, 1416 1416 - const AES_KEY *key) { 1416 1416 + const AES_KEY *key) { 1417 1417 1418 1418 - const u32 *rk; 1419 1419 - u32 s0, s1, s2, s3, t0, t1, t2, t3; 1418 1418 + const u32 *rk; 1419 1419 + u32 s0, s1, s2, s3, t0, t1, t2, t3; 1420 1420 #ifndef FULL_UNROLL 1421 1421 - int r; 1421 1421 + int r; 1422 1422 #endif /* ?FULL_UNROLL */ 1423 1423 1424 1424 - assert(in && out && key); 1425 1425 - rk = key->rd_key; 1424 1424 + assert(in && out && key); 1425 1425 + rk = key->rd_key; 1426 1426 1427 1427 - /* 1428 1428 - * map byte array block to cipher state 1429 1429 - * and add initial round key: 1430 1430 - */ 1427 1427 + /* 1428 1428 + * map byte array block to cipher state 1429 1429 + * and add initial round key: 1430 1430 + */ 1431 1431 s0 = GETU32(in ) ^ rk[0]; 1432 1432 s1 = GETU32(in + 4) ^ rk[1]; 1433 1433 s2 = GETU32(in + 8) ^ rk[2]; ··· 1502 1502 t3 = AES_Td0[s3 >> 24] ^ AES_Td1[(s2 >> 16) & 0xff] ^ AES_Td2[(s1 >> 8) & 0xff] ^ AES_Td3[s0 & 0xff] ^ rk[55]; 1503 1503 } 1504 1504 } 1505 1505 - rk += key->rounds << 2; 1505 1505 + rk += key->rounds << 2; 1506 1506 #else /* !FULL_UNROLL */ 1507 1507 /* 1508 1508 * Nr - 1 full rounds: ··· 1566 1566 } 1567 1567 #endif /* ?FULL_UNROLL */ 1568 1568 /* 1569 1569 - * apply last round and 1570 1570 - * map cipher state to byte array block: 1571 1571 - */ 1572 1572 - s0 = 1569 1569 + * apply last round and 1570 1570 + * map cipher state to byte array block: 1571 1571 + */ 1572 1572 + s0 = 1573 1573 (AES_Td4[(t0 >> 24) ] & 0xff000000) ^ 1574 1574 (AES_Td4[(t3 >> 16) & 0xff] & 0x00ff0000) ^ 1575 1575 (AES_Td4[(t2 >> 8) & 0xff] & 0x0000ff00) ^ 1576 1576 (AES_Td4[(t1 ) & 0xff] & 0x000000ff) ^ 1577 1577 - rk[0]; 1578 1578 - PUTU32(out , s0); 1579 1579 - s1 = 1577 1577 + rk[0]; 1578 1578 + PUTU32(out , s0); 1579 1579 + s1 = 1580 1580 (AES_Td4[(t1 >> 24) ] & 0xff000000) ^ 1581 1581 (AES_Td4[(t0 >> 16) & 0xff] & 0x00ff0000) ^ 1582 1582 (AES_Td4[(t3 >> 8) & 0xff] & 0x0000ff00) ^ 1583 1583 (AES_Td4[(t2 ) & 0xff] & 0x000000ff) ^ 1584 1584 - rk[1]; 1585 1585 - PUTU32(out + 4, s1); 1586 1586 - s2 = 1584 1584 + rk[1]; 1585 1585 + PUTU32(out + 4, s1); 1586 1586 + s2 = 1587 1587 (AES_Td4[(t2 >> 24) ] & 0xff000000) ^ 1588 1588 (AES_Td4[(t1 >> 16) & 0xff] & 0x00ff0000) ^ 1589 1589 (AES_Td4[(t0 >> 8) & 0xff] & 0x0000ff00) ^ 1590 1590 (AES_Td4[(t3 ) & 0xff] & 0x000000ff) ^ 1591 1591 - rk[2]; 1592 1592 - PUTU32(out + 8, s2); 1593 1593 - s3 = 1591 1591 + rk[2]; 1592 1592 + PUTU32(out + 8, s2); 1593 1593 + s3 = 1594 1594 (AES_Td4[(t3 >> 24) ] & 0xff000000) ^ 1595 1595 (AES_Td4[(t2 >> 16) & 0xff] & 0x00ff0000) ^ 1596 1596 (AES_Td4[(t1 >> 8) & 0xff] & 0x0000ff00) ^ 1597 1597 (AES_Td4[(t0 ) & 0xff] & 0x000000ff) ^ 1598 1598 - rk[3]; 1599 1599 - PUTU32(out + 12, s3); 1598 1598 + rk[3]; 1599 1599 + PUTU32(out + 12, s3); 1600 1600 } 1601 1601 1602 1602 #endif /* AES_ASM */ 1603 1603 1604 1604 void AES_cbc_encrypt(const unsigned char *in, unsigned char *out, 1605 1605 - const unsigned long length, const AES_KEY *key, 1606 1606 - unsigned char *ivec, const int enc) 1605 1605 + const unsigned long length, const AES_KEY *key, 1606 1606 + unsigned char *ivec, const int enc) 1607 1607 { 1608 1608 1609 1609 - unsigned long n; 1610 1610 - unsigned long len = length; 1611 1611 - unsigned char tmp[AES_BLOCK_SIZE]; 1609 1609 + unsigned long n; 1610 1610 + unsigned long len = length; 1611 1611 + unsigned char tmp[AES_BLOCK_SIZE]; 1612 1612 1613 1613 - assert(in && out && key && ivec); 1613 1613 + assert(in && out && key && ivec); 1614 1614 1615 1615 - if (enc) { 1616 1616 - while (len >= AES_BLOCK_SIZE) { 1617 1617 - for(n=0; n < AES_BLOCK_SIZE; ++n) 1618 1618 - tmp[n] = in[n] ^ ivec[n]; 1619 1619 - AES_encrypt(tmp, out, key); 1620 1620 - memcpy(ivec, out, AES_BLOCK_SIZE); 1621 1621 - len -= AES_BLOCK_SIZE; 1622 1622 - in += AES_BLOCK_SIZE; 1623 1623 - out += AES_BLOCK_SIZE; 1624 1624 - } 1625 1625 - if (len) { 1626 1626 - for(n=0; n < len; ++n) 1627 1627 - tmp[n] = in[n] ^ ivec[n]; 1628 1628 - for(n=len; n < AES_BLOCK_SIZE; ++n) 1629 1629 - tmp[n] = ivec[n]; 1630 1630 - AES_encrypt(tmp, tmp, key); 1631 1631 - memcpy(out, tmp, AES_BLOCK_SIZE); 1632 1632 - memcpy(ivec, tmp, AES_BLOCK_SIZE); 1633 1633 - } 1634 1634 - } else { 1635 1635 - while (len >= AES_BLOCK_SIZE) { 1636 1636 - memcpy(tmp, in, AES_BLOCK_SIZE); 1637 1637 - AES_decrypt(in, out, key); 1638 1638 - for(n=0; n < AES_BLOCK_SIZE; ++n) 1639 1639 - out[n] ^= ivec[n]; 1640 1640 - memcpy(ivec, tmp, AES_BLOCK_SIZE); 1641 1641 - len -= AES_BLOCK_SIZE; 1642 1642 - in += AES_BLOCK_SIZE; 1643 1643 - out += AES_BLOCK_SIZE; 1644 1644 - } 1645 1645 - if (len) { 1646 1646 - memcpy(tmp, in, AES_BLOCK_SIZE); 1647 1647 - AES_decrypt(tmp, tmp, key); 1648 1648 - for(n=0; n < len; ++n) 1649 1649 - out[n] = tmp[n] ^ ivec[n]; 1650 1650 - memcpy(ivec, tmp, AES_BLOCK_SIZE); 1651 1651 - } 1652 1652 - } 1615 1615 + if (enc) { 1616 1616 + while (len >= AES_BLOCK_SIZE) { 1617 1617 + for(n=0; n < AES_BLOCK_SIZE; ++n) 1618 1618 + tmp[n] = in[n] ^ ivec[n]; 1619 1619 + AES_encrypt(tmp, out, key); 1620 1620 + memcpy(ivec, out, AES_BLOCK_SIZE); 1621 1621 + len -= AES_BLOCK_SIZE; 1622 1622 + in += AES_BLOCK_SIZE; 1623 1623 + out += AES_BLOCK_SIZE; 1624 1624 + } 1625 1625 + if (len) { 1626 1626 + for(n=0; n < len; ++n) 1627 1627 + tmp[n] = in[n] ^ ivec[n]; 1628 1628 + for(n=len; n < AES_BLOCK_SIZE; ++n) 1629 1629 + tmp[n] = ivec[n]; 1630 1630 + AES_encrypt(tmp, tmp, key); 1631 1631 + memcpy(out, tmp, AES_BLOCK_SIZE); 1632 1632 + memcpy(ivec, tmp, AES_BLOCK_SIZE); 1633 1633 + } 1634 1634 + } else { 1635 1635 + while (len >= AES_BLOCK_SIZE) { 1636 1636 + memcpy(tmp, in, AES_BLOCK_SIZE); 1637 1637 + AES_decrypt(in, out, key); 1638 1638 + for(n=0; n < AES_BLOCK_SIZE; ++n) 1639 1639 + out[n] ^= ivec[n]; 1640 1640 + memcpy(ivec, tmp, AES_BLOCK_SIZE); 1641 1641 + len -= AES_BLOCK_SIZE; 1642 1642 + in += AES_BLOCK_SIZE; 1643 1643 + out += AES_BLOCK_SIZE; 1644 1644 + } 1645 1645 + if (len) { 1646 1646 + memcpy(tmp, in, AES_BLOCK_SIZE); 1647 1647 + AES_decrypt(tmp, tmp, key); 1648 1648 + for(n=0; n < len; ++n) 1649 1649 + out[n] = tmp[n] ^ ivec[n]; 1650 1650 + memcpy(ivec, tmp, AES_BLOCK_SIZE); 1651 1651 + } 1652 1652 + } 1653 1653 }

+292 -292

crypto/desrfb.c

··· 37 37 static unsigned long KnL[32] = { 0L }; 38 38 39 39 static const unsigned short bytebit[8] = { 40 40 - 01, 02, 04, 010, 020, 040, 0100, 0200 }; 40 40 + 01, 02, 04, 010, 020, 040, 0100, 0200 }; 41 41 42 42 static const unsigned long bigbyte[24] = { 43 43 - 0x800000L, 0x400000L, 0x200000L, 0x100000L, 44 44 - 0x80000L, 0x40000L, 0x20000L, 0x10000L, 45 45 - 0x8000L, 0x4000L, 0x2000L, 0x1000L, 46 46 - 0x800L, 0x400L, 0x200L, 0x100L, 47 47 - 0x80L, 0x40L, 0x20L, 0x10L, 48 48 - 0x8L, 0x4L, 0x2L, 0x1L }; 43 43 + 0x800000L, 0x400000L, 0x200000L, 0x100000L, 44 44 + 0x80000L, 0x40000L, 0x20000L, 0x10000L, 45 45 + 0x8000L, 0x4000L, 0x2000L, 0x1000L, 46 46 + 0x800L, 0x400L, 0x200L, 0x100L, 47 47 + 0x80L, 0x40L, 0x20L, 0x10L, 48 48 + 0x8L, 0x4L, 0x2L, 0x1L }; 49 49 50 50 /* Use the key schedule specified in the Standard (ANSI X3.92-1981). */ 51 51 52 52 static const unsigned char pc1[56] = { 53 53 - 56, 48, 40, 32, 24, 16, 8, 0, 57, 49, 41, 33, 25, 17, 54 54 - 9, 1, 58, 50, 42, 34, 26, 18, 10, 2, 59, 51, 43, 35, 55 55 - 62, 54, 46, 38, 30, 22, 14, 6, 61, 53, 45, 37, 29, 21, 56 56 - 13, 5, 60, 52, 44, 36, 28, 20, 12, 4, 27, 19, 11, 3 }; 53 53 + 56, 48, 40, 32, 24, 16, 8, 0, 57, 49, 41, 33, 25, 17, 54 54 + 9, 1, 58, 50, 42, 34, 26, 18, 10, 2, 59, 51, 43, 35, 55 55 + 62, 54, 46, 38, 30, 22, 14, 6, 61, 53, 45, 37, 29, 21, 56 56 + 13, 5, 60, 52, 44, 36, 28, 20, 12, 4, 27, 19, 11, 3 }; 57 57 58 58 static const unsigned char totrot[16] = { 59 59 - 1,2,4,6,8,10,12,14,15,17,19,21,23,25,27,28 }; 59 59 + 1,2,4,6,8,10,12,14,15,17,19,21,23,25,27,28 }; 60 60 61 61 static const unsigned char pc2[48] = { 62 62 - 13, 16, 10, 23, 0, 4, 2, 27, 14, 5, 20, 9, 63 63 - 22, 18, 11, 3, 25, 7, 15, 6, 26, 19, 12, 1, 64 64 - 40, 51, 30, 36, 46, 54, 29, 39, 50, 44, 32, 47, 65 65 - 43, 48, 38, 55, 33, 52, 45, 41, 49, 35, 28, 31 }; 62 62 + 13, 16, 10, 23, 0, 4, 2, 27, 14, 5, 20, 9, 63 63 + 22, 18, 11, 3, 25, 7, 15, 6, 26, 19, 12, 1, 64 64 + 40, 51, 30, 36, 46, 54, 29, 39, 50, 44, 32, 47, 65 65 + 43, 48, 38, 55, 33, 52, 45, 41, 49, 35, 28, 31 }; 66 66 67 67 /* Thanks to James Gillogly & Phil Karn! */ 68 68 void deskey(unsigned char *key, int edf) 69 69 { 70 70 - register int i, j, l, m, n; 71 71 - unsigned char pc1m[56], pcr[56]; 72 72 - unsigned long kn[32]; 70 70 + register int i, j, l, m, n; 71 71 + unsigned char pc1m[56], pcr[56]; 72 72 + unsigned long kn[32]; 73 73 74 74 - for ( j = 0; j < 56; j++ ) { 75 75 - l = pc1[j]; 76 76 - m = l & 07; 77 77 - pc1m[j] = (key[l >> 3] & bytebit[m]) ? 1 : 0; 78 78 - } 79 79 - for( i = 0; i < 16; i++ ) { 80 80 - if( edf == DE1 ) m = (15 - i) << 1; 81 81 - else m = i << 1; 82 82 - n = m + 1; 83 83 - kn[m] = kn[n] = 0L; 84 84 - for( j = 0; j < 28; j++ ) { 85 85 - l = j + totrot[i]; 86 86 - if( l < 28 ) pcr[j] = pc1m[l]; 87 87 - else pcr[j] = pc1m[l - 28]; 88 88 - } 89 89 - for( j = 28; j < 56; j++ ) { 90 90 - l = j + totrot[i]; 91 91 - if( l < 56 ) pcr[j] = pc1m[l]; 92 92 - else pcr[j] = pc1m[l - 28]; 93 93 - } 94 94 - for( j = 0; j < 24; j++ ) { 95 95 - if( pcr[pc2[j]] ) kn[m] |= bigbyte[j]; 96 96 - if( pcr[pc2[j+24]] ) kn[n] |= bigbyte[j]; 97 97 - } 98 98 - } 99 99 - cookey(kn); 100 100 - return; 101 101 - } 74 74 + for ( j = 0; j < 56; j++ ) { 75 75 + l = pc1[j]; 76 76 + m = l & 07; 77 77 + pc1m[j] = (key[l >> 3] & bytebit[m]) ? 1 : 0; 78 78 + } 79 79 + for( i = 0; i < 16; i++ ) { 80 80 + if( edf == DE1 ) m = (15 - i) << 1; 81 81 + else m = i << 1; 82 82 + n = m + 1; 83 83 + kn[m] = kn[n] = 0L; 84 84 + for( j = 0; j < 28; j++ ) { 85 85 + l = j + totrot[i]; 86 86 + if( l < 28 ) pcr[j] = pc1m[l]; 87 87 + else pcr[j] = pc1m[l - 28]; 88 88 + } 89 89 + for( j = 28; j < 56; j++ ) { 90 90 + l = j + totrot[i]; 91 91 + if( l < 56 ) pcr[j] = pc1m[l]; 92 92 + else pcr[j] = pc1m[l - 28]; 93 93 + } 94 94 + for( j = 0; j < 24; j++ ) { 95 95 + if( pcr[pc2[j]] ) kn[m] |= bigbyte[j]; 96 96 + if( pcr[pc2[j+24]] ) kn[n] |= bigbyte[j]; 97 97 + } 98 98 + } 99 99 + cookey(kn); 100 100 + return; 101 101 + } 102 102 103 103 static void cookey(register unsigned long *raw1) 104 104 { 105 105 - register unsigned long *cook, *raw0; 106 106 - unsigned long dough[32]; 107 107 - register int i; 105 105 + register unsigned long *cook, *raw0; 106 106 + unsigned long dough[32]; 107 107 + register int i; 108 108 109 109 - cook = dough; 110 110 - for( i = 0; i < 16; i++, raw1++ ) { 111 111 - raw0 = raw1++; 112 112 - *cook = (*raw0 & 0x00fc0000L) << 6; 113 113 - *cook |= (*raw0 & 0x00000fc0L) << 10; 114 114 - *cook |= (*raw1 & 0x00fc0000L) >> 10; 115 115 - *cook++ |= (*raw1 & 0x00000fc0L) >> 6; 116 116 - *cook = (*raw0 & 0x0003f000L) << 12; 117 117 - *cook |= (*raw0 & 0x0000003fL) << 16; 118 118 - *cook |= (*raw1 & 0x0003f000L) >> 4; 119 119 - *cook++ |= (*raw1 & 0x0000003fL); 120 120 - } 121 121 - usekey(dough); 122 122 - return; 123 123 - } 109 109 + cook = dough; 110 110 + for( i = 0; i < 16; i++, raw1++ ) { 111 111 + raw0 = raw1++; 112 112 + *cook = (*raw0 & 0x00fc0000L) << 6; 113 113 + *cook |= (*raw0 & 0x00000fc0L) << 10; 114 114 + *cook |= (*raw1 & 0x00fc0000L) >> 10; 115 115 + *cook++ |= (*raw1 & 0x00000fc0L) >> 6; 116 116 + *cook = (*raw0 & 0x0003f000L) << 12; 117 117 + *cook |= (*raw0 & 0x0000003fL) << 16; 118 118 + *cook |= (*raw1 & 0x0003f000L) >> 4; 119 119 + *cook++ |= (*raw1 & 0x0000003fL); 120 120 + } 121 121 + usekey(dough); 122 122 + return; 123 123 + } 124 124 125 125 void usekey(register unsigned long *from) 126 126 { 127 127 - register unsigned long *to, *endp; 127 127 + register unsigned long *to, *endp; 128 128 129 129 - to = KnL, endp = &KnL[32]; 130 130 - while( to < endp ) *to++ = *from++; 131 131 - return; 132 132 - } 129 129 + to = KnL, endp = &KnL[32]; 130 130 + while( to < endp ) *to++ = *from++; 131 131 + return; 132 132 + } 133 133 134 134 void des(unsigned char *inblock, unsigned char *outblock) 135 135 { 136 136 - unsigned long work[2]; 136 136 + unsigned long work[2]; 137 137 138 138 - scrunch(inblock, work); 139 139 - desfunc(work, KnL); 140 140 - unscrun(work, outblock); 141 141 - return; 142 142 - } 138 138 + scrunch(inblock, work); 139 139 + desfunc(work, KnL); 140 140 + unscrun(work, outblock); 141 141 + return; 142 142 + } 143 143 144 144 static void scrunch(register unsigned char *outof, register unsigned long *into) 145 145 { 146 146 - *into = (*outof++ & 0xffL) << 24; 147 147 - *into |= (*outof++ & 0xffL) << 16; 148 148 - *into |= (*outof++ & 0xffL) << 8; 149 149 - *into++ |= (*outof++ & 0xffL); 150 150 - *into = (*outof++ & 0xffL) << 24; 151 151 - *into |= (*outof++ & 0xffL) << 16; 152 152 - *into |= (*outof++ & 0xffL) << 8; 153 153 - *into |= (*outof & 0xffL); 154 154 - return; 155 155 - } 146 146 + *into = (*outof++ & 0xffL) << 24; 147 147 + *into |= (*outof++ & 0xffL) << 16; 148 148 + *into |= (*outof++ & 0xffL) << 8; 149 149 + *into++ |= (*outof++ & 0xffL); 150 150 + *into = (*outof++ & 0xffL) << 24; 151 151 + *into |= (*outof++ & 0xffL) << 16; 152 152 + *into |= (*outof++ & 0xffL) << 8; 153 153 + *into |= (*outof & 0xffL); 154 154 + return; 155 155 + } 156 156 157 157 static void unscrun(register unsigned long *outof, register unsigned char *into) 158 158 { 159 159 - *into++ = (unsigned char)((*outof >> 24) & 0xffL); 160 160 - *into++ = (unsigned char)((*outof >> 16) & 0xffL); 161 161 - *into++ = (unsigned char)((*outof >> 8) & 0xffL); 162 162 - *into++ = (unsigned char)(*outof++ & 0xffL); 163 163 - *into++ = (unsigned char)((*outof >> 24) & 0xffL); 164 164 - *into++ = (unsigned char)((*outof >> 16) & 0xffL); 165 165 - *into++ = (unsigned char)((*outof >> 8) & 0xffL); 166 166 - *into = (unsigned char)(*outof & 0xffL); 167 167 - return; 168 168 - } 159 159 + *into++ = (unsigned char)((*outof >> 24) & 0xffL); 160 160 + *into++ = (unsigned char)((*outof >> 16) & 0xffL); 161 161 + *into++ = (unsigned char)((*outof >> 8) & 0xffL); 162 162 + *into++ = (unsigned char)(*outof++ & 0xffL); 163 163 + *into++ = (unsigned char)((*outof >> 24) & 0xffL); 164 164 + *into++ = (unsigned char)((*outof >> 16) & 0xffL); 165 165 + *into++ = (unsigned char)((*outof >> 8) & 0xffL); 166 166 + *into = (unsigned char)(*outof & 0xffL); 167 167 + return; 168 168 + } 169 169 170 170 static const unsigned long SP1[64] = { 171 171 - 0x01010400L, 0x00000000L, 0x00010000L, 0x01010404L, 172 172 - 0x01010004L, 0x00010404L, 0x00000004L, 0x00010000L, 173 173 - 0x00000400L, 0x01010400L, 0x01010404L, 0x00000400L, 174 174 - 0x01000404L, 0x01010004L, 0x01000000L, 0x00000004L, 175 175 - 0x00000404L, 0x01000400L, 0x01000400L, 0x00010400L, 176 176 - 0x00010400L, 0x01010000L, 0x01010000L, 0x01000404L, 177 177 - 0x00010004L, 0x01000004L, 0x01000004L, 0x00010004L, 178 178 - 0x00000000L, 0x00000404L, 0x00010404L, 0x01000000L, 179 179 - 0x00010000L, 0x01010404L, 0x00000004L, 0x01010000L, 180 180 - 0x01010400L, 0x01000000L, 0x01000000L, 0x00000400L, 181 181 - 0x01010004L, 0x00010000L, 0x00010400L, 0x01000004L, 182 182 - 0x00000400L, 0x00000004L, 0x01000404L, 0x00010404L, 183 183 - 0x01010404L, 0x00010004L, 0x01010000L, 0x01000404L, 184 184 - 0x01000004L, 0x00000404L, 0x00010404L, 0x01010400L, 185 185 - 0x00000404L, 0x01000400L, 0x01000400L, 0x00000000L, 186 186 - 0x00010004L, 0x00010400L, 0x00000000L, 0x01010004L }; 171 171 + 0x01010400L, 0x00000000L, 0x00010000L, 0x01010404L, 172 172 + 0x01010004L, 0x00010404L, 0x00000004L, 0x00010000L, 173 173 + 0x00000400L, 0x01010400L, 0x01010404L, 0x00000400L, 174 174 + 0x01000404L, 0x01010004L, 0x01000000L, 0x00000004L, 175 175 + 0x00000404L, 0x01000400L, 0x01000400L, 0x00010400L, 176 176 + 0x00010400L, 0x01010000L, 0x01010000L, 0x01000404L, 177 177 + 0x00010004L, 0x01000004L, 0x01000004L, 0x00010004L, 178 178 + 0x00000000L, 0x00000404L, 0x00010404L, 0x01000000L, 179 179 + 0x00010000L, 0x01010404L, 0x00000004L, 0x01010000L, 180 180 + 0x01010400L, 0x01000000L, 0x01000000L, 0x00000400L, 181 181 + 0x01010004L, 0x00010000L, 0x00010400L, 0x01000004L, 182 182 + 0x00000400L, 0x00000004L, 0x01000404L, 0x00010404L, 183 183 + 0x01010404L, 0x00010004L, 0x01010000L, 0x01000404L, 184 184 + 0x01000004L, 0x00000404L, 0x00010404L, 0x01010400L, 185 185 + 0x00000404L, 0x01000400L, 0x01000400L, 0x00000000L, 186 186 + 0x00010004L, 0x00010400L, 0x00000000L, 0x01010004L }; 187 187 188 188 static const unsigned long SP2[64] = { 189 189 - 0x80108020L, 0x80008000L, 0x00008000L, 0x00108020L, 190 190 - 0x00100000L, 0x00000020L, 0x80100020L, 0x80008020L, 191 191 - 0x80000020L, 0x80108020L, 0x80108000L, 0x80000000L, 192 192 - 0x80008000L, 0x00100000L, 0x00000020L, 0x80100020L, 193 193 - 0x00108000L, 0x00100020L, 0x80008020L, 0x00000000L, 194 194 - 0x80000000L, 0x00008000L, 0x00108020L, 0x80100000L, 195 195 - 0x00100020L, 0x80000020L, 0x00000000L, 0x00108000L, 196 196 - 0x00008020L, 0x80108000L, 0x80100000L, 0x00008020L, 197 197 - 0x00000000L, 0x00108020L, 0x80100020L, 0x00100000L, 198 198 - 0x80008020L, 0x80100000L, 0x80108000L, 0x00008000L, 199 199 - 0x80100000L, 0x80008000L, 0x00000020L, 0x80108020L, 200 200 - 0x00108020L, 0x00000020L, 0x00008000L, 0x80000000L, 201 201 - 0x00008020L, 0x80108000L, 0x00100000L, 0x80000020L, 202 202 - 0x00100020L, 0x80008020L, 0x80000020L, 0x00100020L, 203 203 - 0x00108000L, 0x00000000L, 0x80008000L, 0x00008020L, 204 204 - 0x80000000L, 0x80100020L, 0x80108020L, 0x00108000L }; 189 189 + 0x80108020L, 0x80008000L, 0x00008000L, 0x00108020L, 190 190 + 0x00100000L, 0x00000020L, 0x80100020L, 0x80008020L, 191 191 + 0x80000020L, 0x80108020L, 0x80108000L, 0x80000000L, 192 192 + 0x80008000L, 0x00100000L, 0x00000020L, 0x80100020L, 193 193 + 0x00108000L, 0x00100020L, 0x80008020L, 0x00000000L, 194 194 + 0x80000000L, 0x00008000L, 0x00108020L, 0x80100000L, 195 195 + 0x00100020L, 0x80000020L, 0x00000000L, 0x00108000L, 196 196 + 0x00008020L, 0x80108000L, 0x80100000L, 0x00008020L, 197 197 + 0x00000000L, 0x00108020L, 0x80100020L, 0x00100000L, 198 198 + 0x80008020L, 0x80100000L, 0x80108000L, 0x00008000L, 199 199 + 0x80100000L, 0x80008000L, 0x00000020L, 0x80108020L, 200 200 + 0x00108020L, 0x00000020L, 0x00008000L, 0x80000000L, 201 201 + 0x00008020L, 0x80108000L, 0x00100000L, 0x80000020L, 202 202 + 0x00100020L, 0x80008020L, 0x80000020L, 0x00100020L, 203 203 + 0x00108000L, 0x00000000L, 0x80008000L, 0x00008020L, 204 204 + 0x80000000L, 0x80100020L, 0x80108020L, 0x00108000L }; 205 205 206 206 static const unsigned long SP3[64] = { 207 207 - 0x00000208L, 0x08020200L, 0x00000000L, 0x08020008L, 208 208 - 0x08000200L, 0x00000000L, 0x00020208L, 0x08000200L, 209 209 - 0x00020008L, 0x08000008L, 0x08000008L, 0x00020000L, 210 210 - 0x08020208L, 0x00020008L, 0x08020000L, 0x00000208L, 211 211 - 0x08000000L, 0x00000008L, 0x08020200L, 0x00000200L, 212 212 - 0x00020200L, 0x08020000L, 0x08020008L, 0x00020208L, 213 213 - 0x08000208L, 0x00020200L, 0x00020000L, 0x08000208L, 214 214 - 0x00000008L, 0x08020208L, 0x00000200L, 0x08000000L, 215 215 - 0x08020200L, 0x08000000L, 0x00020008L, 0x00000208L, 216 216 - 0x00020000L, 0x08020200L, 0x08000200L, 0x00000000L, 217 217 - 0x00000200L, 0x00020008L, 0x08020208L, 0x08000200L, 218 218 - 0x08000008L, 0x00000200L, 0x00000000L, 0x08020008L, 219 219 - 0x08000208L, 0x00020000L, 0x08000000L, 0x08020208L, 220 220 - 0x00000008L, 0x00020208L, 0x00020200L, 0x08000008L, 221 221 - 0x08020000L, 0x08000208L, 0x00000208L, 0x08020000L, 222 222 - 0x00020208L, 0x00000008L, 0x08020008L, 0x00020200L }; 207 207 + 0x00000208L, 0x08020200L, 0x00000000L, 0x08020008L, 208 208 + 0x08000200L, 0x00000000L, 0x00020208L, 0x08000200L, 209 209 + 0x00020008L, 0x08000008L, 0x08000008L, 0x00020000L, 210 210 + 0x08020208L, 0x00020008L, 0x08020000L, 0x00000208L, 211 211 + 0x08000000L, 0x00000008L, 0x08020200L, 0x00000200L, 212 212 + 0x00020200L, 0x08020000L, 0x08020008L, 0x00020208L, 213 213 + 0x08000208L, 0x00020200L, 0x00020000L, 0x08000208L, 214 214 + 0x00000008L, 0x08020208L, 0x00000200L, 0x08000000L, 215 215 + 0x08020200L, 0x08000000L, 0x00020008L, 0x00000208L, 216 216 + 0x00020000L, 0x08020200L, 0x08000200L, 0x00000000L, 217 217 + 0x00000200L, 0x00020008L, 0x08020208L, 0x08000200L, 218 218 + 0x08000008L, 0x00000200L, 0x00000000L, 0x08020008L, 219 219 + 0x08000208L, 0x00020000L, 0x08000000L, 0x08020208L, 220 220 + 0x00000008L, 0x00020208L, 0x00020200L, 0x08000008L, 221 221 + 0x08020000L, 0x08000208L, 0x00000208L, 0x08020000L, 222 222 + 0x00020208L, 0x00000008L, 0x08020008L, 0x00020200L }; 223 223 224 224 static const unsigned long SP4[64] = { 225 225 - 0x00802001L, 0x00002081L, 0x00002081L, 0x00000080L, 226 226 - 0x00802080L, 0x00800081L, 0x00800001L, 0x00002001L, 227 227 - 0x00000000L, 0x00802000L, 0x00802000L, 0x00802081L, 228 228 - 0x00000081L, 0x00000000L, 0x00800080L, 0x00800001L, 229 229 - 0x00000001L, 0x00002000L, 0x00800000L, 0x00802001L, 230 230 - 0x00000080L, 0x00800000L, 0x00002001L, 0x00002080L, 231 231 - 0x00800081L, 0x00000001L, 0x00002080L, 0x00800080L, 232 232 - 0x00002000L, 0x00802080L, 0x00802081L, 0x00000081L, 233 233 - 0x00800080L, 0x00800001L, 0x00802000L, 0x00802081L, 234 234 - 0x00000081L, 0x00000000L, 0x00000000L, 0x00802000L, 235 235 - 0x00002080L, 0x00800080L, 0x00800081L, 0x00000001L, 236 236 - 0x00802001L, 0x00002081L, 0x00002081L, 0x00000080L, 237 237 - 0x00802081L, 0x00000081L, 0x00000001L, 0x00002000L, 238 238 - 0x00800001L, 0x00002001L, 0x00802080L, 0x00800081L, 239 239 - 0x00002001L, 0x00002080L, 0x00800000L, 0x00802001L, 240 240 - 0x00000080L, 0x00800000L, 0x00002000L, 0x00802080L }; 225 225 + 0x00802001L, 0x00002081L, 0x00002081L, 0x00000080L, 226 226 + 0x00802080L, 0x00800081L, 0x00800001L, 0x00002001L, 227 227 + 0x00000000L, 0x00802000L, 0x00802000L, 0x00802081L, 228 228 + 0x00000081L, 0x00000000L, 0x00800080L, 0x00800001L, 229 229 + 0x00000001L, 0x00002000L, 0x00800000L, 0x00802001L, 230 230 + 0x00000080L, 0x00800000L, 0x00002001L, 0x00002080L, 231 231 + 0x00800081L, 0x00000001L, 0x00002080L, 0x00800080L, 232 232 + 0x00002000L, 0x00802080L, 0x00802081L, 0x00000081L, 233 233 + 0x00800080L, 0x00800001L, 0x00802000L, 0x00802081L, 234 234 + 0x00000081L, 0x00000000L, 0x00000000L, 0x00802000L, 235 235 + 0x00002080L, 0x00800080L, 0x00800081L, 0x00000001L, 236 236 + 0x00802001L, 0x00002081L, 0x00002081L, 0x00000080L, 237 237 + 0x00802081L, 0x00000081L, 0x00000001L, 0x00002000L, 238 238 + 0x00800001L, 0x00002001L, 0x00802080L, 0x00800081L, 239 239 + 0x00002001L, 0x00002080L, 0x00800000L, 0x00802001L, 240 240 + 0x00000080L, 0x00800000L, 0x00002000L, 0x00802080L }; 241 241 242 242 static const unsigned long SP5[64] = { 243 243 - 0x00000100L, 0x02080100L, 0x02080000L, 0x42000100L, 244 244 - 0x00080000L, 0x00000100L, 0x40000000L, 0x02080000L, 245 245 - 0x40080100L, 0x00080000L, 0x02000100L, 0x40080100L, 246 246 - 0x42000100L, 0x42080000L, 0x00080100L, 0x40000000L, 247 247 - 0x02000000L, 0x40080000L, 0x40080000L, 0x00000000L, 248 248 - 0x40000100L, 0x42080100L, 0x42080100L, 0x02000100L, 249 249 - 0x42080000L, 0x40000100L, 0x00000000L, 0x42000000L, 250 250 - 0x02080100L, 0x02000000L, 0x42000000L, 0x00080100L, 251 251 - 0x00080000L, 0x42000100L, 0x00000100L, 0x02000000L, 252 252 - 0x40000000L, 0x02080000L, 0x42000100L, 0x40080100L, 253 253 - 0x02000100L, 0x40000000L, 0x42080000L, 0x02080100L, 254 254 - 0x40080100L, 0x00000100L, 0x02000000L, 0x42080000L, 255 255 - 0x42080100L, 0x00080100L, 0x42000000L, 0x42080100L, 256 256 - 0x02080000L, 0x00000000L, 0x40080000L, 0x42000000L, 257 257 - 0x00080100L, 0x02000100L, 0x40000100L, 0x00080000L, 258 258 - 0x00000000L, 0x40080000L, 0x02080100L, 0x40000100L }; 243 243 + 0x00000100L, 0x02080100L, 0x02080000L, 0x42000100L, 244 244 + 0x00080000L, 0x00000100L, 0x40000000L, 0x02080000L, 245 245 + 0x40080100L, 0x00080000L, 0x02000100L, 0x40080100L, 246 246 + 0x42000100L, 0x42080000L, 0x00080100L, 0x40000000L, 247 247 + 0x02000000L, 0x40080000L, 0x40080000L, 0x00000000L, 248 248 + 0x40000100L, 0x42080100L, 0x42080100L, 0x02000100L, 249 249 + 0x42080000L, 0x40000100L, 0x00000000L, 0x42000000L, 250 250 + 0x02080100L, 0x02000000L, 0x42000000L, 0x00080100L, 251 251 + 0x00080000L, 0x42000100L, 0x00000100L, 0x02000000L, 252 252 + 0x40000000L, 0x02080000L, 0x42000100L, 0x40080100L, 253 253 + 0x02000100L, 0x40000000L, 0x42080000L, 0x02080100L, 254 254 + 0x40080100L, 0x00000100L, 0x02000000L, 0x42080000L, 255 255 + 0x42080100L, 0x00080100L, 0x42000000L, 0x42080100L, 256 256 + 0x02080000L, 0x00000000L, 0x40080000L, 0x42000000L, 257 257 + 0x00080100L, 0x02000100L, 0x40000100L, 0x00080000L, 258 258 + 0x00000000L, 0x40080000L, 0x02080100L, 0x40000100L }; 259 259 260 260 static const unsigned long SP6[64] = { 261 261 - 0x20000010L, 0x20400000L, 0x00004000L, 0x20404010L, 262 262 - 0x20400000L, 0x00000010L, 0x20404010L, 0x00400000L, 263 263 - 0x20004000L, 0x00404010L, 0x00400000L, 0x20000010L, 264 264 - 0x00400010L, 0x20004000L, 0x20000000L, 0x00004010L, 265 265 - 0x00000000L, 0x00400010L, 0x20004010L, 0x00004000L, 266 266 - 0x00404000L, 0x20004010L, 0x00000010L, 0x20400010L, 267 267 - 0x20400010L, 0x00000000L, 0x00404010L, 0x20404000L, 268 268 - 0x00004010L, 0x00404000L, 0x20404000L, 0x20000000L, 269 269 - 0x20004000L, 0x00000010L, 0x20400010L, 0x00404000L, 270 270 - 0x20404010L, 0x00400000L, 0x00004010L, 0x20000010L, 271 271 - 0x00400000L, 0x20004000L, 0x20000000L, 0x00004010L, 272 272 - 0x20000010L, 0x20404010L, 0x00404000L, 0x20400000L, 273 273 - 0x00404010L, 0x20404000L, 0x00000000L, 0x20400010L, 274 274 - 0x00000010L, 0x00004000L, 0x20400000L, 0x00404010L, 275 275 - 0x00004000L, 0x00400010L, 0x20004010L, 0x00000000L, 276 276 - 0x20404000L, 0x20000000L, 0x00400010L, 0x20004010L }; 261 261 + 0x20000010L, 0x20400000L, 0x00004000L, 0x20404010L, 262 262 + 0x20400000L, 0x00000010L, 0x20404010L, 0x00400000L, 263 263 + 0x20004000L, 0x00404010L, 0x00400000L, 0x20000010L, 264 264 + 0x00400010L, 0x20004000L, 0x20000000L, 0x00004010L, 265 265 + 0x00000000L, 0x00400010L, 0x20004010L, 0x00004000L, 266 266 + 0x00404000L, 0x20004010L, 0x00000010L, 0x20400010L, 267 267 + 0x20400010L, 0x00000000L, 0x00404010L, 0x20404000L, 268 268 + 0x00004010L, 0x00404000L, 0x20404000L, 0x20000000L, 269 269 + 0x20004000L, 0x00000010L, 0x20400010L, 0x00404000L, 270 270 + 0x20404010L, 0x00400000L, 0x00004010L, 0x20000010L, 271 271 + 0x00400000L, 0x20004000L, 0x20000000L, 0x00004010L, 272 272 + 0x20000010L, 0x20404010L, 0x00404000L, 0x20400000L, 273 273 + 0x00404010L, 0x20404000L, 0x00000000L, 0x20400010L, 274 274 + 0x00000010L, 0x00004000L, 0x20400000L, 0x00404010L, 275 275 + 0x00004000L, 0x00400010L, 0x20004010L, 0x00000000L, 276 276 + 0x20404000L, 0x20000000L, 0x00400010L, 0x20004010L }; 277 277 278 278 static const unsigned long SP7[64] = { 279 279 - 0x00200000L, 0x04200002L, 0x04000802L, 0x00000000L, 280 280 - 0x00000800L, 0x04000802L, 0x00200802L, 0x04200800L, 281 281 - 0x04200802L, 0x00200000L, 0x00000000L, 0x04000002L, 282 282 - 0x00000002L, 0x04000000L, 0x04200002L, 0x00000802L, 283 283 - 0x04000800L, 0x00200802L, 0x00200002L, 0x04000800L, 284 284 - 0x04000002L, 0x04200000L, 0x04200800L, 0x00200002L, 285 285 - 0x04200000L, 0x00000800L, 0x00000802L, 0x04200802L, 286 286 - 0x00200800L, 0x00000002L, 0x04000000L, 0x00200800L, 287 287 - 0x04000000L, 0x00200800L, 0x00200000L, 0x04000802L, 288 288 - 0x04000802L, 0x04200002L, 0x04200002L, 0x00000002L, 289 289 - 0x00200002L, 0x04000000L, 0x04000800L, 0x00200000L, 290 290 - 0x04200800L, 0x00000802L, 0x00200802L, 0x04200800L, 291 291 - 0x00000802L, 0x04000002L, 0x04200802L, 0x04200000L, 292 292 - 0x00200800L, 0x00000000L, 0x00000002L, 0x04200802L, 293 293 - 0x00000000L, 0x00200802L, 0x04200000L, 0x00000800L, 294 294 - 0x04000002L, 0x04000800L, 0x00000800L, 0x00200002L }; 279 279 + 0x00200000L, 0x04200002L, 0x04000802L, 0x00000000L, 280 280 + 0x00000800L, 0x04000802L, 0x00200802L, 0x04200800L, 281 281 + 0x04200802L, 0x00200000L, 0x00000000L, 0x04000002L, 282 282 + 0x00000002L, 0x04000000L, 0x04200002L, 0x00000802L, 283 283 + 0x04000800L, 0x00200802L, 0x00200002L, 0x04000800L, 284 284 + 0x04000002L, 0x04200000L, 0x04200800L, 0x00200002L, 285 285 + 0x04200000L, 0x00000800L, 0x00000802L, 0x04200802L, 286 286 + 0x00200800L, 0x00000002L, 0x04000000L, 0x00200800L, 287 287 + 0x04000000L, 0x00200800L, 0x00200000L, 0x04000802L, 288 288 + 0x04000802L, 0x04200002L, 0x04200002L, 0x00000002L, 289 289 + 0x00200002L, 0x04000000L, 0x04000800L, 0x00200000L, 290 290 + 0x04200800L, 0x00000802L, 0x00200802L, 0x04200800L, 291 291 + 0x00000802L, 0x04000002L, 0x04200802L, 0x04200000L, 292 292 + 0x00200800L, 0x00000000L, 0x00000002L, 0x04200802L, 293 293 + 0x00000000L, 0x00200802L, 0x04200000L, 0x00000800L, 294 294 + 0x04000002L, 0x04000800L, 0x00000800L, 0x00200002L }; 295 295 296 296 static const unsigned long SP8[64] = { 297 297 - 0x10001040L, 0x00001000L, 0x00040000L, 0x10041040L, 298 298 - 0x10000000L, 0x10001040L, 0x00000040L, 0x10000000L, 299 299 - 0x00040040L, 0x10040000L, 0x10041040L, 0x00041000L, 300 300 - 0x10041000L, 0x00041040L, 0x00001000L, 0x00000040L, 301 301 - 0x10040000L, 0x10000040L, 0x10001000L, 0x00001040L, 302 302 - 0x00041000L, 0x00040040L, 0x10040040L, 0x10041000L, 303 303 - 0x00001040L, 0x00000000L, 0x00000000L, 0x10040040L, 304 304 - 0x10000040L, 0x10001000L, 0x00041040L, 0x00040000L, 305 305 - 0x00041040L, 0x00040000L, 0x10041000L, 0x00001000L, 306 306 - 0x00000040L, 0x10040040L, 0x00001000L, 0x00041040L, 307 307 - 0x10001000L, 0x00000040L, 0x10000040L, 0x10040000L, 308 308 - 0x10040040L, 0x10000000L, 0x00040000L, 0x10001040L, 309 309 - 0x00000000L, 0x10041040L, 0x00040040L, 0x10000040L, 310 310 - 0x10040000L, 0x10001000L, 0x10001040L, 0x00000000L, 311 311 - 0x10041040L, 0x00041000L, 0x00041000L, 0x00001040L, 312 312 - 0x00001040L, 0x00040040L, 0x10000000L, 0x10041000L }; 297 297 + 0x10001040L, 0x00001000L, 0x00040000L, 0x10041040L, 298 298 + 0x10000000L, 0x10001040L, 0x00000040L, 0x10000000L, 299 299 + 0x00040040L, 0x10040000L, 0x10041040L, 0x00041000L, 300 300 + 0x10041000L, 0x00041040L, 0x00001000L, 0x00000040L, 301 301 + 0x10040000L, 0x10000040L, 0x10001000L, 0x00001040L, 302 302 + 0x00041000L, 0x00040040L, 0x10040040L, 0x10041000L, 303 303 + 0x00001040L, 0x00000000L, 0x00000000L, 0x10040040L, 304 304 + 0x10000040L, 0x10001000L, 0x00041040L, 0x00040000L, 305 305 + 0x00041040L, 0x00040000L, 0x10041000L, 0x00001000L, 306 306 + 0x00000040L, 0x10040040L, 0x00001000L, 0x00041040L, 307 307 + 0x10001000L, 0x00000040L, 0x10000040L, 0x10040000L, 308 308 + 0x10040040L, 0x10000000L, 0x00040000L, 0x10001040L, 309 309 + 0x00000000L, 0x10041040L, 0x00040040L, 0x10000040L, 310 310 + 0x10040000L, 0x10001000L, 0x10001040L, 0x00000000L, 311 311 + 0x10041040L, 0x00041000L, 0x00041000L, 0x00001040L, 312 312 + 0x00001040L, 0x00040040L, 0x10000000L, 0x10041000L }; 313 313 314 314 static void desfunc(register unsigned long *block, register unsigned long *keys) 315 315 { 316 316 - register unsigned long fval, work, right, leftt; 317 317 - register int round; 316 316 + register unsigned long fval, work, right, leftt; 317 317 + register int round; 318 318 319 319 - leftt = block[0]; 320 320 - right = block[1]; 321 321 - work = ((leftt >> 4) ^ right) & 0x0f0f0f0fL; 322 322 - right ^= work; 323 323 - leftt ^= (work << 4); 324 324 - work = ((leftt >> 16) ^ right) & 0x0000ffffL; 325 325 - right ^= work; 326 326 - leftt ^= (work << 16); 327 327 - work = ((right >> 2) ^ leftt) & 0x33333333L; 328 328 - leftt ^= work; 329 329 - right ^= (work << 2); 330 330 - work = ((right >> 8) ^ leftt) & 0x00ff00ffL; 331 331 - leftt ^= work; 332 332 - right ^= (work << 8); 333 333 - right = ((right << 1) | ((right >> 31) & 1L)) & 0xffffffffL; 334 334 - work = (leftt ^ right) & 0xaaaaaaaaL; 335 335 - leftt ^= work; 336 336 - right ^= work; 337 337 - leftt = ((leftt << 1) | ((leftt >> 31) & 1L)) & 0xffffffffL; 319 319 + leftt = block[0]; 320 320 + right = block[1]; 321 321 + work = ((leftt >> 4) ^ right) & 0x0f0f0f0fL; 322 322 + right ^= work; 323 323 + leftt ^= (work << 4); 324 324 + work = ((leftt >> 16) ^ right) & 0x0000ffffL; 325 325 + right ^= work; 326 326 + leftt ^= (work << 16); 327 327 + work = ((right >> 2) ^ leftt) & 0x33333333L; 328 328 + leftt ^= work; 329 329 + right ^= (work << 2); 330 330 + work = ((right >> 8) ^ leftt) & 0x00ff00ffL; 331 331 + leftt ^= work; 332 332 + right ^= (work << 8); 333 333 + right = ((right << 1) | ((right >> 31) & 1L)) & 0xffffffffL; 334 334 + work = (leftt ^ right) & 0xaaaaaaaaL; 335 335 + leftt ^= work; 336 336 + right ^= work; 337 337 + leftt = ((leftt << 1) | ((leftt >> 31) & 1L)) & 0xffffffffL; 338 338 339 339 - for( round = 0; round < 8; round++ ) { 340 340 - work = (right << 28) | (right >> 4); 341 341 - work ^= *keys++; 342 342 - fval = SP7[ work & 0x3fL]; 343 343 - fval |= SP5[(work >> 8) & 0x3fL]; 344 344 - fval |= SP3[(work >> 16) & 0x3fL]; 345 345 - fval |= SP1[(work >> 24) & 0x3fL]; 346 346 - work = right ^ *keys++; 347 347 - fval |= SP8[ work & 0x3fL]; 348 348 - fval |= SP6[(work >> 8) & 0x3fL]; 349 349 - fval |= SP4[(work >> 16) & 0x3fL]; 350 350 - fval |= SP2[(work >> 24) & 0x3fL]; 351 351 - leftt ^= fval; 352 352 - work = (leftt << 28) | (leftt >> 4); 353 353 - work ^= *keys++; 354 354 - fval = SP7[ work & 0x3fL]; 355 355 - fval |= SP5[(work >> 8) & 0x3fL]; 356 356 - fval |= SP3[(work >> 16) & 0x3fL]; 357 357 - fval |= SP1[(work >> 24) & 0x3fL]; 358 358 - work = leftt ^ *keys++; 359 359 - fval |= SP8[ work & 0x3fL]; 360 360 - fval |= SP6[(work >> 8) & 0x3fL]; 361 361 - fval |= SP4[(work >> 16) & 0x3fL]; 362 362 - fval |= SP2[(work >> 24) & 0x3fL]; 363 363 - right ^= fval; 364 364 - } 339 339 + for( round = 0; round < 8; round++ ) { 340 340 + work = (right << 28) | (right >> 4); 341 341 + work ^= *keys++; 342 342 + fval = SP7[ work & 0x3fL]; 343 343 + fval |= SP5[(work >> 8) & 0x3fL]; 344 344 + fval |= SP3[(work >> 16) & 0x3fL]; 345 345 + fval |= SP1[(work >> 24) & 0x3fL]; 346 346 + work = right ^ *keys++; 347 347 + fval |= SP8[ work & 0x3fL]; 348 348 + fval |= SP6[(work >> 8) & 0x3fL]; 349 349 + fval |= SP4[(work >> 16) & 0x3fL]; 350 350 + fval |= SP2[(work >> 24) & 0x3fL]; 351 351 + leftt ^= fval; 352 352 + work = (leftt << 28) | (leftt >> 4); 353 353 + work ^= *keys++; 354 354 + fval = SP7[ work & 0x3fL]; 355 355 + fval |= SP5[(work >> 8) & 0x3fL]; 356 356 + fval |= SP3[(work >> 16) & 0x3fL]; 357 357 + fval |= SP1[(work >> 24) & 0x3fL]; 358 358 + work = leftt ^ *keys++; 359 359 + fval |= SP8[ work & 0x3fL]; 360 360 + fval |= SP6[(work >> 8) & 0x3fL]; 361 361 + fval |= SP4[(work >> 16) & 0x3fL]; 362 362 + fval |= SP2[(work >> 24) & 0x3fL]; 363 363 + right ^= fval; 364 364 + } 365 365 366 366 - right = (right << 31) | (right >> 1); 367 367 - work = (leftt ^ right) & 0xaaaaaaaaL; 368 368 - leftt ^= work; 369 369 - right ^= work; 370 370 - leftt = (leftt << 31) | (leftt >> 1); 371 371 - work = ((leftt >> 8) ^ right) & 0x00ff00ffL; 372 372 - right ^= work; 373 373 - leftt ^= (work << 8); 374 374 - work = ((leftt >> 2) ^ right) & 0x33333333L; 375 375 - right ^= work; 376 376 - leftt ^= (work << 2); 377 377 - work = ((right >> 16) ^ leftt) & 0x0000ffffL; 378 378 - leftt ^= work; 379 379 - right ^= (work << 16); 380 380 - work = ((right >> 4) ^ leftt) & 0x0f0f0f0fL; 381 381 - leftt ^= work; 382 382 - right ^= (work << 4); 383 383 - *block++ = right; 384 384 - *block = leftt; 385 385 - return; 386 386 - } 366 366 + right = (right << 31) | (right >> 1); 367 367 + work = (leftt ^ right) & 0xaaaaaaaaL; 368 368 + leftt ^= work; 369 369 + right ^= work; 370 370 + leftt = (leftt << 31) | (leftt >> 1); 371 371 + work = ((leftt >> 8) ^ right) & 0x00ff00ffL; 372 372 + right ^= work; 373 373 + leftt ^= (work << 8); 374 374 + work = ((leftt >> 2) ^ right) & 0x33333333L; 375 375 + right ^= work; 376 376 + leftt ^= (work << 2); 377 377 + work = ((right >> 16) ^ leftt) & 0x0000ffffL; 378 378 + leftt ^= work; 379 379 + right ^= (work << 16); 380 380 + work = ((right >> 4) ^ leftt) & 0x0f0f0f0fL; 381 381 + leftt ^= work; 382 382 + right ^= (work << 4); 383 383 + *block++ = right; 384 384 + *block = leftt; 385 385 + return; 386 386 + } 387 387 388 388 /* Validation sets: 389 389 *

+1

default-configs/alpha-softmmu.mak

··· 19 19 CONFIG_MC146818RTC=y 20 20 CONFIG_ISA_TESTDEV=y 21 21 CONFIG_SMC37C669=y 22 22 + CONFIG_DP264=y

+6 -3

default-configs/arm-softmmu.mak

··· 6 6 CONFIG_NAND=y 7 7 CONFIG_ECC=y 8 8 CONFIG_SERIAL=y 9 9 - CONFIG_SERIAL_ISA=y 10 9 CONFIG_PTIMER=y 11 10 CONFIG_SD=y 12 11 CONFIG_MAX7310=y ··· 124 123 CONFIG_VERSATILE_PCI=y 125 124 CONFIG_VERSATILE_I2C=y 126 125 127 127 - CONFIG_PCI_GENERIC=y 126 126 + CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y 127 127 + CONFIG_VFIO=$(CONFIG_LINUX) 128 128 + CONFIG_VFIO_PLATFORM=y 128 129 CONFIG_VFIO_XGMAC=y 129 130 CONFIG_VFIO_AMD_XGBE=y 130 131 ··· 149 150 CONFIG_IOH3420=y 150 151 CONFIG_I82801B11=y 151 152 CONFIG_ACPI=y 153 153 + CONFIG_ARM_VIRT=y 152 154 CONFIG_SMBIOS=y 153 155 CONFIG_ASPEED_SOC=y 156 156 + CONFIG_SMBUS_EEPROM=y 154 157 CONFIG_GPIO_KEY=y 155 158 CONFIG_MSF2=y 156 159 CONFIG_FW_CFG_DMA=y 157 160 CONFIG_XILINX_AXI=y 158 158 - CONFIG_PCI_DESIGNWARE=y 161 161 + CONFIG_PCI_EXPRESS_DESIGNWARE=y 159 162 160 163 CONFIG_STRONGARM=y 161 164 CONFIG_HIGHBANK=y

+1

default-configs/cris-softmmu.mak

··· 4 4 CONFIG_NAND=y 5 5 CONFIG_PTIMER=y 6 6 CONFIG_PFLASH_CFI02=y 7 7 + CONFIG_AXIS=y

+1

default-configs/hppa-softmmu.mak

··· 10 10 # CONFIG_IDE_MMIO=y 11 11 CONFIG_VIRTIO_VGA=y 12 12 CONFIG_MC146818RTC=y 13 13 + CONFIG_DINO=y

+6 -1

default-configs/i386-softmmu.mak

··· 47 47 CONFIG_VMPORT=y 48 48 CONFIG_SGA=y 49 49 CONFIG_LPC_ICH9=y 50 50 - CONFIG_PCI_Q35=y 50 50 + CONFIG_PCI_EXPRESS_Q35=y 51 51 CONFIG_APIC=y 52 52 CONFIG_IOAPIC=y 53 53 CONFIG_PVPANIC=y ··· 62 62 CONFIG_SMBIOS=y 63 63 CONFIG_PXB=y 64 64 CONFIG_ACPI_VMGENID=y 65 65 + CONFIG_ACPI_SMBUS=y 66 66 + CONFIG_SMBUS_EEPROM=y 65 67 CONFIG_FW_CFG_DMA=y 66 68 CONFIG_I2C=y 67 69 CONFIG_SEV=$(CONFIG_KVM) 68 70 CONFIG_VTD=y 69 71 CONFIG_AMD_IOMMU=y 72 72 + CONFIG_PAM=y 73 73 + CONFIG_I440FX=y 74 74 + CONFIG_Q35=y

+2

default-configs/m68k-softmmu.mak

··· 2 2 3 3 CONFIG_COLDFIRE=y 4 4 CONFIG_PTIMER=y 5 5 + CONFIG_AN5206=y 6 6 + CONFIG_MCF5208=y

+3

default-configs/microblaze-softmmu.mak

··· 10 10 CONFIG_SSI=y 11 11 CONFIG_SSI_M25P80=y 12 12 CONFIG_XLNX_ZYNQMP=y 13 13 + CONFIG_PETALOGIX_S3ADSP1800=y 14 14 + CONFIG_PETALOGIX_ML605=y 15 15 + CONFIG_XLNX_ZYNQMP_PMU=y

+5

default-configs/mips-softmmu-common.mak

··· 36 36 CONFIG_MIPS_CPS=y 37 37 CONFIG_MIPS_ITU=y 38 38 CONFIG_I2C=y 39 39 + CONFIG_R4K=y 40 40 + CONFIG_MALTA=y 41 41 + CONFIG_MIPSSIM=y 42 42 + CONFIG_ACPI_SMBUS=y 43 43 + CONFIG_SMBUS_EEPROM=y

+1 -1

default-configs/mips64el-softmmu.mak

··· 12 12 CONFIG_VT82C686=y 13 13 CONFIG_MIPS_BOSTON=y 14 14 CONFIG_FITLOADER=y 15 15 - CONFIG_PCI_XILINX=y 15 15 + CONFIG_PCI_EXPRESS_XILINX=y

+1

default-configs/moxie-softmmu.mak

··· 5 5 CONFIG_SERIAL=y 6 6 CONFIG_SERIAL_ISA=y 7 7 CONFIG_VGA=y 8 8 + CONFIG_MOXIESIM=y

+1

default-configs/nios2-softmmu.mak

··· 4 4 CONFIG_SERIAL=y 5 5 CONFIG_PTIMER=y 6 6 CONFIG_ALTERA_TIMER=y 7 7 + CONFIG_NIOS2_10M50=y

+1

default-configs/or1k-softmmu.mak

··· 3 3 CONFIG_SERIAL=y 4 4 CONFIG_OPENCORES_ETH=y 5 5 CONFIG_OMPIC=y 6 6 + CONFIG_OR1K_SIM=y

+3 -1

default-configs/pci.mak

··· 22 22 CONFIG_MPTSAS_SCSI_PCI=y 23 23 CONFIG_RTL8139_PCI=y 24 24 CONFIG_E1000_PCI=y 25 25 - CONFIG_E1000E_PCI=y 25 25 + CONFIG_E1000E_PCI_EXPRESS=y 26 26 CONFIG_IDE_CORE=y 27 27 CONFIG_IDE_QDEV=y 28 28 CONFIG_IDE_PCI=y ··· 47 47 CONFIG_BOCHS_DISPLAY=y 48 48 CONFIG_IVSHMEM_DEVICE=$(CONFIG_IVSHMEM) 49 49 CONFIG_ROCKER=y 50 50 + CONFIG_VFIO=$(CONFIG_LINUX) 51 51 + CONFIG_VFIO_PCI=y

+7 -1

default-configs/ppc-softmmu.mak

··· 21 21 CONFIG_OPENPIC_KVM=$(call land,$(CONFIG_E500),$(CONFIG_KVM)) 22 22 CONFIG_PLATFORM_BUS=y 23 23 CONFIG_ETSEC=y 24 24 + CONFIG_PPC405=y 25 25 + CONFIG_PPC440=y 26 26 + CONFIG_VIRTEX=y 27 27 + 24 28 # For Sam460ex 25 29 CONFIG_SAM460EX=y 26 30 CONFIG_USB_EHCI_SYSBUS=y ··· 32 36 CONFIG_BITBANG_I2C=y 33 37 CONFIG_M41T80=y 34 38 CONFIG_VGA_CIRRUS=y 39 39 + CONFIG_SMBUS_EEPROM=y 35 40 36 41 # For Macs 37 37 - CONFIG_MAC=y 38 42 CONFIG_ESCC=y 39 43 CONFIG_MACIO=y 40 44 CONFIG_MACIO_GPIO=y ··· 50 54 CONFIG_UNIN_PCI=y 51 55 CONFIG_DEC_PCI=y 52 56 CONFIG_IDE_MACIO=y 57 57 + CONFIG_MAC_OLDWORLD=y 58 58 + CONFIG_MAC_NEWWORLD=y 53 59 54 60 # For PReP 55 61 CONFIG_PREP=y

+8 -1

default-configs/riscv32-softmmu.mak

··· 8 8 9 9 CONFIG_CADENCE=y 10 10 11 11 - CONFIG_PCI_GENERIC=y 11 11 + CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y 12 12 13 13 CONFIG_VGA=y 14 14 CONFIG_VGA_PCI=y 15 15 + 16 16 + CONFIG_SPIKE=y 17 17 + CONFIG_HART=y 18 18 + CONFIG_SIFIVE_E=y 19 19 + CONFIG_SIFIVE=y 20 20 + CONFIG_SIFIVE_U=y 21 21 + CONFIG_RISCV_VIRT=y

+8 -1

default-configs/riscv64-softmmu.mak

··· 8 8 9 9 CONFIG_CADENCE=y 10 10 11 11 - CONFIG_PCI_GENERIC=y 11 11 + CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y 12 12 13 13 CONFIG_VGA=y 14 14 CONFIG_VGA_PCI=y 15 15 + 16 16 + CONFIG_SPIKE=y 17 17 + CONFIG_HART=y 18 18 + CONFIG_SIFIVE_E=y 19 19 + CONFIG_SIFIVE=y 20 20 + CONFIG_SIFIVE_U=y 21 21 + CONFIG_RISCV_VIRT=y

+4 -2

default-configs/s390x-softmmu.mak

··· 5 5 CONFIG_TERMINAL3270=y 6 6 CONFIG_S390_FLIC=y 7 7 CONFIG_S390_FLIC_KVM=$(CONFIG_KVM) 8 8 - CONFIG_VFIO_CCW=$(CONFIG_LINUX) 9 8 CONFIG_WDT_DIAG288=y 10 10 - CONFIG_VFIO_AP=$(CONFIG_LINUX) 9 9 + CONFIG_S390_CCW_VIRTIO=y 10 10 + CONFIG_VFIO=$(CONFIG_LINUX) 11 11 + CONFIG_VFIO_CCW=y 12 12 + CONFIG_VFIO_AP=y

+2

default-configs/sh4-softmmu.mak

··· 19 19 CONFIG_I82374=y 20 20 CONFIG_I8257=y 21 21 CONFIG_MC146818RTC=y 22 22 + CONFIG_R2D=y 23 23 + CONFIG_SHIX=y

+2

default-configs/sh4eb-softmmu.mak

··· 19 19 CONFIG_I82374=y 20 20 CONFIG_I8257=y 21 21 CONFIG_MC146818RTC=y 22 22 + CONFIG_R2D=y 23 23 + CONFIG_SHIX=y

+2

default-configs/sparc-softmmu.mak

··· 18 18 CONFIG_GRLIB=y 19 19 CONFIG_STP2000=y 20 20 CONFIG_ECCMEMCTL=y 21 21 + 21 22 CONFIG_SUN4M=y 23 23 + CONFIG_LEON3=y

+2

default-configs/sparc64-softmmu.mak

··· 17 17 CONFIG_MC146818RTC=y 18 18 CONFIG_ISA_TESTDEV=y 19 19 CONFIG_SUN4V_RTC=y 20 20 + CONFIG_SUN4U=y 21 21 + CONFIG_NIAGARA=y

+1

default-configs/tricore-softmmu.mak

··· 1 1 + CONFIG_TRICORE=y

+3

default-configs/xtensa-softmmu.mak

··· 3 3 CONFIG_SERIAL=y 4 4 CONFIG_OPENCORES_ETH=y 5 5 CONFIG_PFLASH_CFI01=y 6 6 + 7 7 + CONFIG_XTENSA_SIM=y 8 8 + CONFIG_XTENSA_FPGA=y

+3

default-configs/xtensaeb-softmmu.mak

··· 3 3 CONFIG_SERIAL=y 4 4 CONFIG_OPENCORES_ETH=y 5 5 CONFIG_PFLASH_CFI01=y 6 6 + 7 7 + CONFIG_XTENSA_SIM=y 8 8 + CONFIG_XTENSA_FPGA=y

-4

docs/qdev-device-use.txt

··· 190 190 191 191 -device usb-braille,chardev=braille -chardev braille,id=braille 192 192 193 193 - * -virtioconsole becomes 194 194 - -device virtio-serial-pci,class=C,vectors=V,ioeventfd=IOEVENTFD,max_ports=N 195 195 - -device virtconsole,is_console=NUM,nr=NR,name=NAME 196 196 - 197 193 LEGACY-CHARDEV translates to -chardev HOST-OPTS... as follows: 198 194 199 195 * null becomes -chardev null

+23 -24

exec.c

··· 2851 2851 }; 2852 2852 2853 2853 static MemTxResult flatview_read(FlatView *fv, hwaddr addr, 2854 2854 - MemTxAttrs attrs, uint8_t *buf, int len); 2854 2854 + MemTxAttrs attrs, uint8_t *buf, hwaddr len); 2855 2855 static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, 2856 2856 - const uint8_t *buf, int len); 2857 2857 - static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, 2856 2856 + const uint8_t *buf, hwaddr len); 2857 2857 + static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, 2858 2858 bool is_write, MemTxAttrs attrs); 2859 2859 2860 2860 static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, ··· 3102 3102 /* physical memory access (slow version, mainly for debug) */ 3103 3103 #if defined(CONFIG_USER_ONLY) 3104 3104 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, 3105 3105 - uint8_t *buf, int len, int is_write) 3105 3105 + uint8_t *buf, target_ulong len, int is_write) 3106 3106 { 3107 3107 - int l, flags; 3108 3108 - target_ulong page; 3107 3107 + int flags; 3108 3108 + target_ulong l, page; 3109 3109 void * p; 3110 3110 3111 3111 while (len > 0) { ··· 3231 3231 static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, 3232 3232 MemTxAttrs attrs, 3233 3233 const uint8_t *buf, 3234 3234 - int len, hwaddr addr1, 3234 3234 + hwaddr len, hwaddr addr1, 3235 3235 hwaddr l, MemoryRegion *mr) 3236 3236 { 3237 3237 uint8_t *ptr; ··· 3276 3276 3277 3277 /* Called from RCU critical section. */ 3278 3278 static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, 3279 3279 - const uint8_t *buf, int len) 3279 3279 + const uint8_t *buf, hwaddr len) 3280 3280 { 3281 3281 hwaddr l; 3282 3282 hwaddr addr1; ··· 3294 3294 /* Called within RCU critical section. */ 3295 3295 MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, 3296 3296 MemTxAttrs attrs, uint8_t *buf, 3297 3297 - int len, hwaddr addr1, hwaddr l, 3297 3297 + hwaddr len, hwaddr addr1, hwaddr l, 3298 3298 MemoryRegion *mr) 3299 3299 { 3300 3300 uint8_t *ptr; ··· 3337 3337 3338 3338 /* Called from RCU critical section. */ 3339 3339 static MemTxResult flatview_read(FlatView *fv, hwaddr addr, 3340 3340 - MemTxAttrs attrs, uint8_t *buf, int len) 3340 3340 + MemTxAttrs attrs, uint8_t *buf, hwaddr len) 3341 3341 { 3342 3342 hwaddr l; 3343 3343 hwaddr addr1; ··· 3350 3350 } 3351 3351 3352 3352 MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, 3353 3353 - MemTxAttrs attrs, uint8_t *buf, int len) 3353 3353 + MemTxAttrs attrs, uint8_t *buf, hwaddr len) 3354 3354 { 3355 3355 MemTxResult result = MEMTX_OK; 3356 3356 FlatView *fv; ··· 3367 3367 3368 3368 MemTxResult address_space_write(AddressSpace *as, hwaddr addr, 3369 3369 MemTxAttrs attrs, 3370 3370 - const uint8_t *buf, int len) 3370 3370 + const uint8_t *buf, hwaddr len) 3371 3371 { 3372 3372 MemTxResult result = MEMTX_OK; 3373 3373 FlatView *fv; ··· 3383 3383 } 3384 3384 3385 3385 MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, 3386 3386 - uint8_t *buf, int len, bool is_write) 3386 3386 + uint8_t *buf, hwaddr len, bool is_write) 3387 3387 { 3388 3388 if (is_write) { 3389 3389 return address_space_write(as, addr, attrs, buf, len); ··· 3393 3393 } 3394 3394 3395 3395 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, 3396 3396 - int len, int is_write) 3396 3396 + hwaddr len, int is_write) 3397 3397 { 3398 3398 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, 3399 3399 buf, len, is_write); ··· 3408 3408 hwaddr addr, 3409 3409 MemTxAttrs attrs, 3410 3410 const uint8_t *buf, 3411 3411 - int len, 3411 3411 + hwaddr len, 3412 3412 enum write_rom_type type) 3413 3413 { 3414 3414 hwaddr l; ··· 3448 3448 /* used for ROM loading : can write in RAM and ROM */ 3449 3449 MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, 3450 3450 MemTxAttrs attrs, 3451 3451 - const uint8_t *buf, int len) 3451 3451 + const uint8_t *buf, hwaddr len) 3452 3452 { 3453 3453 return address_space_write_rom_internal(as, addr, attrs, 3454 3454 buf, len, WRITE_DATA); 3455 3455 } 3456 3456 3457 3457 - void cpu_flush_icache_range(hwaddr start, int len) 3457 3457 + void cpu_flush_icache_range(hwaddr start, hwaddr len) 3458 3458 { 3459 3459 /* 3460 3460 * This function should do the same thing as an icache flush that was ··· 3557 3557 qemu_mutex_unlock(&map_client_list_lock); 3558 3558 } 3559 3559 3560 3560 - static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, 3560 3560 + static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, 3561 3561 bool is_write, MemTxAttrs attrs) 3562 3562 { 3563 3563 MemoryRegion *mr; ··· 3580 3580 } 3581 3581 3582 3582 bool address_space_access_valid(AddressSpace *as, hwaddr addr, 3583 3583 - int len, bool is_write, 3583 3583 + hwaddr len, bool is_write, 3584 3584 MemTxAttrs attrs) 3585 3585 { 3586 3586 FlatView *fv; ··· 3833 3833 */ 3834 3834 void 3835 3835 address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr, 3836 3836 - void *buf, int len) 3836 3836 + void *buf, hwaddr len) 3837 3837 { 3838 3838 hwaddr addr1, l; 3839 3839 MemoryRegion *mr; ··· 3851 3851 */ 3852 3852 void 3853 3853 address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, 3854 3854 - const void *buf, int len) 3854 3854 + const void *buf, hwaddr len) 3855 3855 { 3856 3856 hwaddr addr1, l; 3857 3857 MemoryRegion *mr; ··· 3874 3874 3875 3875 /* virtual memory access for debug (includes writing to ROM) */ 3876 3876 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, 3877 3877 - uint8_t *buf, int len, int is_write) 3877 3877 + uint8_t *buf, target_ulong len, int is_write) 3878 3878 { 3879 3879 - int l; 3880 3879 hwaddr phys_addr; 3881 3881 - target_ulong page; 3880 3880 + target_ulong l, page; 3882 3881 3883 3882 cpu_synchronize_state(cpu); 3884 3883 while (len > 0) {

-65

gdb-xml/i386-32bit-core.xml

··· 1 1 - <?xml version="1.0"?> 2 2 - <!-- Copyright (C) 2010-2015 Free Software Foundation, Inc. 3 3 - 4 4 - Copying and distribution of this file, with or without modification, 5 5 - are permitted in any medium without royalty provided the copyright 6 6 - notice and this notice are preserved. --> 7 7 - 8 8 - <!DOCTYPE feature SYSTEM "gdb-target.dtd"> 9 9 - <feature name="org.gnu.gdb.i386.core"> 10 10 - <flags id="i386_eflags" size="4"> 11 11 - <field name="CF" start="0" end="0"/> 12 12 - <field name="" start="1" end="1"/> 13 13 - <field name="PF" start="2" end="2"/> 14 14 - <field name="AF" start="4" end="4"/> 15 15 - <field name="ZF" start="6" end="6"/> 16 16 - <field name="SF" start="7" end="7"/> 17 17 - <field name="TF" start="8" end="8"/> 18 18 - <field name="IF" start="9" end="9"/> 19 19 - <field name="DF" start="10" end="10"/> 20 20 - <field name="OF" start="11" end="11"/> 21 21 - <field name="NT" start="14" end="14"/> 22 22 - <field name="RF" start="16" end="16"/> 23 23 - <field name="VM" start="17" end="17"/> 24 24 - <field name="AC" start="18" end="18"/> 25 25 - <field name="VIF" start="19" end="19"/> 26 26 - <field name="VIP" start="20" end="20"/> 27 27 - <field name="ID" start="21" end="21"/> 28 28 - </flags> 29 29 - 30 30 - <reg name="eax" bitsize="32" type="int32"/> 31 31 - <reg name="ecx" bitsize="32" type="int32"/> 32 32 - <reg name="edx" bitsize="32" type="int32"/> 33 33 - <reg name="ebx" bitsize="32" type="int32"/> 34 34 - <reg name="esp" bitsize="32" type="data_ptr"/> 35 35 - <reg name="ebp" bitsize="32" type="data_ptr"/> 36 36 - <reg name="esi" bitsize="32" type="int32"/> 37 37 - <reg name="edi" bitsize="32" type="int32"/> 38 38 - 39 39 - <reg name="eip" bitsize="32" type="code_ptr"/> 40 40 - <reg name="eflags" bitsize="32" type="i386_eflags"/> 41 41 - <reg name="cs" bitsize="32" type="int32"/> 42 42 - <reg name="ss" bitsize="32" type="int32"/> 43 43 - <reg name="ds" bitsize="32" type="int32"/> 44 44 - <reg name="es" bitsize="32" type="int32"/> 45 45 - <reg name="fs" bitsize="32" type="int32"/> 46 46 - <reg name="gs" bitsize="32" type="int32"/> 47 47 - 48 48 - <reg name="st0" bitsize="80" type="i387_ext"/> 49 49 - <reg name="st1" bitsize="80" type="i387_ext"/> 50 50 - <reg name="st2" bitsize="80" type="i387_ext"/> 51 51 - <reg name="st3" bitsize="80" type="i387_ext"/> 52 52 - <reg name="st4" bitsize="80" type="i387_ext"/> 53 53 - <reg name="st5" bitsize="80" type="i387_ext"/> 54 54 - <reg name="st6" bitsize="80" type="i387_ext"/> 55 55 - <reg name="st7" bitsize="80" type="i387_ext"/> 56 56 - 57 57 - <reg name="fctrl" bitsize="32" type="int" group="float"/> 58 58 - <reg name="fstat" bitsize="32" type="int" group="float"/> 59 59 - <reg name="ftag" bitsize="32" type="int" group="float"/> 60 60 - <reg name="fiseg" bitsize="32" type="int" group="float"/> 61 61 - <reg name="fioff" bitsize="32" type="int" group="float"/> 62 62 - <reg name="foseg" bitsize="32" type="int" group="float"/> 63 63 - <reg name="fooff" bitsize="32" type="int" group="float"/> 64 64 - <reg name="fop" bitsize="32" type="int" group="float"/> 65 65 - </feature>

-52

gdb-xml/i386-32bit-sse.xml

··· 1 1 - <?xml version="1.0"?> 2 2 - <!-- Copyright (C) 2010-2017 Free Software Foundation, Inc. 3 3 - 4 4 - Copying and distribution of this file, with or without modification, 5 5 - are permitted in any medium without royalty provided the copyright 6 6 - notice and this notice are preserved. --> 7 7 - 8 8 - <!DOCTYPE feature SYSTEM "gdb-target.dtd"> 9 9 - <feature name="org.gnu.gdb.i386.32bit.sse"> 10 10 - <vector id="v4f" type="ieee_single" count="4"/> 11 11 - <vector id="v2d" type="ieee_double" count="2"/> 12 12 - <vector id="v16i8" type="int8" count="16"/> 13 13 - <vector id="v8i16" type="int16" count="8"/> 14 14 - <vector id="v4i32" type="int32" count="4"/> 15 15 - <vector id="v2i64" type="int64" count="2"/> 16 16 - <union id="vec128"> 17 17 - <field name="v4_float" type="v4f"/> 18 18 - <field name="v2_double" type="v2d"/> 19 19 - <field name="v16_int8" type="v16i8"/> 20 20 - <field name="v8_int16" type="v8i16"/> 21 21 - <field name="v4_int32" type="v4i32"/> 22 22 - <field name="v2_int64" type="v2i64"/> 23 23 - <field name="uint128" type="uint128"/> 24 24 - </union> 25 25 - <flags id="i386_mxcsr" size="4"> 26 26 - <field name="IE" start="0" end="0"/> 27 27 - <field name="DE" start="1" end="1"/> 28 28 - <field name="ZE" start="2" end="2"/> 29 29 - <field name="OE" start="3" end="3"/> 30 30 - <field name="UE" start="4" end="4"/> 31 31 - <field name="PE" start="5" end="5"/> 32 32 - <field name="DAZ" start="6" end="6"/> 33 33 - <field name="IM" start="7" end="7"/> 34 34 - <field name="DM" start="8" end="8"/> 35 35 - <field name="ZM" start="9" end="9"/> 36 36 - <field name="OM" start="10" end="10"/> 37 37 - <field name="UM" start="11" end="11"/> 38 38 - <field name="PM" start="12" end="12"/> 39 39 - <field name="FZ" start="15" end="15"/> 40 40 - </flags> 41 41 - 42 42 - <reg name="xmm0" bitsize="128" type="vec128" regnum="32"/> 43 43 - <reg name="xmm1" bitsize="128" type="vec128"/> 44 44 - <reg name="xmm2" bitsize="128" type="vec128"/> 45 45 - <reg name="xmm3" bitsize="128" type="vec128"/> 46 46 - <reg name="xmm4" bitsize="128" type="vec128"/> 47 47 - <reg name="xmm5" bitsize="128" type="vec128"/> 48 48 - <reg name="xmm6" bitsize="128" type="vec128"/> 49 49 - <reg name="xmm7" bitsize="128" type="vec128"/> 50 50 - 51 51 - <reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/> 52 52 - </feature>

+181 -3

gdb-xml/i386-32bit.xml

··· 8 8 <!-- I386 with SSE --> 9 9 10 10 <!DOCTYPE target SYSTEM "gdb-target.dtd"> 11 11 - <feature name="org.gnu.gdb.i386.32bit"> 12 12 - <xi:include href="i386-32bit-core.xml"/> 13 13 - <xi:include href="i386-32bit-sse.xml"/> 11 11 + <feature name="org.gnu.gdb.i386.core"> 12 12 + <flags id="i386_eflags" size="4"> 13 13 + <field name="" start="22" end="31"/> 14 14 + <field name="ID" start="21" end="21"/> 15 15 + <field name="VIP" start="20" end="20"/> 16 16 + <field name="VIF" start="19" end="19"/> 17 17 + <field name="AC" start="18" end="18"/> 18 18 + <field name="VM" start="17" end="17"/> 19 19 + <field name="RF" start="16" end="16"/> 20 20 + <field name="" start="15" end="15"/> 21 21 + <field name="NT" start="14" end="14"/> 22 22 + <field name="IOPL" start="12" end="13"/> 23 23 + <field name="OF" start="11" end="11"/> 24 24 + <field name="DF" start="10" end="10"/> 25 25 + <field name="IF" start="9" end="9"/> 26 26 + <field name="TF" start="8" end="8"/> 27 27 + <field name="SF" start="7" end="7"/> 28 28 + <field name="ZF" start="6" end="6"/> 29 29 + <field name="" start="5" end="5"/> 30 30 + <field name="AF" start="4" end="4"/> 31 31 + <field name="" start="3" end="3"/> 32 32 + <field name="PF" start="2" end="2"/> 33 33 + <field name="" start="1" end="1"/> 34 34 + <field name="CF" start="0" end="0"/> 35 35 + </flags> 36 36 + 37 37 + <reg name="eax" bitsize="32" type="int32" regnum="0"/> 38 38 + <reg name="ecx" bitsize="32" type="int32"/> 39 39 + <reg name="edx" bitsize="32" type="int32"/> 40 40 + <reg name="ebx" bitsize="32" type="int32"/> 41 41 + <reg name="esp" bitsize="32" type="data_ptr"/> 42 42 + <reg name="ebp" bitsize="32" type="data_ptr"/> 43 43 + <reg name="esi" bitsize="32" type="int32"/> 44 44 + <reg name="edi" bitsize="32" type="int32"/> 45 45 + 46 46 + <reg name="eip" bitsize="32" type="code_ptr"/> 47 47 + <reg name="eflags" bitsize="32" type="i386_eflags"/> 48 48 + 49 49 + <reg name="cs" bitsize="32" type="int32"/> 50 50 + <reg name="ss" bitsize="32" type="int32"/> 51 51 + <reg name="ds" bitsize="32" type="int32"/> 52 52 + <reg name="es" bitsize="32" type="int32"/> 53 53 + <reg name="fs" bitsize="32" type="int32"/> 54 54 + <reg name="gs" bitsize="32" type="int32"/> 55 55 + 56 56 + <!-- Segment descriptor caches and TLS base MSRs --> 57 57 + 58 58 + <!--reg name="cs_base" bitsize="32" type="int32"/> 59 59 + <reg name="ss_base" bitsize="32" type="int32"/> 60 60 + <reg name="ds_base" bitsize="32" type="int32"/> 61 61 + <reg name="es_base" bitsize="32" type="int32"/--> 62 62 + <reg name="fs_base" bitsize="32" type="int32"/> 63 63 + <reg name="gs_base" bitsize="32" type="int32"/> 64 64 + <reg name="k_gs_base" bitsize="32" type="int32"/> 65 65 + 66 66 + <flags id="i386_cr0" size="4"> 67 67 + <field name="PG" start="31" end="31"/> 68 68 + <field name="CD" start="30" end="30"/> 69 69 + <field name="NW" start="29" end="29"/> 70 70 + <field name="AM" start="18" end="18"/> 71 71 + <field name="WP" start="16" end="16"/> 72 72 + <field name="NE" start="5" end="5"/> 73 73 + <field name="ET" start="4" end="4"/> 74 74 + <field name="TS" start="3" end="3"/> 75 75 + <field name="EM" start="2" end="2"/> 76 76 + <field name="MP" start="1" end="1"/> 77 77 + <field name="PE" start="0" end="0"/> 78 78 + </flags> 79 79 + 80 80 + <flags id="i386_cr3" size="4"> 81 81 + <field name="PDBR" start="12" end="31"/> 82 82 + <!--field name="" start="3" end="11"/> 83 83 + <field name="WT" start="2" end="2"/> 84 84 + <field name="CD" start="1" end="1"/> 85 85 + <field name="" start="0" end="0"/--> 86 86 + <field name="PCID" start="0" end="11"/> 87 87 + </flags> 88 88 + 89 89 + <flags id="i386_cr4" size="4"> 90 90 + <field name="VME" start="0" end="0"/> 91 91 + <field name="PVI" start="1" end="1"/> 92 92 + <field name="TSD" start="2" end="2"/> 93 93 + <field name="DE" start="3" end="3"/> 94 94 + <field name="PSE" start="4" end="4"/> 95 95 + <field name="PAE" start="5" end="5"/> 96 96 + <field name="MCE" start="6" end="6"/> 97 97 + <field name="PGE" start="7" end="7"/> 98 98 + <field name="PCE" start="8" end="8"/> 99 99 + <field name="OSFXSR" start="9" end="9"/> 100 100 + <field name="OSXMMEXCPT" start="10" end="10"/> 101 101 + <field name="UMIP" start="11" end="11"/> 102 102 + <field name="LA57" start="12" end="12"/> 103 103 + <field name="VMXE" start="13" end="13"/> 104 104 + <field name="SMXE" start="14" end="14"/> 105 105 + <field name="FSGSBASE" start="16" end="16"/> 106 106 + <field name="PCIDE" start="17" end="17"/> 107 107 + <field name="OSXSAVE" start="18" end="18"/> 108 108 + <field name="SMEP" start="20" end="20"/> 109 109 + <field name="SMAP" start="21" end="21"/> 110 110 + <field name="PKE" start="22" end="22"/> 111 111 + </flags> 112 112 + 113 113 + <flags id="i386_efer" size="8"> 114 114 + <field name="TCE" start="15" end="15"/> 115 115 + <field name="FFXSR" start="14" end="14"/> 116 116 + <field name="LMSLE" start="13" end="13"/> 117 117 + <field name="SVME" start="12" end="12"/> 118 118 + <field name="NXE" start="11" end="11"/> 119 119 + <field name="LMA" start="10" end="10"/> 120 120 + <field name="LME" start="8" end="8"/> 121 121 + <field name="SCE" start="0" end="0"/> 122 122 + </flags> 123 123 + 124 124 + <reg name="cr0" bitsize="32" type="i386_cr0"/> 125 125 + <reg name="cr2" bitsize="32" type="int32"/> 126 126 + <reg name="cr3" bitsize="32" type="i386_cr3"/> 127 127 + <reg name="cr4" bitsize="32" type="i386_cr4"/> 128 128 + <reg name="cr8" bitsize="32" type="int32"/> 129 129 + <reg name="efer" bitsize="32" type="i386_efer"/> 130 130 + 131 131 + <reg name="st0" bitsize="80" type="i387_ext"/> 132 132 + <reg name="st1" bitsize="80" type="i387_ext"/> 133 133 + <reg name="st2" bitsize="80" type="i387_ext"/> 134 134 + <reg name="st3" bitsize="80" type="i387_ext"/> 135 135 + <reg name="st4" bitsize="80" type="i387_ext"/> 136 136 + <reg name="st5" bitsize="80" type="i387_ext"/> 137 137 + <reg name="st6" bitsize="80" type="i387_ext"/> 138 138 + <reg name="st7" bitsize="80" type="i387_ext"/> 139 139 + 140 140 + <reg name="fctrl" bitsize="32" type="int" group="float"/> 141 141 + <reg name="fstat" bitsize="32" type="int" group="float"/> 142 142 + <reg name="ftag" bitsize="32" type="int" group="float"/> 143 143 + <reg name="fiseg" bitsize="32" type="int" group="float"/> 144 144 + <reg name="fioff" bitsize="32" type="int" group="float"/> 145 145 + <reg name="foseg" bitsize="32" type="int" group="float"/> 146 146 + <reg name="fooff" bitsize="32" type="int" group="float"/> 147 147 + <reg name="fop" bitsize="32" type="int" group="float"/> 148 148 + <!--/feature> 149 149 + <feature name="org.gnu.gdb.i386.32bit.sse"--> 150 150 + <vector id="v4f" type="ieee_single" count="4"/> 151 151 + <vector id="v2d" type="ieee_double" count="2"/> 152 152 + <vector id="v16i8" type="int8" count="16"/> 153 153 + <vector id="v8i16" type="int16" count="8"/> 154 154 + <vector id="v4i32" type="int32" count="4"/> 155 155 + <vector id="v2i64" type="int64" count="2"/> 156 156 + <union id="vec128"> 157 157 + <field name="v4_float" type="v4f"/> 158 158 + <field name="v2_double" type="v2d"/> 159 159 + <field name="v16_int8" type="v16i8"/> 160 160 + <field name="v8_int16" type="v8i16"/> 161 161 + <field name="v4_int32" type="v4i32"/> 162 162 + <field name="v2_int64" type="v2i64"/> 163 163 + <field name="uint128" type="uint128"/> 164 164 + </union> 165 165 + <flags id="i386_mxcsr" size="4"> 166 166 + <field name="IE" start="0" end="0"/> 167 167 + <field name="DE" start="1" end="1"/> 168 168 + <field name="ZE" start="2" end="2"/> 169 169 + <field name="OE" start="3" end="3"/> 170 170 + <field name="UE" start="4" end="4"/> 171 171 + <field name="PE" start="5" end="5"/> 172 172 + <field name="DAZ" start="6" end="6"/> 173 173 + <field name="IM" start="7" end="7"/> 174 174 + <field name="DM" start="8" end="8"/> 175 175 + <field name="ZM" start="9" end="9"/> 176 176 + <field name="OM" start="10" end="10"/> 177 177 + <field name="UM" start="11" end="11"/> 178 178 + <field name="PM" start="12" end="12"/> 179 179 + <field name="FZ" start="15" end="15"/> 180 180 + </flags> 181 181 + 182 182 + <reg name="xmm0" bitsize="128" type="vec128"/> 183 183 + <reg name="xmm1" bitsize="128" type="vec128"/> 184 184 + <reg name="xmm2" bitsize="128" type="vec128"/> 185 185 + <reg name="xmm3" bitsize="128" type="vec128"/> 186 186 + <reg name="xmm4" bitsize="128" type="vec128"/> 187 187 + <reg name="xmm5" bitsize="128" type="vec128"/> 188 188 + <reg name="xmm6" bitsize="128" type="vec128"/> 189 189 + <reg name="xmm7" bitsize="128" type="vec128"/> 190 190 + 191 191 + <reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/> 14 192 </feature>

-73

gdb-xml/i386-64bit-core.xml

··· 1 1 - <?xml version="1.0"?> 2 2 - <!-- Copyright (C) 2010-2015 Free Software Foundation, Inc. 3 3 - 4 4 - Copying and distribution of this file, with or without modification, 5 5 - are permitted in any medium without royalty provided the copyright 6 6 - notice and this notice are preserved. --> 7 7 - 8 8 - <!DOCTYPE feature SYSTEM "gdb-target.dtd"> 9 9 - <feature name="org.gnu.gdb.i386.core"> 10 10 - <flags id="i386_eflags" size="4"> 11 11 - <field name="CF" start="0" end="0"/> 12 12 - <field name="" start="1" end="1"/> 13 13 - <field name="PF" start="2" end="2"/> 14 14 - <field name="AF" start="4" end="4"/> 15 15 - <field name="ZF" start="6" end="6"/> 16 16 - <field name="SF" start="7" end="7"/> 17 17 - <field name="TF" start="8" end="8"/> 18 18 - <field name="IF" start="9" end="9"/> 19 19 - <field name="DF" start="10" end="10"/> 20 20 - <field name="OF" start="11" end="11"/> 21 21 - <field name="NT" start="14" end="14"/> 22 22 - <field name="RF" start="16" end="16"/> 23 23 - <field name="VM" start="17" end="17"/> 24 24 - <field name="AC" start="18" end="18"/> 25 25 - <field name="VIF" start="19" end="19"/> 26 26 - <field name="VIP" start="20" end="20"/> 27 27 - <field name="ID" start="21" end="21"/> 28 28 - </flags> 29 29 - 30 30 - <reg name="rax" bitsize="64" type="int64"/> 31 31 - <reg name="rbx" bitsize="64" type="int64"/> 32 32 - <reg name="rcx" bitsize="64" type="int64"/> 33 33 - <reg name="rdx" bitsize="64" type="int64"/> 34 34 - <reg name="rsi" bitsize="64" type="int64"/> 35 35 - <reg name="rdi" bitsize="64" type="int64"/> 36 36 - <reg name="rbp" bitsize="64" type="data_ptr"/> 37 37 - <reg name="rsp" bitsize="64" type="data_ptr"/> 38 38 - <reg name="r8" bitsize="64" type="int64"/> 39 39 - <reg name="r9" bitsize="64" type="int64"/> 40 40 - <reg name="r10" bitsize="64" type="int64"/> 41 41 - <reg name="r11" bitsize="64" type="int64"/> 42 42 - <reg name="r12" bitsize="64" type="int64"/> 43 43 - <reg name="r13" bitsize="64" type="int64"/> 44 44 - <reg name="r14" bitsize="64" type="int64"/> 45 45 - <reg name="r15" bitsize="64" type="int64"/> 46 46 - 47 47 - <reg name="rip" bitsize="64" type="code_ptr"/> 48 48 - <reg name="eflags" bitsize="32" type="i386_eflags"/> 49 49 - <reg name="cs" bitsize="32" type="int32"/> 50 50 - <reg name="ss" bitsize="32" type="int32"/> 51 51 - <reg name="ds" bitsize="32" type="int32"/> 52 52 - <reg name="es" bitsize="32" type="int32"/> 53 53 - <reg name="fs" bitsize="32" type="int32"/> 54 54 - <reg name="gs" bitsize="32" type="int32"/> 55 55 - 56 56 - <reg name="st0" bitsize="80" type="i387_ext"/> 57 57 - <reg name="st1" bitsize="80" type="i387_ext"/> 58 58 - <reg name="st2" bitsize="80" type="i387_ext"/> 59 59 - <reg name="st3" bitsize="80" type="i387_ext"/> 60 60 - <reg name="st4" bitsize="80" type="i387_ext"/> 61 61 - <reg name="st5" bitsize="80" type="i387_ext"/> 62 62 - <reg name="st6" bitsize="80" type="i387_ext"/> 63 63 - <reg name="st7" bitsize="80" type="i387_ext"/> 64 64 - 65 65 - <reg name="fctrl" bitsize="32" type="int" group="float"/> 66 66 - <reg name="fstat" bitsize="32" type="int" group="float"/> 67 67 - <reg name="ftag" bitsize="32" type="int" group="float"/> 68 68 - <reg name="fiseg" bitsize="32" type="int" group="float"/> 69 69 - <reg name="fioff" bitsize="32" type="int" group="float"/> 70 70 - <reg name="foseg" bitsize="32" type="int" group="float"/> 71 71 - <reg name="fooff" bitsize="32" type="int" group="float"/> 72 72 - <reg name="fop" bitsize="32" type="int" group="float"/> 73 73 - </feature>

-60

gdb-xml/i386-64bit-sse.xml

··· 1 1 - <?xml version="1.0"?> 2 2 - <!-- Copyright (C) 2010-2017 Free Software Foundation, Inc. 3 3 - 4 4 - Copying and distribution of this file, with or without modification, 5 5 - are permitted in any medium without royalty provided the copyright 6 6 - notice and this notice are preserved. --> 7 7 - 8 8 - <!DOCTYPE feature SYSTEM "gdb-target.dtd"> 9 9 - <feature name="org.gnu.gdb.i386.64bit.sse"> 10 10 - <vector id="v4f" type="ieee_single" count="4"/> 11 11 - <vector id="v2d" type="ieee_double" count="2"/> 12 12 - <vector id="v16i8" type="int8" count="16"/> 13 13 - <vector id="v8i16" type="int16" count="8"/> 14 14 - <vector id="v4i32" type="int32" count="4"/> 15 15 - <vector id="v2i64" type="int64" count="2"/> 16 16 - <union id="vec128"> 17 17 - <field name="v4_float" type="v4f"/> 18 18 - <field name="v2_double" type="v2d"/> 19 19 - <field name="v16_int8" type="v16i8"/> 20 20 - <field name="v8_int16" type="v8i16"/> 21 21 - <field name="v4_int32" type="v4i32"/> 22 22 - <field name="v2_int64" type="v2i64"/> 23 23 - <field name="uint128" type="uint128"/> 24 24 - </union> 25 25 - <flags id="i386_mxcsr" size="4"> 26 26 - <field name="IE" start="0" end="0"/> 27 27 - <field name="DE" start="1" end="1"/> 28 28 - <field name="ZE" start="2" end="2"/> 29 29 - <field name="OE" start="3" end="3"/> 30 30 - <field name="UE" start="4" end="4"/> 31 31 - <field name="PE" start="5" end="5"/> 32 32 - <field name="DAZ" start="6" end="6"/> 33 33 - <field name="IM" start="7" end="7"/> 34 34 - <field name="DM" start="8" end="8"/> 35 35 - <field name="ZM" start="9" end="9"/> 36 36 - <field name="OM" start="10" end="10"/> 37 37 - <field name="UM" start="11" end="11"/> 38 38 - <field name="PM" start="12" end="12"/> 39 39 - <field name="FZ" start="15" end="15"/> 40 40 - </flags> 41 41 - 42 42 - <reg name="xmm0" bitsize="128" type="vec128" regnum="40"/> 43 43 - <reg name="xmm1" bitsize="128" type="vec128"/> 44 44 - <reg name="xmm2" bitsize="128" type="vec128"/> 45 45 - <reg name="xmm3" bitsize="128" type="vec128"/> 46 46 - <reg name="xmm4" bitsize="128" type="vec128"/> 47 47 - <reg name="xmm5" bitsize="128" type="vec128"/> 48 48 - <reg name="xmm6" bitsize="128" type="vec128"/> 49 49 - <reg name="xmm7" bitsize="128" type="vec128"/> 50 50 - <reg name="xmm8" bitsize="128" type="vec128"/> 51 51 - <reg name="xmm9" bitsize="128" type="vec128"/> 52 52 - <reg name="xmm10" bitsize="128" type="vec128"/> 53 53 - <reg name="xmm11" bitsize="128" type="vec128"/> 54 54 - <reg name="xmm12" bitsize="128" type="vec128"/> 55 55 - <reg name="xmm13" bitsize="128" type="vec128"/> 56 56 - <reg name="xmm14" bitsize="128" type="vec128"/> 57 57 - <reg name="xmm15" bitsize="128" type="vec128"/> 58 58 - 59 59 - <reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/> 60 60 - </feature>

+206 -4

gdb-xml/i386-64bit.xml

··· 5 5 are permitted in any medium without royalty provided the copyright 6 6 notice and this notice are preserved. --> 7 7 8 8 - <!-- I386 64bit --> 8 8 + <!-- x86_64 64bit --> 9 9 10 10 <!DOCTYPE target SYSTEM "gdb-target.dtd"> 11 11 - <feature name="org.gnu.gdb.i386.64bit"> 12 12 - <xi:include href="i386-64bit-core.xml"/> 13 13 - <xi:include href="i386-64bit-sse.xml"/> 11 11 + 12 12 + <feature name="org.gnu.gdb.i386.core"> 13 13 + <flags id="x64_eflags" size="4"> 14 14 + <field name="" start="22" end="31"/> 15 15 + <field name="ID" start="21" end="21"/> 16 16 + <field name="VIP" start="20" end="20"/> 17 17 + <field name="VIF" start="19" end="19"/> 18 18 + <field name="AC" start="18" end="18"/> 19 19 + <field name="VM" start="17" end="17"/> 20 20 + <field name="RF" start="16" end="16"/> 21 21 + <field name="" start="15" end="15"/> 22 22 + <field name="NT" start="14" end="14"/> 23 23 + <field name="IOPL" start="12" end="13"/> 24 24 + <field name="OF" start="11" end="11"/> 25 25 + <field name="DF" start="10" end="10"/> 26 26 + <field name="IF" start="9" end="9"/> 27 27 + <field name="TF" start="8" end="8"/> 28 28 + <field name="SF" start="7" end="7"/> 29 29 + <field name="ZF" start="6" end="6"/> 30 30 + <field name="" start="5" end="5"/> 31 31 + <field name="AF" start="4" end="4"/> 32 32 + <field name="" start="3" end="3"/> 33 33 + <field name="PF" start="2" end="2"/> 34 34 + <field name="" start="1" end="1"/> 35 35 + <field name="CF" start="0" end="0"/> 36 36 + </flags> 37 37 + 38 38 + <!-- General registers --> 39 39 + 40 40 + <reg name="rax" bitsize="64" type="int64" regnum="0"/> 41 41 + <reg name="rbx" bitsize="64" type="int64"/> 42 42 + <reg name="rcx" bitsize="64" type="int64"/> 43 43 + <reg name="rdx" bitsize="64" type="int64"/> 44 44 + <reg name="rsi" bitsize="64" type="int64"/> 45 45 + <reg name="rdi" bitsize="64" type="int64"/> 46 46 + <reg name="rbp" bitsize="64" type="data_ptr"/> 47 47 + <reg name="rsp" bitsize="64" type="data_ptr"/> 48 48 + <reg name="r8" bitsize="64" type="int64"/> 49 49 + <reg name="r9" bitsize="64" type="int64"/> 50 50 + <reg name="r10" bitsize="64" type="int64"/> 51 51 + <reg name="r11" bitsize="64" type="int64"/> 52 52 + <reg name="r12" bitsize="64" type="int64"/> 53 53 + <reg name="r13" bitsize="64" type="int64"/> 54 54 + <reg name="r14" bitsize="64" type="int64"/> 55 55 + <reg name="r15" bitsize="64" type="int64"/> 56 56 + 57 57 + <reg name="rip" bitsize="64" type="code_ptr"/> 58 58 + <reg name="eflags" bitsize="32" type="x64_eflags"/> 59 59 + 60 60 + <!-- Segment registers --> 61 61 + 62 62 + <reg name="cs" bitsize="32" type="int32"/> 63 63 + <reg name="ss" bitsize="32" type="int32"/> 64 64 + <reg name="ds" bitsize="32" type="int32"/> 65 65 + <reg name="es" bitsize="32" type="int32"/> 66 66 + <reg name="fs" bitsize="32" type="int32"/> 67 67 + <reg name="gs" bitsize="32" type="int32"/> 68 68 + 69 69 + <!-- Segment descriptor caches and TLS base MSRs --> 70 70 + 71 71 + <!--reg name="cs_base" bitsize="64" type="int64"/> 72 72 + <reg name="ss_base" bitsize="64" type="int64"/> 73 73 + <reg name="ds_base" bitsize="64" type="int64"/> 74 74 + <reg name="es_base" bitsize="64" type="int64"/--> 75 75 + <reg name="fs_base" bitsize="64" type="int64"/> 76 76 + <reg name="gs_base" bitsize="64" type="int64"/> 77 77 + <reg name="k_gs_base" bitsize="64" type="int64"/> 78 78 + 79 79 + <!-- Control registers --> 80 80 + 81 81 + <flags id="x64_cr0" size="8"> 82 82 + <field name="PG" start="31" end="31"/> 83 83 + <field name="CD" start="30" end="30"/> 84 84 + <field name="NW" start="29" end="29"/> 85 85 + <field name="AM" start="18" end="18"/> 86 86 + <field name="WP" start="16" end="16"/> 87 87 + <field name="NE" start="5" end="5"/> 88 88 + <field name="ET" start="4" end="4"/> 89 89 + <field name="TS" start="3" end="3"/> 90 90 + <field name="EM" start="2" end="2"/> 91 91 + <field name="MP" start="1" end="1"/> 92 92 + <field name="PE" start="0" end="0"/> 93 93 + </flags> 94 94 + 95 95 + <flags id="x64_cr3" size="8"> 96 96 + <field name="PDBR" start="12" end="63"/> 97 97 + <!--field name="" start="3" end="11"/> 98 98 + <field name="WT" start="2" end="2"/> 99 99 + <field name="CD" start="1" end="1"/> 100 100 + <field name="" start="0" end="0"/--> 101 101 + <field name="PCID" start="0" end="11"/> 102 102 + </flags> 103 103 + 104 104 + <flags id="x64_cr4" size="8"> 105 105 + <field name="PKE" start="22" end="22"/> 106 106 + <field name="SMAP" start="21" end="21"/> 107 107 + <field name="SMEP" start="20" end="20"/> 108 108 + <field name="OSXSAVE" start="18" end="18"/> 109 109 + <field name="PCIDE" start="17" end="17"/> 110 110 + <field name="FSGSBASE" start="16" end="16"/> 111 111 + <field name="SMXE" start="14" end="14"/> 112 112 + <field name="VMXE" start="13" end="13"/> 113 113 + <field name="LA57" start="12" end="12"/> 114 114 + <field name="UMIP" start="11" end="11"/> 115 115 + <field name="OSXMMEXCPT" start="10" end="10"/> 116 116 + <field name="OSFXSR" start="9" end="9"/> 117 117 + <field name="PCE" start="8" end="8"/> 118 118 + <field name="PGE" start="7" end="7"/> 119 119 + <field name="MCE" start="6" end="6"/> 120 120 + <field name="PAE" start="5" end="5"/> 121 121 + <field name="PSE" start="4" end="4"/> 122 122 + <field name="DE" start="3" end="3"/> 123 123 + <field name="TSD" start="2" end="2"/> 124 124 + <field name="PVI" start="1" end="1"/> 125 125 + <field name="VME" start="0" end="0"/> 126 126 + </flags> 127 127 + 128 128 + <flags id="x64_efer" size="8"> 129 129 + <field name="TCE" start="15" end="15"/> 130 130 + <field name="FFXSR" start="14" end="14"/> 131 131 + <field name="LMSLE" start="13" end="13"/> 132 132 + <field name="SVME" start="12" end="12"/> 133 133 + <field name="NXE" start="11" end="11"/> 134 134 + <field name="LMA" start="10" end="10"/> 135 135 + <field name="LME" start="8" end="8"/> 136 136 + <field name="SCE" start="0" end="0"/> 137 137 + </flags> 138 138 + 139 139 + <reg name="cr0" bitsize="64" type="x64_cr0"/> 140 140 + <reg name="cr2" bitsize="64" type="int64"/> 141 141 + <reg name="cr3" bitsize="64" type="x64_cr3"/> 142 142 + <reg name="cr4" bitsize="64" type="x64_cr4"/> 143 143 + <reg name="cr8" bitsize="64" type="int64"/> 144 144 + <reg name="efer" bitsize="64" type="x64_efer"/> 145 145 + 146 146 + <!-- x87 FPU --> 147 147 + 148 148 + <reg name="st0" bitsize="80" type="i387_ext"/> 149 149 + <reg name="st1" bitsize="80" type="i387_ext"/> 150 150 + <reg name="st2" bitsize="80" type="i387_ext"/> 151 151 + <reg name="st3" bitsize="80" type="i387_ext"/> 152 152 + <reg name="st4" bitsize="80" type="i387_ext"/> 153 153 + <reg name="st5" bitsize="80" type="i387_ext"/> 154 154 + <reg name="st6" bitsize="80" type="i387_ext"/> 155 155 + <reg name="st7" bitsize="80" type="i387_ext"/> 156 156 + 157 157 + <reg name="fctrl" bitsize="32" type="int" group="float"/> 158 158 + <reg name="fstat" bitsize="32" type="int" group="float"/> 159 159 + <reg name="ftag" bitsize="32" type="int" group="float"/> 160 160 + <reg name="fiseg" bitsize="32" type="int" group="float"/> 161 161 + <reg name="fioff" bitsize="32" type="int" group="float"/> 162 162 + <reg name="foseg" bitsize="32" type="int" group="float"/> 163 163 + <reg name="fooff" bitsize="32" type="int" group="float"/> 164 164 + <reg name="fop" bitsize="32" type="int" group="float"/> 165 165 + 166 166 + <vector id="v4f" type="ieee_single" count="4"/> 167 167 + <vector id="v2d" type="ieee_double" count="2"/> 168 168 + <vector id="v16i8" type="int8" count="16"/> 169 169 + <vector id="v8i16" type="int16" count="8"/> 170 170 + <vector id="v4i32" type="int32" count="4"/> 171 171 + <vector id="v2i64" type="int64" count="2"/> 172 172 + <union id="vec128"> 173 173 + <field name="v4_float" type="v4f"/> 174 174 + <field name="v2_double" type="v2d"/> 175 175 + <field name="v16_int8" type="v16i8"/> 176 176 + <field name="v8_int16" type="v8i16"/> 177 177 + <field name="v4_int32" type="v4i32"/> 178 178 + <field name="v2_int64" type="v2i64"/> 179 179 + <field name="uint128" type="uint128"/> 180 180 + </union> 181 181 + <flags id="x64_mxcsr" size="4"> 182 182 + <field name="IE" start="0" end="0"/> 183 183 + <field name="DE" start="1" end="1"/> 184 184 + <field name="ZE" start="2" end="2"/> 185 185 + <field name="OE" start="3" end="3"/> 186 186 + <field name="UE" start="4" end="4"/> 187 187 + <field name="PE" start="5" end="5"/> 188 188 + <field name="DAZ" start="6" end="6"/> 189 189 + <field name="IM" start="7" end="7"/> 190 190 + <field name="DM" start="8" end="8"/> 191 191 + <field name="ZM" start="9" end="9"/> 192 192 + <field name="OM" start="10" end="10"/> 193 193 + <field name="UM" start="11" end="11"/> 194 194 + <field name="PM" start="12" end="12"/> 195 195 + <field name="FZ" start="15" end="15"/> 196 196 + </flags> 197 197 + 198 198 + <reg name="xmm0" bitsize="128" type="vec128"/> 199 199 + <reg name="xmm1" bitsize="128" type="vec128"/> 200 200 + <reg name="xmm2" bitsize="128" type="vec128"/> 201 201 + <reg name="xmm3" bitsize="128" type="vec128"/> 202 202 + <reg name="xmm4" bitsize="128" type="vec128"/> 203 203 + <reg name="xmm5" bitsize="128" type="vec128"/> 204 204 + <reg name="xmm6" bitsize="128" type="vec128"/> 205 205 + <reg name="xmm7" bitsize="128" type="vec128"/> 206 206 + <reg name="xmm8" bitsize="128" type="vec128"/> 207 207 + <reg name="xmm9" bitsize="128" type="vec128"/> 208 208 + <reg name="xmm10" bitsize="128" type="vec128"/> 209 209 + <reg name="xmm11" bitsize="128" type="vec128"/> 210 210 + <reg name="xmm12" bitsize="128" type="vec128"/> 211 211 + <reg name="xmm13" bitsize="128" type="vec128"/> 212 212 + <reg name="xmm14" bitsize="128" type="vec128"/> 213 213 + <reg name="xmm15" bitsize="128" type="vec128"/> 214 214 + 215 215 + <reg name="mxcsr" bitsize="32" type="x64_mxcsr" group="vector"/> 14 216 </feature>

+1 -1

hw/Makefile.objs

··· 30 30 devices-dirs-$(CONFIG_SOFTMMU) += timer/ 31 31 devices-dirs-$(CONFIG_TPM) += tpm/ 32 32 devices-dirs-$(CONFIG_SOFTMMU) += usb/ 33 33 - devices-dirs-$(CONFIG_SOFTMMU) += vfio/ 33 33 + devices-dirs-$(CONFIG_VFIO) += vfio/ 34 34 devices-dirs-$(CONFIG_SOFTMMU) += virtio/ 35 35 devices-dirs-$(CONFIG_SOFTMMU) += watchdog/ 36 36 devices-dirs-$(CONFIG_SOFTMMU) += xen/

+1 -1

hw/alpha/Makefile.objs

··· 1 1 - obj-y += dp264.o pci.o typhoon.o 1 1 + obj-$(CONFIG_DP264) += dp264.o pci.o typhoon.o

+2 -2

hw/alpha/dp264.c

··· 114 114 error_report("no palcode provided"); 115 115 exit(1); 116 116 } 117 117 - size = load_elf(palcode_filename, cpu_alpha_superpage_to_phys, 117 117 + size = load_elf(palcode_filename, NULL, cpu_alpha_superpage_to_phys, 118 118 NULL, &palcode_entry, &palcode_low, &palcode_high, 119 119 0, EM_ALPHA, 0, 0); 120 120 if (size < 0) { ··· 133 133 if (kernel_filename) { 134 134 uint64_t param_offset; 135 135 136 136 - size = load_elf(kernel_filename, cpu_alpha_superpage_to_phys, 136 136 + size = load_elf(kernel_filename, NULL, cpu_alpha_superpage_to_phys, 137 137 NULL, &kernel_entry, &kernel_low, &kernel_high, 138 138 0, EM_ALPHA, 0, 0); 139 139 if (size < 0) {

+2 -1

hw/arm/Makefile.objs

··· 1 1 - obj-y += boot.o virt.o sysbus-fdt.o 1 1 + obj-y += boot.o sysbus-fdt.o 2 2 + obj-$(CONFIG_ARM_VIRT) += virt.o 2 3 obj-$(CONFIG_ACPI) += virt-acpi-build.o 3 4 obj-$(CONFIG_DIGIC) += digic_boards.o 4 5 obj-$(CONFIG_EXYNOS4) += exynos4_boards.o

+2 -1

hw/arm/armv7m.c

··· 310 310 as = cpu_get_address_space(cs, asidx); 311 311 312 312 if (kernel_filename) { 313 313 - image_size = load_elf_as(kernel_filename, NULL, NULL, &entry, &lowaddr, 313 313 + image_size = load_elf_as(kernel_filename, NULL, NULL, NULL, 314 314 + &entry, &lowaddr, 314 315 NULL, big_endian, EM_ARM, 1, 0, as); 315 316 if (image_size < 0) { 316 317 image_size = load_image_targphys_as(kernel_filename, 0,

+1 -1

hw/arm/boot.c

··· 881 881 } 882 882 } 883 883 884 884 - ret = load_elf_as(info->kernel_filename, NULL, NULL, 884 884 + ret = load_elf_as(info->kernel_filename, NULL, NULL, NULL, 885 885 pentry, lowaddr, highaddr, big_endian, elf_machine, 886 886 1, data_swab, as); 887 887 if (ret <= 0) {

+1 -1

hw/core/generic-loader.c

··· 136 136 AddressSpace *as = s->cpu ? s->cpu->as : NULL; 137 137 138 138 if (!s->force_raw) { 139 139 - size = load_elf_as(s->file, NULL, NULL, &entry, NULL, NULL, 139 139 + size = load_elf_as(s->file, NULL, NULL, NULL, &entry, NULL, NULL, 140 140 big_endian, 0, 0, 0, as); 141 141 142 142 if (size < 0) {

+21 -14

hw/core/loader.c

··· 77 77 ssize_t load_image_size(const char *filename, void *addr, size_t size) 78 78 { 79 79 int fd; 80 80 - ssize_t actsize; 80 80 + ssize_t actsize, l = 0; 81 81 82 82 fd = open(filename, O_RDONLY | O_BINARY); 83 83 if (fd < 0) { 84 84 return -1; 85 85 } 86 86 87 87 - actsize = read(fd, addr, size); 88 88 - if (actsize < 0) { 89 89 - close(fd); 90 90 - return -1; 87 87 + while ((actsize = read(fd, addr + l, size - l)) > 0) { 88 88 + l += actsize; 91 89 } 90 90 + 92 91 close(fd); 93 92 94 94 - return actsize; 93 93 + return actsize < 0 ? -1 : l; 95 94 } 96 95 97 96 /* read()-like version */ ··· 396 395 } 397 396 398 397 /* return < 0 if error, otherwise the number of bytes loaded in memory */ 399 399 - int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t), 398 398 + int load_elf(const char *filename, 399 399 + uint64_t (*elf_note_fn)(void *, void *, bool), 400 400 + uint64_t (*translate_fn)(void *, uint64_t), 400 401 void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, 401 402 uint64_t *highaddr, int big_endian, int elf_machine, 402 403 int clear_lsb, int data_swab) 403 404 { 404 404 - return load_elf_as(filename, translate_fn, translate_opaque, pentry, 405 405 - lowaddr, highaddr, big_endian, elf_machine, clear_lsb, 406 406 - data_swab, NULL); 405 405 + return load_elf_as(filename, elf_note_fn, translate_fn, translate_opaque, 406 406 + pentry, lowaddr, highaddr, big_endian, elf_machine, 407 407 + clear_lsb, data_swab, NULL); 407 408 } 408 409 409 410 /* return < 0 if error, otherwise the number of bytes loaded in memory */ 410 411 int load_elf_as(const char *filename, 412 412 + uint64_t (*elf_note_fn)(void *, void *, bool), 411 413 uint64_t (*translate_fn)(void *, uint64_t), 412 414 void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, 413 415 uint64_t *highaddr, int big_endian, int elf_machine, 414 416 int clear_lsb, int data_swab, AddressSpace *as) 415 417 { 416 416 - return load_elf_ram(filename, translate_fn, translate_opaque, 418 418 + return load_elf_ram(filename, elf_note_fn, translate_fn, translate_opaque, 417 419 pentry, lowaddr, highaddr, big_endian, elf_machine, 418 420 clear_lsb, data_swab, as, true); 419 421 } 420 422 421 423 /* return < 0 if error, otherwise the number of bytes loaded in memory */ 422 424 int load_elf_ram(const char *filename, 425 425 + uint64_t (*elf_note_fn)(void *, void *, bool), 423 426 uint64_t (*translate_fn)(void *, uint64_t), 424 427 void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, 425 428 uint64_t *highaddr, int big_endian, int elf_machine, 426 429 int clear_lsb, int data_swab, AddressSpace *as, 427 430 bool load_rom) 428 431 { 429 429 - return load_elf_ram_sym(filename, translate_fn, translate_opaque, 432 432 + return load_elf_ram_sym(filename, elf_note_fn, 433 433 + translate_fn, translate_opaque, 430 434 pentry, lowaddr, highaddr, big_endian, 431 435 elf_machine, clear_lsb, data_swab, as, 432 436 load_rom, NULL); ··· 434 438 435 439 /* return < 0 if error, otherwise the number of bytes loaded in memory */ 436 440 int load_elf_ram_sym(const char *filename, 441 441 + uint64_t (*elf_note_fn)(void *, void *, bool), 437 442 uint64_t (*translate_fn)(void *, uint64_t), 438 443 void *translate_opaque, uint64_t *pentry, 439 444 uint64_t *lowaddr, uint64_t *highaddr, int big_endian, ··· 476 481 477 482 lseek(fd, 0, SEEK_SET); 478 483 if (e_ident[EI_CLASS] == ELFCLASS64) { 479 479 - ret = load_elf64(filename, fd, translate_fn, translate_opaque, must_swab, 484 484 + ret = load_elf64(filename, fd, elf_note_fn, 485 485 + translate_fn, translate_opaque, must_swab, 480 486 pentry, lowaddr, highaddr, elf_machine, clear_lsb, 481 487 data_swab, as, load_rom, sym_cb); 482 488 } else { 483 483 - ret = load_elf32(filename, fd, translate_fn, translate_opaque, must_swab, 489 489 + ret = load_elf32(filename, fd, elf_note_fn, 490 490 + translate_fn, translate_opaque, must_swab, 484 491 pentry, lowaddr, highaddr, elf_machine, clear_lsb, 485 492 data_swab, as, load_rom, sym_cb); 486 493 }

+1 -1

hw/cris/Makefile.objs

··· 1 1 obj-y += boot.o 2 2 - obj-y += axis_dev88.o 2 2 + obj-$(CONFIG_AXIS) += axis_dev88.o

+2 -1

hw/cris/boot.c

··· 75 75 env->load_info = li; 76 76 /* Boots a kernel elf binary, os/linux-2.6/vmlinux from the axis 77 77 devboard SDK. */ 78 78 - image_size = load_elf(li->image_filename, translate_kernel_address, NULL, 78 78 + image_size = load_elf(li->image_filename, NULL, 79 79 + translate_kernel_address, NULL, 79 80 &entry, NULL, &high, 0, EM_CRIS, 0, 0); 80 81 li->entry = entry; 81 82 if (image_size < 0) {

+1 -1

hw/hppa/Makefile.objs

··· 1 1 - obj-y += machine.o pci.o dino.o 1 1 + obj-$(CONFIG_DINO) += pci.o machine.o dino.o

+3 -3

hw/hppa/machine.c

··· 135 135 exit(1); 136 136 } 137 137 138 138 - size = load_elf(firmware_filename, NULL, 139 139 - NULL, &firmware_entry, &firmware_low, &firmware_high, 138 138 + size = load_elf(firmware_filename, NULL, NULL, NULL, 139 139 + &firmware_entry, &firmware_low, &firmware_high, 140 140 true, EM_PARISC, 0, 0); 141 141 142 142 /* Unfortunately, load_elf sign-extends reading elf32. */ ··· 165 165 166 166 /* Load kernel */ 167 167 if (kernel_filename) { 168 168 - size = load_elf(kernel_filename, &cpu_hppa_to_phys, 168 168 + size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, 169 169 NULL, &kernel_entry, &kernel_low, &kernel_high, 170 170 true, EM_PARISC, 0, 0); 171 171

+3 -2

hw/i2c/Makefile.objs

··· 1 1 - common-obj-$(CONFIG_I2C) += core.o smbus.o smbus_eeprom.o 1 1 + common-obj-$(CONFIG_I2C) += core.o smbus.o 2 2 + common-obj-$(CONFIG_SMBUS_EEPROM) += smbus_eeprom.o 2 3 common-obj-$(CONFIG_DDC) += i2c-ddc.o 3 4 common-obj-$(CONFIG_VERSATILE_I2C) += versatile_i2c.o 4 5 common-obj-$(CONFIG_ACPI_X86) += smbus_ich9.o 5 5 - common-obj-$(CONFIG_APM) += pm_smbus.o 6 6 + common-obj-$(CONFIG_ACPI_SMBUS) += pm_smbus.o 6 7 common-obj-$(CONFIG_BITBANG_I2C) += bitbang_i2c.o 7 8 common-obj-$(CONFIG_EXYNOS4) += exynos4210_i2c.o 8 9 common-obj-$(CONFIG_IMX_I2C) += imx_i2c.o

+3 -1

hw/i386/Makefile.objs

··· 1 1 obj-$(CONFIG_KVM) += kvm/ 2 2 obj-y += multiboot.o 3 3 - obj-y += pc.o pc_piix.o pc_q35.o 3 3 + obj-y += pc.o 4 4 + obj-$(CONFIG_I440FX) += pc_piix.o 5 5 + obj-$(CONFIG_Q35) += pc_q35.o 4 6 obj-y += pc_sysfw.o 5 7 obj-$(CONFIG_VTD) += x86-iommu.o intel_iommu.o 6 8 obj-$(CONFIG_AMD_IOMMU) += x86-iommu.o amd_iommu.o

+1 -1

hw/i386/multiboot.c

··· 199 199 exit(1); 200 200 } 201 201 202 202 - kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry, 202 202 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, 203 203 &elf_low, &elf_high, 0, I386_ELF_MACHINE, 204 204 0, 0); 205 205 if (kernel_size < 0) {

+191 -30

hw/i386/pc.c

··· 54 54 #include "sysemu/qtest.h" 55 55 #include "kvm_i386.h" 56 56 #include "hw/xen/xen.h" 57 57 + #include "hw/xen/start_info.h" 57 58 #include "ui/qemu-spice.h" 58 59 #include "exec/memory.h" 59 60 #include "exec/address-spaces.h" ··· 75 76 #include "hw/usb.h" 76 77 #include "hw/i386/intel_iommu.h" 77 78 #include "hw/net/ne2000-isa.h" 79 79 + #include "standard-headers/asm-x86/bootparam.h" 78 80 79 81 /* debug PC/ISA interrupts */ 80 82 //#define DEBUG_IRQ ··· 109 111 static struct e820_entry *e820_table; 110 112 static unsigned e820_entries; 111 113 struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; 114 114 + 115 115 + /* Physical Address of PVH entry point read from kernel ELF NOTE */ 116 116 + static size_t pvh_start_addr; 112 117 113 118 GlobalProperty pc_compat_3_1[] = { 114 119 { "intel-iommu", "dma-drain", "off" }, ··· 1055 1060 return size; 1056 1061 } 1057 1062 1058 1058 - /* setup_data types */ 1059 1059 - #define SETUP_NONE 0 1060 1060 - #define SETUP_E820_EXT 1 1061 1061 - #define SETUP_DTB 2 1062 1062 - #define SETUP_PCI 3 1063 1063 - #define SETUP_EFI 4 1064 1064 - 1065 1063 struct setup_data { 1066 1064 uint64_t next; 1067 1065 uint32_t type; ··· 1069 1067 uint8_t data[0]; 1070 1068 } __attribute__((packed)); 1071 1069 1070 1070 + 1071 1071 + /* 1072 1072 + * The entry point into the kernel for PVH boot is different from 1073 1073 + * the native entry point. The PVH entry is defined by the x86/HVM 1074 1074 + * direct boot ABI and is available in an ELFNOTE in the kernel binary. 1075 1075 + * 1076 1076 + * This function is passed to load_elf() when it is called from 1077 1077 + * load_elfboot() which then additionally checks for an ELF Note of 1078 1078 + * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to 1079 1079 + * parse the PVH entry address from the ELF Note. 1080 1080 + * 1081 1081 + * Due to trickery in elf_opts.h, load_elf() is actually available as 1082 1082 + * load_elf32() or load_elf64() and this routine needs to be able 1083 1083 + * to deal with being called as 32 or 64 bit. 1084 1084 + * 1085 1085 + * The address of the PVH entry point is saved to the 'pvh_start_addr' 1086 1086 + * global variable. (although the entry point is 32-bit, the kernel 1087 1087 + * binary can be either 32-bit or 64-bit). 1088 1088 + */ 1089 1089 + static uint64_t read_pvh_start_addr(void *arg1, void *arg2, bool is64) 1090 1090 + { 1091 1091 + size_t *elf_note_data_addr; 1092 1092 + 1093 1093 + /* Check if ELF Note header passed in is valid */ 1094 1094 + if (arg1 == NULL) { 1095 1095 + return 0; 1096 1096 + } 1097 1097 + 1098 1098 + if (is64) { 1099 1099 + struct elf64_note *nhdr64 = (struct elf64_note *)arg1; 1100 1100 + uint64_t nhdr_size64 = sizeof(struct elf64_note); 1101 1101 + uint64_t phdr_align = *(uint64_t *)arg2; 1102 1102 + uint64_t nhdr_namesz = nhdr64->n_namesz; 1103 1103 + 1104 1104 + elf_note_data_addr = 1105 1105 + ((void *)nhdr64) + nhdr_size64 + 1106 1106 + QEMU_ALIGN_UP(nhdr_namesz, phdr_align); 1107 1107 + } else { 1108 1108 + struct elf32_note *nhdr32 = (struct elf32_note *)arg1; 1109 1109 + uint32_t nhdr_size32 = sizeof(struct elf32_note); 1110 1110 + uint32_t phdr_align = *(uint32_t *)arg2; 1111 1111 + uint32_t nhdr_namesz = nhdr32->n_namesz; 1112 1112 + 1113 1113 + elf_note_data_addr = 1114 1114 + ((void *)nhdr32) + nhdr_size32 + 1115 1115 + QEMU_ALIGN_UP(nhdr_namesz, phdr_align); 1116 1116 + } 1117 1117 + 1118 1118 + pvh_start_addr = *elf_note_data_addr; 1119 1119 + 1120 1120 + return pvh_start_addr; 1121 1121 + } 1122 1122 + 1123 1123 + static bool load_elfboot(const char *kernel_filename, 1124 1124 + int kernel_file_size, 1125 1125 + uint8_t *header, 1126 1126 + size_t pvh_xen_start_addr, 1127 1127 + FWCfgState *fw_cfg) 1128 1128 + { 1129 1129 + uint32_t flags = 0; 1130 1130 + uint32_t mh_load_addr = 0; 1131 1131 + uint32_t elf_kernel_size = 0; 1132 1132 + uint64_t elf_entry; 1133 1133 + uint64_t elf_low, elf_high; 1134 1134 + int kernel_size; 1135 1135 + 1136 1136 + if (ldl_p(header) != 0x464c457f) { 1137 1137 + return false; /* no elfboot */ 1138 1138 + } 1139 1139 + 1140 1140 + bool elf_is64 = header[EI_CLASS] == ELFCLASS64; 1141 1141 + flags = elf_is64 ? 1142 1142 + ((Elf64_Ehdr *)header)->e_flags : ((Elf32_Ehdr *)header)->e_flags; 1143 1143 + 1144 1144 + if (flags & 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */ 1145 1145 + error_report("elfboot unsupported flags = %x", flags); 1146 1146 + exit(1); 1147 1147 + } 1148 1148 + 1149 1149 + uint64_t elf_note_type = XEN_ELFNOTE_PHYS32_ENTRY; 1150 1150 + kernel_size = load_elf(kernel_filename, read_pvh_start_addr, 1151 1151 + NULL, &elf_note_type, &elf_entry, 1152 1152 + &elf_low, &elf_high, 0, I386_ELF_MACHINE, 1153 1153 + 0, 0); 1154 1154 + 1155 1155 + if (kernel_size < 0) { 1156 1156 + error_report("Error while loading elf kernel"); 1157 1157 + exit(1); 1158 1158 + } 1159 1159 + mh_load_addr = elf_low; 1160 1160 + elf_kernel_size = elf_high - elf_low; 1161 1161 + 1162 1162 + if (pvh_start_addr == 0) { 1163 1163 + error_report("Error loading uncompressed kernel without PVH ELF Note"); 1164 1164 + exit(1); 1165 1165 + } 1166 1166 + fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, pvh_start_addr); 1167 1167 + fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr); 1168 1168 + fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, elf_kernel_size); 1169 1169 + 1170 1170 + return true; 1171 1171 + } 1172 1172 + 1072 1173 static void load_linux(PCMachineState *pcms, 1073 1174 FWCfgState *fw_cfg) 1074 1175 { ··· 1108 1209 if (ldl_p(header+0x202) == 0x53726448) { 1109 1210 protocol = lduw_p(header+0x206); 1110 1211 } else { 1212 1212 + /* 1213 1213 + * Check if the file is an uncompressed kernel file (ELF) and load it, 1214 1214 + * saving the PVH entry point used by the x86/HVM direct boot ABI. 1215 1215 + * If load_elfboot() is successful, populate the fw_cfg info. 1216 1216 + */ 1217 1217 + if (pcmc->pvh_enabled && 1218 1218 + load_elfboot(kernel_filename, kernel_size, 1219 1219 + header, pvh_start_addr, fw_cfg)) { 1220 1220 + fclose(f); 1221 1221 + 1222 1222 + fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 1223 1223 + strlen(kernel_cmdline) + 1); 1224 1224 + fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline); 1225 1225 + 1226 1226 + fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, sizeof(header)); 1227 1227 + fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, 1228 1228 + header, sizeof(header)); 1229 1229 + 1230 1230 + /* load initrd */ 1231 1231 + if (initrd_filename) { 1232 1232 + gsize initrd_size; 1233 1233 + gchar *initrd_data; 1234 1234 + GError *gerr = NULL; 1235 1235 + 1236 1236 + if (!g_file_get_contents(initrd_filename, &initrd_data, 1237 1237 + &initrd_size, &gerr)) { 1238 1238 + fprintf(stderr, "qemu: error reading initrd %s: %s\n", 1239 1239 + initrd_filename, gerr->message); 1240 1240 + exit(1); 1241 1241 + } 1242 1242 + 1243 1243 + initrd_max = pcms->below_4g_mem_size - pcmc->acpi_data_size - 1; 1244 1244 + if (initrd_size >= initrd_max) { 1245 1245 + fprintf(stderr, "qemu: initrd is too large, cannot support." 1246 1246 + "(max: %"PRIu32", need %"PRId64")\n", 1247 1247 + initrd_max, (uint64_t)initrd_size); 1248 1248 + exit(1); 1249 1249 + } 1250 1250 + 1251 1251 + initrd_addr = (initrd_max - initrd_size) & ~4095; 1252 1252 + 1253 1253 + fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); 1254 1254 + fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 1255 1255 + fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, 1256 1256 + initrd_size); 1257 1257 + } 1258 1258 + 1259 1259 + option_rom[nb_option_roms].bootindex = 0; 1260 1260 + option_rom[nb_option_roms].name = "pvh.bin"; 1261 1261 + nb_option_roms++; 1262 1262 + 1263 1263 + return; 1264 1264 + } 1111 1265 /* This looks like a multiboot kernel. If it is, let's stop 1112 1266 treating it like a Linux kernel. */ 1113 1267 if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename, ··· 1145 1299 #endif 1146 1300 1147 1301 /* highest address for loading the initrd */ 1148 1148 - if (protocol >= 0x203) { 1302 1302 + if (protocol >= 0x20c && 1303 1303 + lduw_p(header+0x236) & XLF_CAN_BE_LOADED_ABOVE_4G) { 1304 1304 + /* 1305 1305 + * Linux has supported initrd up to 4 GB for a very long time (2007, 1306 1306 + * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013), 1307 1307 + * though it only sets initrd_max to 2 GB to "work around bootloader 1308 1308 + * bugs". Luckily, QEMU firmware(which does something like bootloader) 1309 1309 + * has supported this. 1310 1310 + * 1311 1311 + * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can 1312 1312 + * be loaded into any address. 1313 1313 + * 1314 1314 + * In addition, initrd_max is uint32_t simply because QEMU doesn't 1315 1315 + * support the 64-bit boot protocol (specifically the ext_ramdisk_image 1316 1316 + * field). 1317 1317 + * 1318 1318 + * Therefore here just limit initrd_max to UINT32_MAX simply as well. 1319 1319 + */ 1320 1320 + initrd_max = UINT32_MAX; 1321 1321 + } else if (protocol >= 0x203) { 1149 1322 initrd_max = ldl_p(header+0x22c); 1150 1323 } else { 1151 1324 initrd_max = 0x37ffffff; ··· 1557 1730 for (i = 0; i < nb_option_roms; i++) { 1558 1731 assert(!strcmp(option_rom[i].name, "linuxboot.bin") || 1559 1732 !strcmp(option_rom[i].name, "linuxboot_dma.bin") || 1733 1733 + !strcmp(option_rom[i].name, "pvh.bin") || 1560 1734 !strcmp(option_rom[i].name, "multiboot.bin")); 1561 1735 rom_add_option(option_rom[i].name, option_rom[i].bootindex); 1562 1736 } ··· 1948 2122 static void pc_memory_plug(HotplugHandler *hotplug_dev, 1949 2123 DeviceState *dev, Error **errp) 1950 2124 { 1951 1951 - HotplugHandlerClass *hhc; 1952 2125 Error *local_err = NULL; 1953 2126 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1954 2127 bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); ··· 1962 2135 nvdimm_plug(&pcms->acpi_nvdimm_state); 1963 2136 } 1964 2137 1965 1965 - hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev); 1966 1966 - hhc->plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &error_abort); 2138 2138 + hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &error_abort); 1967 2139 out: 1968 2140 error_propagate(errp, local_err); 1969 2141 } ··· 1971 2143 static void pc_memory_unplug_request(HotplugHandler *hotplug_dev, 1972 2144 DeviceState *dev, Error **errp) 1973 2145 { 1974 1974 - HotplugHandlerClass *hhc; 1975 2146 Error *local_err = NULL; 1976 2147 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 1977 2148 ··· 1992 2163 goto out; 1993 2164 } 1994 2165 1995 1995 - hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev); 1996 1996 - hhc->unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 1997 1997 - 2166 2166 + hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, 2167 2167 + &local_err); 1998 2168 out: 1999 2169 error_propagate(errp, local_err); 2000 2170 } ··· 2003 2173 DeviceState *dev, Error **errp) 2004 2174 { 2005 2175 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 2006 2006 - HotplugHandlerClass *hhc; 2007 2176 Error *local_err = NULL; 2008 2177 2009 2009 - hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev); 2010 2010 - hhc->unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 2011 2011 - 2178 2178 + hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 2012 2179 if (local_err) { 2013 2180 goto out; 2014 2181 } ··· 2050 2217 DeviceState *dev, Error **errp) 2051 2218 { 2052 2219 CPUArchId *found_cpu; 2053 2053 - HotplugHandlerClass *hhc; 2054 2220 Error *local_err = NULL; 2055 2221 X86CPU *cpu = X86_CPU(dev); 2056 2222 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 2057 2223 2058 2224 if (pcms->acpi_dev) { 2059 2059 - hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev); 2060 2060 - hhc->plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 2225 2225 + hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 2061 2226 if (local_err) { 2062 2227 goto out; 2063 2228 } ··· 2081 2246 DeviceState *dev, Error **errp) 2082 2247 { 2083 2248 int idx = -1; 2084 2084 - HotplugHandlerClass *hhc; 2085 2249 Error *local_err = NULL; 2086 2250 X86CPU *cpu = X86_CPU(dev); 2087 2251 PCMachineState *pcms = PC_MACHINE(hotplug_dev); ··· 2098 2262 goto out; 2099 2263 } 2100 2264 2101 2101 - hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev); 2102 2102 - hhc->unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 2103 2103 - 2265 2265 + hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, 2266 2266 + &local_err); 2104 2267 if (local_err) { 2105 2268 goto out; 2106 2269 } ··· 2114 2277 DeviceState *dev, Error **errp) 2115 2278 { 2116 2279 CPUArchId *found_cpu; 2117 2117 - HotplugHandlerClass *hhc; 2118 2280 Error *local_err = NULL; 2119 2281 X86CPU *cpu = X86_CPU(dev); 2120 2282 PCMachineState *pcms = PC_MACHINE(hotplug_dev); 2121 2283 2122 2122 - hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev); 2123 2123 - hhc->unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 2124 2124 - 2284 2284 + hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); 2125 2285 if (local_err) { 2126 2286 goto out; 2127 2287 } ··· 2623 2783 pcmc->acpi_data_size = 0x20000 + 0x8000; 2624 2784 pcmc->save_tsc_khz = true; 2625 2785 pcmc->linuxboot_dma_enabled = true; 2786 2786 + pcmc->pvh_enabled = true; 2626 2787 assert(!mc->get_hotplug_handler); 2627 2788 mc->get_hotplug_handler = pc_get_hotplug_handler; 2628 2789 mc->cpu_index_to_instance_props = pc_cpu_index_to_props;

+3

hw/i386/pc_piix.c

··· 440 440 441 441 static void pc_i440fx_3_1_machine_options(MachineClass *m) 442 442 { 443 443 + PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 444 444 + 443 445 pc_i440fx_4_0_machine_options(m); 444 446 m->is_default = 0; 445 447 m->alias = NULL; 448 448 + pcmc->pvh_enabled = false; 446 449 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 447 450 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 448 451 }

+3

hw/i386/pc_q35.c

··· 376 376 377 377 static void pc_q35_3_1_machine_options(MachineClass *m) 378 378 { 379 379 + PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 380 380 + 379 381 pc_q35_4_0_machine_options(m); 380 382 m->default_kernel_irqchip_split = false; 381 383 m->alias = NULL; 384 384 + pcmc->pvh_enabled = false; 382 385 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 383 386 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 384 387 }

+2 -2

hw/ide/Makefile.objs

··· 1 1 common-obj-$(CONFIG_IDE_CORE) += core.o atapi.o 2 2 common-obj-$(CONFIG_IDE_QDEV) += qdev.o 3 3 common-obj-$(CONFIG_IDE_PCI) += pci.o 4 4 - common-obj-$(CONFIG_IDE_ISA) += isa.o 5 5 - common-obj-$(CONFIG_IDE_PIIX) += piix.o 4 4 + common-obj-$(CONFIG_IDE_ISA) += isa.o ioport.o 5 5 + common-obj-$(CONFIG_IDE_PIIX) += piix.o ioport.o 6 6 common-obj-$(CONFIG_IDE_CMD646) += cmd646.o 7 7 common-obj-$(CONFIG_IDE_MACIO) += macio.o 8 8 common-obj-$(CONFIG_IDE_MMIO) += mmio.o

-25

hw/ide/core.c

··· 2686 2686 qemu_vfree(s->io_buffer); 2687 2687 } 2688 2688 2689 2689 - static const MemoryRegionPortio ide_portio_list[] = { 2690 2690 - { 0, 8, 1, .read = ide_ioport_read, .write = ide_ioport_write }, 2691 2691 - { 0, 1, 2, .read = ide_data_readw, .write = ide_data_writew }, 2692 2692 - { 0, 1, 4, .read = ide_data_readl, .write = ide_data_writel }, 2693 2693 - PORTIO_END_OF_LIST(), 2694 2694 - }; 2695 2695 - 2696 2696 - static const MemoryRegionPortio ide_portio2_list[] = { 2697 2697 - { 0, 1, 1, .read = ide_status_read, .write = ide_cmd_write }, 2698 2698 - PORTIO_END_OF_LIST(), 2699 2699 - }; 2700 2700 - 2701 2701 - void ide_init_ioport(IDEBus *bus, ISADevice *dev, int iobase, int iobase2) 2702 2702 - { 2703 2703 - /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA 2704 2704 - bridge has been setup properly to always register with ISA. */ 2705 2705 - isa_register_portio_list(dev, &bus->portio_list, 2706 2706 - iobase, ide_portio_list, bus, "ide"); 2707 2707 - 2708 2708 - if (iobase2) { 2709 2709 - isa_register_portio_list(dev, &bus->portio2_list, 2710 2710 - iobase2, ide_portio2_list, bus, "ide"); 2711 2711 - } 2712 2712 - } 2713 2713 - 2714 2689 static bool is_identify_set(void *opaque, int version_id) 2715 2690 { 2716 2691 IDEState *s = opaque;

+66

hw/ide/ioport.c

··· 1 1 + /* 2 2 + * QEMU IDE disk and CD/DVD-ROM Emulator 3 3 + * 4 4 + * Copyright (c) 2003 Fabrice Bellard 5 5 + * Copyright (c) 2006 Openedhand Ltd. 6 6 + * 7 7 + * Permission is hereby granted, free of charge, to any person obtaining a copy 8 8 + * of this software and associated documentation files (the "Software"), to deal 9 9 + * in the Software without restriction, including without limitation the rights 10 10 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 11 + * copies of the Software, and to permit persons to whom the Software is 12 12 + * furnished to do so, subject to the following conditions: 13 13 + * 14 14 + * The above copyright notice and this permission notice shall be included in 15 15 + * all copies or substantial portions of the Software. 16 16 + * 17 17 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 18 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 19 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 20 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 21 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 22 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 23 + * THE SOFTWARE. 24 24 + */ 25 25 + 26 26 + #include "qemu/osdep.h" 27 27 + #include "hw/hw.h" 28 28 + #include "hw/isa/isa.h" 29 29 + #include "qemu/error-report.h" 30 30 + #include "qemu/timer.h" 31 31 + #include "sysemu/sysemu.h" 32 32 + #include "sysemu/blockdev.h" 33 33 + #include "sysemu/dma.h" 34 34 + #include "hw/block/block.h" 35 35 + #include "sysemu/block-backend.h" 36 36 + #include "qapi/error.h" 37 37 + #include "qemu/cutils.h" 38 38 + #include "sysemu/replay.h" 39 39 + 40 40 + #include "hw/ide/internal.h" 41 41 + #include "trace.h" 42 42 + 43 43 + static const MemoryRegionPortio ide_portio_list[] = { 44 44 + { 0, 8, 1, .read = ide_ioport_read, .write = ide_ioport_write }, 45 45 + { 0, 1, 2, .read = ide_data_readw, .write = ide_data_writew }, 46 46 + { 0, 1, 4, .read = ide_data_readl, .write = ide_data_writel }, 47 47 + PORTIO_END_OF_LIST(), 48 48 + }; 49 49 + 50 50 + static const MemoryRegionPortio ide_portio2_list[] = { 51 51 + { 0, 1, 1, .read = ide_status_read, .write = ide_cmd_write }, 52 52 + PORTIO_END_OF_LIST(), 53 53 + }; 54 54 + 55 55 + void ide_init_ioport(IDEBus *bus, ISADevice *dev, int iobase, int iobase2) 56 56 + { 57 57 + /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA 58 58 + bridge has been setup properly to always register with ISA. */ 59 59 + isa_register_portio_list(dev, &bus->portio_list, 60 60 + iobase, ide_portio_list, bus, "ide"); 61 61 + 62 62 + if (iobase2) { 63 63 + isa_register_portio_list(dev, &bus->portio2_list, 64 64 + iobase2, ide_portio2_list, bus, "ide"); 65 65 + } 66 66 + }

+2 -2

hw/lm32/Makefile.objs

··· 1 1 # LM32 boards 2 2 - obj-y += lm32_boards.o 3 3 - obj-y += milkymist.o 2 2 + obj-$(CONFIG_LM32) += lm32_boards.o 3 3 + obj-$(CONFIG_MILKYMIST) += milkymist.o

+4 -2

hw/lm32/lm32_boards.c

··· 138 138 uint64_t entry; 139 139 int kernel_size; 140 140 141 141 - kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL, 141 141 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 142 142 + &entry, NULL, NULL, 142 143 1, EM_LATTICEMICO32, 0, 0); 143 144 reset_info->bootstrap_pc = entry; 144 145 ··· 231 232 uint64_t entry; 232 233 int kernel_size; 233 234 234 234 - kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL, 235 235 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 236 236 + &entry, NULL, NULL, 235 237 1, EM_LATTICEMICO32, 0, 0); 236 238 reset_info->bootstrap_pc = entry; 237 239

+2 -1

hw/lm32/milkymist.c

··· 176 176 uint64_t entry; 177 177 178 178 /* Boots a kernel elf binary. */ 179 179 - kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL, 179 179 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 180 180 + &entry, NULL, NULL, 180 181 1, EM_LATTICEMICO32, 0, 0); 181 182 reset_info->bootstrap_pc = entry; 182 183

+2 -2

hw/m68k/Makefile.objs

··· 1 1 - obj-y += an5206.o mcf5208.o 2 2 - obj-y += mcf5206.o mcf_intc.o 1 1 + obj-$(CONFIG_AN5206) += an5206.o mcf5206.o 2 2 + obj-$(CONFIG_MCF5208) += mcf5208.o mcf_intc.o

+1 -1

hw/m68k/an5206.c

··· 66 66 exit(1); 67 67 } 68 68 69 69 - kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry, 69 69 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, 70 70 NULL, NULL, 1, EM_68K, 0, 0); 71 71 entry = elf_entry; 72 72 if (kernel_size < 0) {

+1 -1

hw/m68k/mcf5208.c

··· 294 294 exit(1); 295 295 } 296 296 297 297 - kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry, 297 297 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, 298 298 NULL, NULL, 1, EM_68K, 0, 0); 299 299 entry = elf_entry; 300 300 if (kernel_size < 0) {

+3 -3

hw/microblaze/Makefile.objs

··· 1 1 - obj-y += petalogix_s3adsp1800_mmu.o 2 2 - obj-y += petalogix_ml605_mmu.o 3 3 - obj-y += xlnx-zynqmp-pmu.o 1 1 + obj-$(CONFIG_PETALOGIX_S3ADSP1800) += petalogix_s3adsp1800_mmu.o 2 2 + obj-$(CONFIG_PETALOGIX_ML605) += petalogix_ml605_mmu.o 3 3 + obj-$(CONFIG_XLNX_ZYNQMP_PMU) += xlnx-zynqmp-pmu.o 4 4 obj-y += boot.o

+4 -3

hw/microblaze/boot.c

··· 142 142 #endif 143 143 144 144 /* Boots a kernel elf binary. */ 145 145 - kernel_size = load_elf(kernel_filename, NULL, NULL, 145 145 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 146 146 &entry, &low, &high, 147 147 big_endian, EM_MICROBLAZE, 0, 0); 148 148 base32 = entry; 149 149 if (base32 == 0xc0000000) { 150 150 - kernel_size = load_elf(kernel_filename, translate_kernel_address, 151 151 - NULL, &entry, NULL, NULL, 150 150 + kernel_size = load_elf(kernel_filename, NULL, 151 151 + translate_kernel_address, NULL, 152 152 + &entry, NULL, NULL, 152 153 big_endian, EM_MICROBLAZE, 0, 0); 153 154 } 154 155 /* Always boot into physical ram. */

+3 -2

hw/mips/Makefile.objs

··· 1 1 - obj-y += mips_r4k.o mips_malta.o mips_mipssim.o 2 1 obj-y += addr.o mips_int.o 2 2 + obj-$(CONFIG_R4K) += mips_r4k.o 3 3 + obj-$(CONFIG_MALTA) += gt64xxx_pci.o mips_malta.o 4 4 + obj-$(CONFIG_MIPSSIM) += mips_mipssim.o 3 5 obj-$(CONFIG_JAZZ) += mips_jazz.o 4 6 obj-$(CONFIG_FULONG) += mips_fulong2e.o 5 5 - obj-y += gt64xxx_pci.o 6 7 obj-$(CONFIG_MIPS_CPS) += cps.o 7 8 obj-$(CONFIG_MIPS_BOSTON) += boston.o

+3 -2

hw/mips/mips_fulong2e.c

··· 111 111 uint32_t *prom_buf; 112 112 long prom_size; 113 113 114 114 - kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, 115 115 - NULL, (uint64_t *)&kernel_entry, 114 114 + kernel_size = load_elf(loaderparams.kernel_filename, NULL, 115 115 + cpu_mips_kseg0_to_phys, NULL, 116 116 + (uint64_t *)&kernel_entry, 116 117 (uint64_t *)&kernel_low, (uint64_t *)&kernel_high, 117 118 0, EM_MIPS, 1, 0); 118 119 if (kernel_size < 0) {

+3 -2

hw/mips/mips_malta.c

··· 1010 1010 big_endian = 0; 1011 1011 #endif 1012 1012 1013 1013 - kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, 1014 1014 - NULL, (uint64_t *)&kernel_entry, NULL, 1013 1013 + kernel_size = load_elf(loaderparams.kernel_filename, NULL, 1014 1014 + cpu_mips_kseg0_to_phys, NULL, 1015 1015 + (uint64_t *)&kernel_entry, NULL, 1015 1016 (uint64_t *)&kernel_high, big_endian, EM_MIPS, 1, 0); 1016 1017 if (kernel_size < 0) { 1017 1018 error_report("could not load kernel '%s': %s",

+3 -2

hw/mips/mips_mipssim.c

··· 69 69 big_endian = 0; 70 70 #endif 71 71 72 72 - kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, 73 73 - NULL, (uint64_t *)&entry, NULL, 72 72 + kernel_size = load_elf(loaderparams.kernel_filename, NULL, 73 73 + cpu_mips_kseg0_to_phys, NULL, 74 74 + (uint64_t *)&entry, NULL, 74 75 (uint64_t *)&kernel_high, big_endian, 75 76 EM_MIPS, 1, 0); 76 77 if (kernel_size >= 0) {

+3 -2

hw/mips/mips_r4k.c

··· 92 92 #else 93 93 big_endian = 0; 94 94 #endif 95 95 - kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, 96 96 - NULL, (uint64_t *)&entry, NULL, 95 95 + kernel_size = load_elf(loaderparams.kernel_filename, NULL, 96 96 + cpu_mips_kseg0_to_phys, NULL, 97 97 + (uint64_t *)&entry, NULL, 97 98 (uint64_t *)&kernel_high, big_endian, 98 99 EM_MIPS, 1, 0); 99 100 if (kernel_size >= 0) {

+1 -1

hw/moxie/Makefile.objs

··· 1 1 # moxie boards 2 2 - obj-y += moxiesim.o 2 2 + obj-$(CONFIG_MOXIESIM) += moxiesim.o

+1 -1

hw/moxie/moxiesim.c

··· 57 57 long kernel_size; 58 58 ram_addr_t initrd_offset; 59 59 60 60 - kernel_size = load_elf(loader_params->kernel_filename, NULL, NULL, 60 60 + kernel_size = load_elf(loader_params->kernel_filename, NULL, NULL, NULL, 61 61 &entry, &kernel_low, &kernel_high, 1, EM_MOXIE, 62 62 0, 0); 63 63

+2 -2

hw/net/Makefile.objs

··· 7 7 common-obj-$(CONFIG_PCNET_PCI) += pcnet-pci.o 8 8 common-obj-$(CONFIG_PCNET_COMMON) += pcnet.o 9 9 common-obj-$(CONFIG_E1000_PCI) += e1000.o e1000x_common.o 10 10 - common-obj-$(CONFIG_E1000E_PCI) += net_tx_pkt.o net_rx_pkt.o 11 11 - common-obj-$(CONFIG_E1000E_PCI) += e1000e.o e1000e_core.o e1000x_common.o 10 10 + common-obj-$(CONFIG_E1000E_PCI_EXPRESS) += net_tx_pkt.o net_rx_pkt.o 11 11 + common-obj-$(CONFIG_E1000E_PCI_EXPRESS) += e1000e.o e1000e_core.o e1000x_common.o 12 12 common-obj-$(CONFIG_RTL8139_PCI) += rtl8139.o 13 13 common-obj-$(CONFIG_VMXNET3_PCI) += net_tx_pkt.o net_rx_pkt.o 14 14 common-obj-$(CONFIG_VMXNET3_PCI) += vmxnet3.o

+2 -1

hw/nios2/Makefile.objs

··· 1 1 - obj-y = boot.o cpu_pic.o 10m50_devboard.o 1 1 + obj-y = boot.o cpu_pic.o 2 2 + obj-$(CONFIG_NIOS2_10M50) += 10m50_devboard.o

+4 -3

hw/nios2/boot.c

··· 146 146 #endif 147 147 148 148 /* Boots a kernel elf binary. */ 149 149 - kernel_size = load_elf(kernel_filename, NULL, NULL, 149 149 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 150 150 &entry, &low, &high, 151 151 big_endian, EM_ALTERA_NIOS2, 0, 0); 152 152 base32 = entry; 153 153 if (base32 == 0xc0000000) { 154 154 - kernel_size = load_elf(kernel_filename, translate_kernel_address, 155 155 - NULL, &entry, NULL, NULL, 154 154 + kernel_size = load_elf(kernel_filename, NULL, 155 155 + translate_kernel_address, NULL, 156 156 + &entry, NULL, NULL, 156 157 big_endian, EM_ALTERA_NIOS2, 0, 0); 157 158 } 158 159

+1 -1

hw/openrisc/Makefile.objs

··· 1 1 obj-y = pic_cpu.o cputimer.o 2 2 - obj-y += openrisc_sim.o 2 2 + obj-$(CONFIG_OR1K_SIM) += openrisc_sim.o

+1 -1

hw/openrisc/openrisc_sim.c

··· 96 96 hwaddr entry; 97 97 98 98 if (kernel_filename && !qtest_enabled()) { 99 99 - kernel_size = load_elf(kernel_filename, NULL, NULL, 99 99 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 100 100 &elf_entry, NULL, NULL, 1, EM_OPENRISC, 101 101 1, 0); 102 102 entry = elf_entry;

+5 -5

hw/pci-host/Makefile.objs

··· 1 1 - common-obj-y += pam.o 1 1 + common-obj-$(CONFIG_PAM) += pam.o 2 2 3 3 # PPC devices 4 4 common-obj-$(CONFIG_PREP_PCI) += prep.o ··· 14 14 common-obj-$(CONFIG_PCI_SABRE) += sabre.o 15 15 common-obj-$(CONFIG_FULONG) += bonito.o 16 16 common-obj-$(CONFIG_PCI_PIIX) += piix.o 17 17 - common-obj-$(CONFIG_PCI_Q35) += q35.o 18 18 - common-obj-$(CONFIG_PCI_GENERIC) += gpex.o 19 19 - common-obj-$(CONFIG_PCI_XILINX) += xilinx-pcie.o 17 17 + common-obj-$(CONFIG_PCI_EXPRESS_Q35) += q35.o 18 18 + common-obj-$(CONFIG_PCI_EXPRESS_GENERIC_BRIDGE) += gpex.o 19 19 + common-obj-$(CONFIG_PCI_EXPRESS_XILINX) += xilinx-pcie.o 20 20 21 21 - common-obj-$(CONFIG_PCI_DESIGNWARE) += designware.o 21 21 + common-obj-$(CONFIG_PCI_EXPRESS_DESIGNWARE) += designware.o

+1 -1

hw/pci-host/prep.c

··· 331 331 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, s->bios_name); 332 332 if (filename) { 333 333 if (s->elf_machine != EM_NONE) { 334 334 - bios_size = load_elf(filename, NULL, NULL, NULL, 334 334 + bios_size = load_elf(filename, NULL, NULL, NULL, NULL, 335 335 NULL, NULL, 1, s->elf_machine, 0, 0); 336 336 } 337 337 if (bios_size < 0) {

+6 -5

hw/ppc/Makefile.objs

··· 13 13 endif 14 14 obj-$(CONFIG_PSERIES) += spapr_rtas_ddw.o 15 15 # PowerPC 4xx boards 16 16 - obj-$(CONFIG_PPC4XX) += ppc4xx_devs.o ppc4xx_pci.o ppc405_uc.o ppc405_boards.o 17 17 - obj-$(CONFIG_PPC4XX) += ppc440_bamboo.o ppc440_pcix.o ppc440_uc.o 16 16 + obj-$(CONFIG_PPC405) += ppc405_boards.o ppc405_uc.o 17 17 + obj-$(CONFIG_PPC440) += ppc440_bamboo.o ppc440_pcix.o ppc440_uc.o 18 18 + obj-$(CONFIG_PPC4XX) += ppc4xx_pci.o ppc4xx_devs.o 18 19 obj-$(CONFIG_SAM460EX) += sam460ex.o 19 20 # PReP 20 21 obj-$(CONFIG_PREP) += prep.o 21 22 obj-$(CONFIG_PREP) += prep_systemio.o 22 23 obj-${CONFIG_RS6000_MC} += rs6000_mc.o 23 24 # OldWorld PowerMac 24 24 - obj-$(CONFIG_MAC) += mac_oldworld.o 25 25 + obj-$(CONFIG_MAC_OLDWORLD) += mac_oldworld.o 25 26 # NewWorld PowerMac 26 26 - obj-$(CONFIG_MAC) += mac_newworld.o 27 27 + obj-$(CONFIG_MAC_NEWWORLD) += mac_newworld.o 27 28 # e500 28 29 obj-$(CONFIG_E500) += e500.o mpc8544ds.o e500plat.o 29 30 obj-$(CONFIG_E500) += mpc8544_guts.o ppce500_spin.o 30 31 # PowerPC 440 Xilinx ML507 reference board. 31 31 - obj-$(CONFIG_XILINX) += virtex_ml507.o 32 32 + obj-$(CONFIG_VIRTEX) += virtex_ml507.o

+2 -1

hw/ppc/e500.c

··· 988 988 989 989 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, payload_name); 990 990 991 991 - payload_size = load_elf(filename, NULL, NULL, &bios_entry, &loadaddr, NULL, 991 991 + payload_size = load_elf(filename, NULL, NULL, NULL, 992 992 + &bios_entry, &loadaddr, NULL, 992 993 1, PPC_ELF_MACHINE, 0, 0); 993 994 if (payload_size < 0) { 994 995 /*

+3 -2

hw/ppc/mac_newworld.c

··· 164 164 165 165 /* Load OpenBIOS (ELF) */ 166 166 if (filename) { 167 167 - bios_size = load_elf(filename, NULL, NULL, NULL, 167 167 + bios_size = load_elf(filename, NULL, NULL, NULL, NULL, 168 168 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); 169 169 170 170 g_free(filename); ··· 187 187 #endif 188 188 kernel_base = KERNEL_LOAD_ADDR; 189 189 190 190 - kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, 190 190 + kernel_size = load_elf(kernel_filename, NULL, 191 191 + translate_kernel_address, NULL, 191 192 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 192 193 0, 0); 193 194 if (kernel_size < 0)

+3 -2

hw/ppc/mac_oldworld.c

··· 139 139 140 140 /* Load OpenBIOS (ELF) */ 141 141 if (filename) { 142 142 - bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL, 142 142 + bios_size = load_elf(filename, NULL, 0, NULL, NULL, NULL, NULL, 143 143 1, PPC_ELF_MACHINE, 0, 0); 144 144 g_free(filename); 145 145 } else { ··· 160 160 bswap_needed = 0; 161 161 #endif 162 162 kernel_base = KERNEL_LOAD_ADDR; 163 163 - kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, 163 163 + kernel_size = load_elf(kernel_filename, NULL, 164 164 + translate_kernel_address, NULL, 164 165 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 165 166 0, 0); 166 167 if (kernel_size < 0)

+1 -1

hw/ppc/ppc440_bamboo.c

··· 256 256 success = load_uimage(kernel_filename, &entry, &loadaddr, NULL, 257 257 NULL, NULL); 258 258 if (success < 0) { 259 259 - success = load_elf(kernel_filename, NULL, NULL, &elf_entry, 259 259 + success = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, 260 260 &elf_lowaddr, NULL, 1, PPC_ELF_MACHINE, 261 261 0, 0); 262 262 entry = elf_entry;

+2 -1

hw/ppc/sam460ex.c

··· 426 426 if (success < 0) { 427 427 uint64_t elf_entry, elf_lowaddr; 428 428 429 429 - success = load_elf(machine->kernel_filename, NULL, NULL, &elf_entry, 429 429 + success = load_elf(machine->kernel_filename, NULL, 430 430 + NULL, NULL, &elf_entry, 430 431 &elf_lowaddr, NULL, 1, PPC_ELF_MACHINE, 0, 0); 431 432 entry = elf_entry; 432 433 loadaddr = elf_lowaddr;

+4 -3

hw/ppc/spapr.c

··· 2851 2851 if (kernel_filename) { 2852 2852 uint64_t lowaddr = 0; 2853 2853 2854 2854 - spapr->kernel_size = load_elf(kernel_filename, translate_kernel_address, 2855 2855 - NULL, NULL, &lowaddr, NULL, 1, 2854 2854 + spapr->kernel_size = load_elf(kernel_filename, NULL, 2855 2855 + translate_kernel_address, NULL, 2856 2856 + NULL, &lowaddr, NULL, 1, 2856 2857 PPC_ELF_MACHINE, 0, 0); 2857 2858 if (spapr->kernel_size == ELF_LOAD_WRONG_ENDIAN) { 2858 2858 - spapr->kernel_size = load_elf(kernel_filename, 2859 2859 + spapr->kernel_size = load_elf(kernel_filename, NULL, 2859 2860 translate_kernel_address, NULL, NULL, 2860 2861 &lowaddr, NULL, 0, PPC_ELF_MACHINE, 2861 2862 0, 0);

+1 -1

hw/ppc/virtex_ml507.c

··· 258 258 hwaddr boot_offset; 259 259 260 260 /* Boots a kernel elf binary. */ 261 261 - kernel_size = load_elf(kernel_filename, NULL, NULL, 261 261 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 262 262 &entry, &low, &high, 1, PPC_ELF_MACHINE, 263 263 0, 0); 264 264 boot_info.bootstrap_pc = entry & 0x00ffffff;

+11 -11

hw/riscv/Makefile.objs

··· 1 1 - obj-y += riscv_htif.o 2 2 - obj-y += riscv_hart.o 3 3 - obj-y += sifive_e.o 4 4 - obj-y += sifive_clint.o 5 5 - obj-y += sifive_prci.o 6 6 - obj-y += sifive_plic.o 7 7 - obj-y += sifive_test.o 8 8 - obj-y += sifive_u.o 9 9 - obj-y += sifive_uart.o 10 10 - obj-y += spike.o 11 11 - obj-y += virt.o 1 1 + obj-$(CONFIG_SPIKE) += riscv_htif.o 2 2 + obj-$(CONFIG_HART) += riscv_hart.o 3 3 + obj-$(CONFIG_SIFIVE_E) += sifive_e.o 4 4 + obj-$(CONFIG_SIFIVE) += sifive_clint.o 5 5 + obj-$(CONFIG_SIFIVE) += sifive_prci.o 6 6 + obj-$(CONFIG_SIFIVE) += sifive_plic.o 7 7 + obj-$(CONFIG_SIFIVE) += sifive_test.o 8 8 + obj-$(CONFIG_SIFIVE_U) += sifive_u.o 9 9 + obj-$(CONFIG_SIFIVE) += sifive_uart.o 10 10 + obj-$(CONFIG_SPIKE) += spike.o 11 11 + obj-$(CONFIG_RISCV_VIRT) += virt.o

+1 -1

hw/riscv/sifive_e.c

··· 78 78 { 79 79 uint64_t kernel_entry, kernel_high; 80 80 81 81 - if (load_elf(kernel_filename, NULL, NULL, 81 81 + if (load_elf(kernel_filename, NULL, NULL, NULL, 82 82 &kernel_entry, NULL, &kernel_high, 83 83 0, EM_RISCV, 1, 0) < 0) { 84 84 error_report("could not load kernel '%s'", kernel_filename);

+1 -1

hw/riscv/sifive_u.c

··· 69 69 { 70 70 uint64_t kernel_entry, kernel_high; 71 71 72 72 - if (load_elf(kernel_filename, NULL, NULL, 72 72 + if (load_elf(kernel_filename, NULL, NULL, NULL, 73 73 &kernel_entry, NULL, &kernel_high, 74 74 0, EM_RISCV, 1, 0) < 0) { 75 75 error_report("could not load kernel '%s'", kernel_filename);

+1 -1

hw/riscv/spike.c

··· 57 57 { 58 58 uint64_t kernel_entry, kernel_high; 59 59 60 60 - if (load_elf_ram_sym(kernel_filename, NULL, NULL, 60 60 + if (load_elf_ram_sym(kernel_filename, NULL, NULL, NULL, 61 61 &kernel_entry, NULL, &kernel_high, 0, EM_RISCV, 1, 0, 62 62 NULL, true, htif_symbol_callback) < 0) { 63 63 error_report("could not load kernel '%s'", kernel_filename);

+1 -1

hw/riscv/virt.c

··· 66 66 { 67 67 uint64_t kernel_entry, kernel_high; 68 68 69 69 - if (load_elf(kernel_filename, NULL, NULL, 69 69 + if (load_elf(kernel_filename, NULL, NULL, NULL, 70 70 &kernel_entry, NULL, &kernel_high, 71 71 0, EM_RISCV, 1, 0) < 0) { 72 72 error_report("could not load kernel '%s'", kernel_filename);

+1 -1

hw/s390x/Makefile.objs

··· 5 5 obj-y += sclpcpu.o 6 6 obj-y += ipl.o 7 7 obj-y += css.o 8 8 - obj-y += s390-virtio-ccw.o 8 8 + obj-$(CONFIG_S390_CCW_VIRTIO) += s390-virtio-ccw.o 9 9 obj-y += 3270-ccw.o 10 10 obj-y += virtio-ccw.o 11 11 obj-$(CONFIG_VIRTIO_SERIAL) += virtio-ccw-serial.o

+6 -3

hw/s390x/ipl.c

··· 131 131 goto error; 132 132 } 133 133 134 134 - bios_size = load_elf(bios_filename, bios_translate_addr, &fwbase, 134 134 + bios_size = load_elf(bios_filename, NULL, 135 135 + bios_translate_addr, &fwbase, 135 136 &ipl->bios_start_addr, NULL, NULL, 1, 136 137 EM_S390, 0, 0); 137 138 if (bios_size > 0) { ··· 155 156 } 156 157 157 158 if (ipl->kernel) { 158 158 - kernel_size = load_elf(ipl->kernel, NULL, NULL, &pentry, NULL, 159 159 + kernel_size = load_elf(ipl->kernel, NULL, NULL, NULL, 160 160 + &pentry, NULL, 159 161 NULL, 1, EM_S390, 0, 0); 160 162 if (kernel_size < 0) { 161 163 kernel_size = load_image_targphys(ipl->kernel, 0, ram_size); ··· 436 438 goto unref_mr; 437 439 } 438 440 439 439 - img_size = load_elf_ram(netboot_filename, NULL, NULL, &ipl->start_addr, 441 441 + img_size = load_elf_ram(netboot_filename, NULL, NULL, NULL, 442 442 + &ipl->start_addr, 440 443 NULL, NULL, 1, EM_S390, 0, 0, NULL, false); 441 444 442 445 if (img_size < 0) {

+50 -53

hw/scsi/scsi-disk.c

··· 19 19 * the host adapter emulator. 20 20 */ 21 21 22 22 - //#define DEBUG_SCSI 23 23 - 24 24 - #ifdef DEBUG_SCSI 25 25 - #define DPRINTF(fmt, ...) \ 26 26 - do { printf("scsi-disk: " fmt , ## __VA_ARGS__); } while (0) 27 27 - #else 28 28 - #define DPRINTF(fmt, ...) do {} while(0) 29 29 - #endif 30 30 - 31 22 #include "qemu/osdep.h" 32 23 #include "qemu/units.h" 33 24 #include "qapi/error.h" ··· 41 32 #include "hw/block/block.h" 42 33 #include "sysemu/dma.h" 43 34 #include "qemu/cutils.h" 35 35 + #include "trace.h" 44 36 45 37 #ifdef __linux 46 38 #include <scsi/sg.h> ··· 129 121 /* Helper function for command completion with sense. */ 130 122 static void scsi_check_condition(SCSIDiskReq *r, SCSISense sense) 131 123 { 132 132 - DPRINTF("Command complete tag=0x%x sense=%d/%d/%d\n", 133 133 - r->req.tag, sense.key, sense.asc, sense.ascq); 124 124 + trace_scsi_disk_check_condition(r->req.tag, sense.key, sense.asc, 125 125 + sense.ascq); 134 126 scsi_req_build_sense(&r->req, sense); 135 127 scsi_req_complete(&r->req, CHECK_CONDITION); 136 128 } ··· 318 310 } 319 311 320 312 block_acct_done(blk_get_stats(s->qdev.conf.blk), &r->acct); 321 321 - DPRINTF("Data ready tag=0x%x len=%zd\n", r->req.tag, r->qiov.size); 313 313 + trace_scsi_disk_read_complete(r->req.tag, r->qiov.size); 322 314 323 315 n = r->qiov.size / 512; 324 316 r->sector += n; ··· 389 381 SCSIDiskState *s = DO_UPCAST(SCSIDiskState, qdev, r->req.dev); 390 382 bool first; 391 383 392 392 - DPRINTF("Read sector_count=%d\n", r->sector_count); 384 384 + trace_scsi_disk_read_data_count(r->sector_count); 393 385 if (r->sector_count == 0) { 394 386 /* This also clears the sense buffer for REQUEST SENSE. */ 395 387 scsi_req_complete(&r->req, GOOD); ··· 402 394 /* The request is used as the AIO opaque value, so add a ref. */ 403 395 scsi_req_ref(&r->req); 404 396 if (r->req.cmd.mode == SCSI_XFER_TO_DEV) { 405 405 - DPRINTF("Data transfer direction invalid\n"); 397 397 + trace_scsi_disk_read_data_invalid(); 406 398 scsi_read_complete(r, -EINVAL); 407 399 return; 408 400 } ··· 503 495 return; 504 496 } else { 505 497 scsi_init_iovec(r, SCSI_DMA_BUF_SIZE); 506 506 - DPRINTF("Write complete tag=0x%x more=%zd\n", r->req.tag, r->qiov.size); 498 498 + trace_scsi_disk_write_complete_noio(r->req.tag, r->qiov.size); 507 499 scsi_req_data(&r->req, r->qiov.size); 508 500 } 509 501 ··· 541 533 /* The request is used as the AIO opaque value, so add a ref. */ 542 534 scsi_req_ref(&r->req); 543 535 if (r->req.cmd.mode != SCSI_XFER_TO_DEV) { 544 544 - DPRINTF("Data transfer direction invalid\n"); 536 536 + trace_scsi_disk_write_data_invalid(); 545 537 scsi_write_complete_noio(r, -EINVAL); 546 538 return; 547 539 } ··· 606 598 switch (page_code) { 607 599 case 0x00: /* Supported page codes, mandatory */ 608 600 { 609 609 - DPRINTF("Inquiry EVPD[Supported pages] " 610 610 - "buffer size %zd\n", req->cmd.xfer); 601 601 + trace_scsi_disk_emulate_vpd_page_00(req->cmd.xfer); 611 602 outbuf[buflen++] = 0x00; /* list of supported pages (this page) */ 612 603 if (s->serial) { 613 604 outbuf[buflen++] = 0x80; /* unit serial number */ ··· 625 616 int l; 626 617 627 618 if (!s->serial) { 628 628 - DPRINTF("Inquiry (EVPD[Serial number] not supported\n"); 619 619 + trace_scsi_disk_emulate_vpd_page_80_not_supported(); 629 620 return -1; 630 621 } 631 622 ··· 634 625 l = 36; 635 626 } 636 627 637 637 - DPRINTF("Inquiry EVPD[Serial number] " 638 638 - "buffer size %zd\n", req->cmd.xfer); 628 628 + trace_scsi_disk_emulate_vpd_page_80(req->cmd.xfer); 639 629 memcpy(outbuf + buflen, s->serial, l); 640 630 buflen += l; 641 631 break; ··· 645 635 { 646 636 int id_len = s->device_id ? MIN(strlen(s->device_id), 255 - 8) : 0; 647 637 648 648 - DPRINTF("Inquiry EVPD[Device identification] " 649 649 - "buffer size %zd\n", req->cmd.xfer); 638 638 + trace_scsi_disk_emulate_vpd_page_83(req->cmd.xfer); 650 639 651 640 if (id_len) { 652 641 outbuf[buflen++] = 0x2; /* ASCII */ ··· 693 682 SCSIBlockLimits bl = {}; 694 683 695 684 if (s->qdev.type == TYPE_ROM) { 696 696 - DPRINTF("Inquiry (EVPD[%02X] not supported for CDROM\n", 697 697 - page_code); 685 685 + trace_scsi_disk_emulate_vpd_page_b0_not_supported(); 698 686 return -1; 699 687 } 700 688 bl.wsnz = 1; ··· 1241 1229 dbd = (r->req.cmd.buf[1] & 0x8) != 0; 1242 1230 page = r->req.cmd.buf[2] & 0x3f; 1243 1231 page_control = (r->req.cmd.buf[2] & 0xc0) >> 6; 1244 1244 - DPRINTF("Mode Sense(%d) (page %d, xfer %zd, page_control %d)\n", 1245 1245 - (r->req.cmd.buf[0] == MODE_SENSE) ? 6 : 10, page, r->req.cmd.xfer, page_control); 1232 1232 + 1233 1233 + trace_scsi_disk_emulate_mode_sense((r->req.cmd.buf[0] == MODE_SENSE) ? 6 : 1234 1234 + 10, page, r->req.cmd.xfer, page_control); 1246 1235 memset(outbuf, 0, r->req.cmd.xfer); 1247 1236 p = outbuf; 1248 1237 ··· 1334 1323 format = req->cmd.buf[2] & 0xf; 1335 1324 start_track = req->cmd.buf[6]; 1336 1325 blk_get_geometry(s->qdev.conf.blk, &nb_sectors); 1337 1337 - DPRINTF("Read TOC (track %d format %d msf %d)\n", start_track, format, msf >> 1); 1326 1326 + trace_scsi_disk_emulate_read_toc(start_track, format, msf >> 1); 1338 1327 nb_sectors /= s->qdev.blocksize / 512; 1339 1328 switch (format) { 1340 1329 case 0: ··· 1393 1382 int buflen = r->iov.iov_len; 1394 1383 1395 1384 if (buflen) { 1396 1396 - DPRINTF("Read buf_len=%d\n", buflen); 1385 1385 + trace_scsi_disk_emulate_read_data(buflen); 1397 1386 r->iov.iov_len = 0; 1398 1387 r->started = true; 1399 1388 scsi_req_data(&r->req, buflen); ··· 1812 1801 1813 1802 if (r->iov.iov_len) { 1814 1803 int buflen = r->iov.iov_len; 1815 1815 - DPRINTF("Write buf_len=%d\n", buflen); 1804 1804 + trace_scsi_disk_emulate_write_data(buflen); 1816 1805 r->iov.iov_len = 0; 1817 1806 scsi_req_data(&r->req, buflen); 1818 1807 return; ··· 2021 2010 case SERVICE_ACTION_IN_16: 2022 2011 /* Service Action In subcommands. */ 2023 2012 if ((req->cmd.buf[1] & 31) == SAI_READ_CAPACITY_16) { 2024 2024 - DPRINTF("SAI READ CAPACITY(16)\n"); 2013 2013 + trace_scsi_disk_emulate_command_SAI_16(); 2025 2014 memset(outbuf, 0, req->cmd.xfer); 2026 2015 blk_get_geometry(s->qdev.conf.blk, &nb_sectors); 2027 2016 if (!nb_sectors) { ··· 2059 2048 /* Protection, exponent and lowest lba field left blank. */ 2060 2049 break; 2061 2050 } 2062 2062 - DPRINTF("Unsupported Service Action In\n"); 2051 2051 + trace_scsi_disk_emulate_command_SAI_unsupported(); 2063 2052 goto illegal_request; 2064 2053 case SYNCHRONIZE_CACHE: 2065 2054 /* The request is used as the AIO opaque value, so add a ref. */ ··· 2069 2058 r->req.aiocb = blk_aio_flush(s->qdev.conf.blk, scsi_aio_complete, r); 2070 2059 return 0; 2071 2060 case SEEK_10: 2072 2072 - DPRINTF("Seek(10) (sector %" PRId64 ")\n", r->req.cmd.lba); 2061 2061 + trace_scsi_disk_emulate_command_SEEK_10(r->req.cmd.lba); 2073 2062 if (r->req.cmd.lba > s->qdev.max_lba) { 2074 2063 goto illegal_lba; 2075 2064 } 2076 2065 break; 2077 2066 case MODE_SELECT: 2078 2078 - DPRINTF("Mode Select(6) (len %lu)\n", (unsigned long)r->req.cmd.xfer); 2067 2067 + trace_scsi_disk_emulate_command_MODE_SELECT(r->req.cmd.xfer); 2079 2068 break; 2080 2069 case MODE_SELECT_10: 2081 2081 - DPRINTF("Mode Select(10) (len %lu)\n", (unsigned long)r->req.cmd.xfer); 2070 2070 + trace_scsi_disk_emulate_command_MODE_SELECT_10(r->req.cmd.xfer); 2082 2071 break; 2083 2072 case UNMAP: 2084 2084 - DPRINTF("Unmap (len %lu)\n", (unsigned long)r->req.cmd.xfer); 2073 2073 + trace_scsi_disk_emulate_command_UNMAP(r->req.cmd.xfer); 2085 2074 break; 2086 2075 case VERIFY_10: 2087 2076 case VERIFY_12: 2088 2077 case VERIFY_16: 2089 2089 - DPRINTF("Verify (bytchk %d)\n", (req->cmd.buf[1] >> 1) & 3); 2078 2078 + trace_scsi_disk_emulate_command_VERIFY((req->cmd.buf[1] >> 1) & 3); 2090 2079 if (req->cmd.buf[1] & 6) { 2091 2080 goto illegal_request; 2092 2081 } 2093 2082 break; 2094 2083 case WRITE_SAME_10: 2095 2084 case WRITE_SAME_16: 2096 2096 - DPRINTF("WRITE SAME %d (len %lu)\n", 2097 2097 - req->cmd.buf[0] == WRITE_SAME_10 ? 10 : 16, 2098 2098 - (unsigned long)r->req.cmd.xfer); 2085 2085 + trace_scsi_disk_emulate_command_WRITE_SAME( 2086 2086 + req->cmd.buf[0] == WRITE_SAME_10 ? 10 : 16, r->req.cmd.xfer); 2099 2087 break; 2100 2088 default: 2101 2101 - DPRINTF("Unknown SCSI command (%2.2x=%s)\n", buf[0], 2102 2102 - scsi_command_name(buf[0])); 2089 2089 + trace_scsi_disk_emulate_command_UNKNOWN(buf[0], 2090 2090 + scsi_command_name(buf[0])); 2103 2091 scsi_check_condition(r, SENSE_CODE(INVALID_OPCODE)); 2104 2092 return 0; 2105 2093 } ··· 2152 2140 case READ_10: 2153 2141 case READ_12: 2154 2142 case READ_16: 2155 2155 - DPRINTF("Read (sector %" PRId64 ", count %u)\n", r->req.cmd.lba, len); 2143 2143 + trace_scsi_disk_dma_command_READ(r->req.cmd.lba, len); 2156 2144 /* Protection information is not supported. For SCSI versions 2 and 2157 2145 * older (as determined by snooping the guest's INQUIRY commands), 2158 2146 * there is no RD/WR/VRPROTECT, so skip this check in these versions. ··· 2177 2165 scsi_check_condition(r, SENSE_CODE(WRITE_PROTECTED)); 2178 2166 return 0; 2179 2167 } 2180 2180 - DPRINTF("Write %s(sector %" PRId64 ", count %u)\n", 2168 2168 + trace_scsi_disk_dma_command_WRITE( 2181 2169 (command & 0xe) == 0xe ? "And Verify " : "", 2182 2170 r->req.cmd.lba, len); 2183 2171 /* fall through */ ··· 2515 2503 [WRITE_VERIFY_16] = &scsi_disk_dma_reqops, 2516 2504 }; 2517 2505 2506 2506 + static void scsi_disk_new_request_dump(uint32_t lun, uint32_t tag, uint8_t *buf) 2507 2507 + { 2508 2508 + int i; 2509 2509 + int len = scsi_cdb_length(buf); 2510 2510 + char *line_buffer, *p; 2511 2511 + 2512 2512 + line_buffer = g_malloc(len * 5 + 1); 2513 2513 + 2514 2514 + for (i = 0, p = line_buffer; i < len; i++) { 2515 2515 + p += sprintf(p, " 0x%02x", buf[i]); 2516 2516 + } 2517 2517 + trace_scsi_disk_new_request(lun, tag, line_buffer); 2518 2518 + 2519 2519 + g_free(line_buffer); 2520 2520 + } 2521 2521 + 2518 2522 static SCSIRequest *scsi_new_request(SCSIDevice *d, uint32_t tag, uint32_t lun, 2519 2523 uint8_t *buf, void *hba_private) 2520 2524 { ··· 2530 2534 } 2531 2535 req = scsi_req_alloc(ops, &s->qdev, tag, lun, hba_private); 2532 2536 2533 2533 - #ifdef DEBUG_SCSI 2534 2534 - DPRINTF("Command: lun=%d tag=0x%x data=0x%02x", lun, tag, buf[0]); 2535 2535 - { 2536 2536 - int i; 2537 2537 - for (i = 1; i < scsi_cdb_length(buf); i++) { 2538 2538 - printf(" 0x%02x", buf[i]); 2539 2539 - } 2540 2540 - printf("\n"); 2537 2537 + if (trace_event_get_state_backends(TRACE_SCSI_DISK_NEW_REQUEST)) { 2538 2538 + scsi_disk_new_request_dump(lun, tag, buf); 2541 2539 } 2542 2542 - #endif 2543 2540 2544 2541 return req; 2545 2542 }

+36 -38

hw/scsi/scsi-generic.c

··· 18 18 #include "hw/scsi/scsi.h" 19 19 #include "hw/scsi/emulation.h" 20 20 #include "sysemu/block-backend.h" 21 21 + #include "trace.h" 21 22 22 23 #ifdef __linux__ 23 24 24 24 - //#define DEBUG_SCSI 25 25 - 26 26 - #ifdef DEBUG_SCSI 27 27 - #define DPRINTF(fmt, ...) \ 28 28 - do { printf("scsi-generic: " fmt , ## __VA_ARGS__); } while (0) 29 29 - #else 30 30 - #define DPRINTF(fmt, ...) do {} while(0) 31 31 - #endif 32 32 - 33 33 - #define BADF(fmt, ...) \ 34 34 - do { fprintf(stderr, "scsi-generic: " fmt , ## __VA_ARGS__); } while (0) 35 35 - 36 25 #include <scsi/sg.h> 37 26 #include "scsi/constants.h" 38 27 ··· 98 87 } 99 88 } 100 89 101 101 - DPRINTF("Command complete 0x%p tag=0x%x status=%d\n", 102 102 - r, r->req.tag, status); 90 90 + trace_scsi_generic_command_complete_noio(r, r->req.tag, status); 103 91 104 92 scsi_req_complete(&r->req, status); 105 93 done: ··· 182 170 /* Also take care of the opt xfer len. */ 183 171 stl_be_p(&r->buf[12], 184 172 MIN_NON_ZERO(max_transfer, ldl_be_p(&r->buf[12]))); 185 185 - } else if (s->needs_vpd_bl_emulation && page == 0x00) { 173 173 + } else if (s->needs_vpd_bl_emulation && page == 0x00 && r->buflen >= 4) { 186 174 /* 187 175 * Now we're capable of supplying the VPD Block Limits 188 176 * response if the hardware can't. Add it in the INQUIRY ··· 193 181 * and will use it to proper setup the SCSI device. 194 182 * 195 183 * VPD page numbers must be sorted, so insert 0xb0 at the 196 196 - * right place with an in-place insert. After the initialization 197 197 - * part of the for loop is executed, the device response is 198 198 - * at r[0] to r[page_idx - 1]. 184 184 + * right place with an in-place insert. When the while loop 185 185 + * begins the device response is at r[0] to r[page_idx - 1]. 199 186 */ 200 200 - for (page_idx = lduw_be_p(r->buf + 2) + 4; 201 201 - page_idx > 4 && r->buf[page_idx - 1] >= 0xb0; 202 202 - page_idx--) { 187 187 + page_idx = lduw_be_p(r->buf + 2) + 4; 188 188 + page_idx = MIN(page_idx, r->buflen); 189 189 + while (page_idx > 4 && r->buf[page_idx - 1] >= 0xb0) { 203 190 if (page_idx < r->buflen) { 204 191 r->buf[page_idx] = r->buf[page_idx - 1]; 205 192 } 193 193 + page_idx--; 206 194 } 207 207 - r->buf[page_idx] = 0xb0; 195 195 + if (page_idx < r->buflen) { 196 196 + r->buf[page_idx] = 0xb0; 197 197 + } 208 198 stw_be_p(r->buf + 2, lduw_be_p(r->buf + 2) + 1); 209 199 } 210 200 } ··· 259 249 } 260 250 261 251 len = r->io_header.dxfer_len - r->io_header.resid; 262 262 - DPRINTF("Data ready tag=0x%x len=%d\n", r->req.tag, len); 252 252 + trace_scsi_generic_read_complete(r->req.tag, len); 263 253 264 254 r->len = -1; 265 255 ··· 335 325 SCSIDevice *s = r->req.dev; 336 326 int ret; 337 327 338 338 - DPRINTF("scsi_read_data tag=0x%x\n", req->tag); 328 328 + trace_scsi_generic_read_data(req->tag); 339 329 340 330 /* The request is used as the AIO opaque value, so add a ref. */ 341 331 scsi_req_ref(&r->req); ··· 356 346 SCSIGenericReq *r = (SCSIGenericReq *)opaque; 357 347 SCSIDevice *s = r->req.dev; 358 348 359 359 - DPRINTF("scsi_write_complete() ret = %d\n", ret); 349 349 + trace_scsi_generic_write_complete(ret); 360 350 361 351 assert(r->req.aiocb != NULL); 362 352 r->req.aiocb = NULL; ··· 371 361 if (r->req.cmd.buf[0] == MODE_SELECT && r->req.cmd.buf[4] == 12 && 372 362 s->type == TYPE_TAPE) { 373 363 s->blocksize = (r->buf[9] << 16) | (r->buf[10] << 8) | r->buf[11]; 374 374 - DPRINTF("block size %d\n", s->blocksize); 364 364 + trace_scsi_generic_write_complete_blocksize(s->blocksize); 375 365 } 376 366 377 367 scsi_command_complete_noio(r, ret); ··· 388 378 SCSIDevice *s = r->req.dev; 389 379 int ret; 390 380 391 391 - DPRINTF("scsi_write_data tag=0x%x\n", req->tag); 381 381 + trace_scsi_generic_write_data(req->tag); 392 382 if (r->len == 0) { 393 383 r->len = r->buflen; 394 384 scsi_req_data(&r->req, r->len); ··· 411 401 return r->buf; 412 402 } 413 403 404 404 + static void scsi_generic_command_dump(uint8_t *cmd, int len) 405 405 + { 406 406 + int i; 407 407 + char *line_buffer, *p; 408 408 + 409 409 + line_buffer = g_malloc(len * 5 + 1); 410 410 + 411 411 + for (i = 0, p = line_buffer; i < len; i++) { 412 412 + p += sprintf(p, " 0x%02x", cmd[i]); 413 413 + } 414 414 + trace_scsi_generic_send_command(line_buffer); 415 415 + 416 416 + g_free(line_buffer); 417 417 + } 418 418 + 414 419 /* Execute a scsi command. Returns the length of the data expected by the 415 420 command. This will be Positive for data transfers from the device 416 421 (eg. disk reads), negative for transfers to the device (eg. disk writes), ··· 422 427 SCSIDevice *s = r->req.dev; 423 428 int ret; 424 429 425 425 - #ifdef DEBUG_SCSI 426 426 - DPRINTF("Command: data=0x%02x", cmd[0]); 427 427 - { 428 428 - int i; 429 429 - for (i = 1; i < r->req.cmd.len; i++) { 430 430 - printf(" 0x%02x", cmd[i]); 431 431 - } 432 432 - printf("\n"); 430 430 + if (trace_event_get_state_backends(TRACE_SCSI_GENERIC_SEND_COMMAND)) { 431 431 + scsi_generic_command_dump(cmd, r->req.cmd.len); 433 432 } 434 434 - #endif 435 433 436 434 if (r->req.cmd.xfer == 0) { 437 435 g_free(r->buf); ··· 693 691 694 692 /* define device state */ 695 693 s->type = scsiid.scsi_type; 696 696 - DPRINTF("device type %d\n", s->type); 694 694 + trace_scsi_generic_realize_type(s->type); 697 695 698 696 switch (s->type) { 699 697 case TYPE_TAPE: ··· 716 714 break; 717 715 } 718 716 719 719 - DPRINTF("block size %d\n", s->blocksize); 717 717 + trace_scsi_generic_realize_blocksize(s->blocksize); 720 718 721 719 /* Only used by scsi-block, but initialize it nevertheless to be clean. */ 722 720 s->default_scsi_version = -1;

+40

hw/scsi/trace-events

··· 292 292 lsi_awoken(void) "Woken by SIGP" 293 293 lsi_reg_read(const char *name, int offset, uint8_t ret) "Read reg %s 0x%x = 0x%02x" 294 294 lsi_reg_write(const char *name, int offset, uint8_t val) "Write reg %s 0x%x = 0x%02x" 295 295 + 296 296 + # hw/scsi/scsi-disk.c 297 297 + scsi_disk_check_condition(uint32_t tag, uint8_t key, uint8_t asc, uint8_t ascq) "Command complete tag=0x%x sense=%d/%d/%d" 298 298 + scsi_disk_read_complete(uint32_t tag, size_t size) "Data ready tag=0x%x len=%zd" 299 299 + scsi_disk_read_data_count(uint32_t sector_count) "Read sector_count=%d" 300 300 + scsi_disk_read_data_invalid(void) "Data transfer direction invalid" 301 301 + scsi_disk_write_complete_noio(uint32_t tag, size_t size) "Write complete tag=0x%x more=%zd" 302 302 + scsi_disk_write_data_invalid(void) "Data transfer direction invalid" 303 303 + scsi_disk_emulate_vpd_page_00(size_t xfer) "Inquiry EVPD[Supported pages] buffer size %zd" 304 304 + scsi_disk_emulate_vpd_page_80_not_supported(void) "Inquiry (EVPD[Serial number] not supported" 305 305 + scsi_disk_emulate_vpd_page_80(size_t xfer) "Inquiry EVPD[Serial number] buffer size %zd" 306 306 + scsi_disk_emulate_vpd_page_83(size_t xfer) "Inquiry EVPD[Device identification] buffer size %zd" 307 307 + scsi_disk_emulate_vpd_page_b0_not_supported(void) "Inquiry (EVPD[Block limits] not supported for CDROM" 308 308 + scsi_disk_emulate_mode_sense(int cmd, int page, size_t xfer, int control) "Mode Sense(%d) (page %d, xfer %zd, page_control %d)" 309 309 + scsi_disk_emulate_read_toc(int start_track, int format, int msf) "Read TOC (track %d format %d msf %d)" 310 310 + scsi_disk_emulate_read_data(int buflen) "Read buf_len=%d" 311 311 + scsi_disk_emulate_write_data(int buflen) "Write buf_len=%d" 312 312 + scsi_disk_emulate_command_SAI_16(void) "SAI READ CAPACITY(16)" 313 313 + scsi_disk_emulate_command_SAI_unsupported(void) "Unsupported Service Action In" 314 314 + scsi_disk_emulate_command_SEEK_10(uint64_t lba) "Seek(10) (sector %" PRId64 ")" 315 315 + scsi_disk_emulate_command_MODE_SELECT(size_t xfer) "Mode Select(6) (len %zd)" 316 316 + scsi_disk_emulate_command_MODE_SELECT_10(size_t xfer) "Mode Select(10) (len %zd)" 317 317 + scsi_disk_emulate_command_UNMAP(size_t xfer) "Unmap (len %zd)" 318 318 + scsi_disk_emulate_command_VERIFY(int bytchk) "Verify (bytchk %d)" 319 319 + scsi_disk_emulate_command_WRITE_SAME(int cmd, size_t xfer) "WRITE SAME %d (len %zd)" 320 320 + scsi_disk_emulate_command_UNKNOWN(int cmd, const char *name) "Unknown SCSI command (0x%2.2x=%s)" 321 321 + scsi_disk_dma_command_READ(uint64_t lba, uint32_t len) "Read (sector %" PRId64 ", count %u)" 322 322 + scsi_disk_dma_command_WRITE(const char *cmd, uint64_t lba, int len) "Write %s(sector %" PRId64 ", count %u)" 323 323 + scsi_disk_new_request(uint32_t lun, uint32_t tag, const char *line) "Command: lun=%d tag=0x%x data=%s" 324 324 + 325 325 + # hw/scsi/scsi-generic.c 326 326 + scsi_generic_command_complete_noio(void *req, uint32_t tag, int statuc) "Command complete %p tag=0x%x status=%d" 327 327 + scsi_generic_read_complete(uint32_t tag, int len) "Data ready tag=0x%x len=%d" 328 328 + scsi_generic_read_data(uint32_t tag) "scsi_read_data tag=0x%x" 329 329 + scsi_generic_write_complete(int ret) "scsi_write_complete() ret = %d" 330 330 + scsi_generic_write_complete_blocksize(int blocksize) "block size %d" 331 331 + scsi_generic_write_data(uint32_t tag) "scsi_write_data tag=0x%x" 332 332 + scsi_generic_send_command(const char *line) "Command: data=%s" 333 333 + scsi_generic_realize_type(int type) "device type %d" 334 334 + scsi_generic_realize_blocksize(int blocksize) "block size %d"

+2 -2

hw/sh4/Makefile.objs

··· 1 1 - obj-y += shix.o r2d.o 2 2 - 3 1 obj-y += sh7750.o sh7750_regnames.o 4 2 obj-y += sh_pci.o 3 3 + obj-$(CONFIG_R2D) += r2d.o 4 4 + obj-$(CONFIG_SHIX) += shix.o

+3 -1

hw/sparc/Makefile.objs

··· 1 1 - obj-y += sun4m_iommu.o sun4m.o leon3.o 1 1 + obj-$(CONFIG_SUN4M) += sun4m_iommu.o 2 2 + obj-$(CONFIG_SUN4M) += sun4m.o 3 3 + obj-$(CONFIG_LEON3) += leon3.o

+2 -1

hw/sparc/leon3.c

··· 190 190 long kernel_size; 191 191 uint64_t entry; 192 192 193 193 - kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL, 193 193 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 194 194 + &entry, NULL, NULL, 194 195 1 /* big endian */, EM_SPARC, 0, 0); 195 196 if (kernel_size < 0) { 196 197 error_report("could not load kernel '%s'", kernel_filename);

+4 -2

hw/sparc/sun4m.c

··· 242 242 #else 243 243 bswap_needed = 0; 244 244 #endif 245 245 - kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, 245 245 + kernel_size = load_elf(kernel_filename, NULL, 246 246 + translate_kernel_address, NULL, 246 247 NULL, NULL, NULL, 1, EM_SPARC, 0, 0); 247 248 if (kernel_size < 0) 248 249 kernel_size = load_aout(kernel_filename, KERNEL_LOAD_ADDR, ··· 692 693 } 693 694 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 694 695 if (filename) { 695 695 - ret = load_elf(filename, translate_prom_address, &addr, NULL, 696 696 + ret = load_elf(filename, NULL, 697 697 + translate_prom_address, &addr, NULL, 696 698 NULL, NULL, 1, EM_SPARC, 0, 0); 697 699 if (ret < 0 || ret > PROM_SIZE_MAX) { 698 700 ret = load_image_targphys(filename, addr, PROM_SIZE_MAX);

+3 -3

hw/sparc64/Makefile.objs

··· 1 1 obj-y += sparc64.o 2 2 - obj-y += sun4u_iommu.o 3 3 - obj-y += sun4u.o 4 4 - obj-y += niagara.o 2 2 + obj-$(CONFIG_SUN4U) += sun4u_iommu.o 3 3 + obj-$(CONFIG_SUN4U) += sun4u.o 4 4 + obj-$(CONFIG_NIAGARA) += niagara.o

+2 -2

hw/sparc64/sun4u.c

··· 153 153 #else 154 154 bswap_needed = 0; 155 155 #endif 156 156 - kernel_size = load_elf(kernel_filename, NULL, NULL, kernel_entry, 156 156 + kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, kernel_entry, 157 157 kernel_addr, &kernel_top, 1, EM_SPARCV9, 0, 0); 158 158 if (kernel_size < 0) { 159 159 *kernel_addr = KERNEL_LOAD_ADDR; ··· 411 411 } 412 412 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 413 413 if (filename) { 414 414 - ret = load_elf(filename, translate_prom_address, &addr, 414 414 + ret = load_elf(filename, NULL, translate_prom_address, &addr, 415 415 NULL, NULL, NULL, 1, EM_SPARCV9, 0, 0); 416 416 if (ret < 0 || ret > PROM_SIZE_MAX) { 417 417 ret = load_image_targphys(filename, addr, PROM_SIZE_MAX);

+1 -1

hw/tricore/Makefile.objs

··· 1 1 - obj-y += tricore_testboard.o 1 1 + obj-$(CONFIG_TRICORE) += tricore_testboard.o

+1 -1

hw/tricore/tricore_testboard.c

··· 45 45 long kernel_size; 46 46 47 47 kernel_size = load_elf(tricoretb_binfo.kernel_filename, NULL, 48 48 - NULL, &entry, NULL, 48 48 + NULL, NULL, &entry, NULL, 49 49 NULL, 0, 50 50 EM_TRICORE, 1, 0); 51 51 if (kernel_size <= 0) {

+3 -6

hw/vfio/Makefile.objs

··· 1 1 - ifeq ($(CONFIG_LINUX), y) 2 2 - obj-$(CONFIG_SOFTMMU) += common.o 3 3 - obj-$(CONFIG_PCI) += pci.o pci-quirks.o display.o 1 1 + obj-y += common.o spapr.o 2 2 + obj-$(CONFIG_VFIO_PCI) += pci.o pci-quirks.o display.o 4 3 obj-$(CONFIG_VFIO_CCW) += ccw.o 5 5 - obj-$(CONFIG_SOFTMMU) += platform.o 4 4 + obj-$(CONFIG_VFIO_PLATFORM) += platform.o 6 5 obj-$(CONFIG_VFIO_XGMAC) += calxeda-xgmac.o 7 6 obj-$(CONFIG_VFIO_AMD_XGBE) += amd-xgbe.o 8 8 - obj-$(CONFIG_SOFTMMU) += spapr.o 9 7 obj-$(CONFIG_VFIO_AP) += ap.o 10 10 - endif

+2 -2

hw/xtensa/Makefile.objs

··· 1 1 obj-y += mx_pic.o 2 2 obj-y += pic_cpu.o 3 3 - obj-y += sim.o 4 3 obj-y += xtensa_memory.o 5 5 - obj-y += xtfpga.o 4 4 + obj-$(CONFIG_XTENSA_SIM) += sim.o 5 5 + obj-$(CONFIG_XTENSA_FPGA) += xtfpga.o

+8 -4

hw/xtensa/sim.c

··· 97 97 uint64_t elf_entry; 98 98 uint64_t elf_lowaddr; 99 99 #ifdef TARGET_WORDS_BIGENDIAN 100 100 - int success = load_elf(kernel_filename, translate_phys_addr, cpu, 101 101 - &elf_entry, &elf_lowaddr, NULL, 1, EM_XTENSA, 0, 0); 100 100 + int success = load_elf(kernel_filename, NULL, 101 101 + translate_phys_addr, cpu, 102 102 + &elf_entry, &elf_lowaddr, 103 103 + NULL, 1, EM_XTENSA, 0, 0); 102 104 #else 103 103 - int success = load_elf(kernel_filename, translate_phys_addr, cpu, 104 104 - &elf_entry, &elf_lowaddr, NULL, 0, EM_XTENSA, 0, 0); 105 105 + int success = load_elf(kernel_filename, NULL, 106 106 + translate_phys_addr, cpu, 107 107 + &elf_entry, &elf_lowaddr, 108 108 + NULL, 0, EM_XTENSA, 0, 0); 105 109 #endif 106 110 if (success > 0) { 107 111 env->pc = elf_entry;

+1 -1

hw/xtensa/xtfpga.c

··· 409 409 410 410 uint64_t elf_entry; 411 411 uint64_t elf_lowaddr; 412 412 - int success = load_elf(kernel_filename, translate_phys_addr, cpu, 412 412 + int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu, 413 413 &elf_entry, &elf_lowaddr, NULL, be, EM_XTENSA, 0, 0); 414 414 if (success > 0) { 415 415 entry_point = elf_entry;

+10

include/elf.h

··· 1640 1640 #define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */ 1641 1641 #define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */ 1642 1642 1643 1643 + /* 1644 1644 + * Physical entry point into the kernel. 1645 1645 + * 1646 1646 + * 32bit entry point into the kernel. When requested to launch the 1647 1647 + * guest kernel, use this entry point to launch the guest in 32-bit 1648 1648 + * protected mode with paging disabled. 1649 1649 + * 1650 1650 + * [ Corresponding definition in Linux kernel: include/xen/interface/elfnote.h ] 1651 1651 + */ 1652 1652 + #define XEN_ELFNOTE_PHYS32_ENTRY 18 /* 0x12 */ 1643 1653 1644 1654 /* Note header in a PT_NOTE section */ 1645 1655 typedef struct elf32_note {

+1 -1

include/exec/cpu-all.h

··· 367 367 #endif /* !CONFIG_USER_ONLY */ 368 368 369 369 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, 370 370 - uint8_t *buf, int len, int is_write); 370 370 + uint8_t *buf, target_ulong len, int is_write); 371 371 372 372 int cpu_exec(CPUState *cpu); 373 373

+4 -4

include/exec/cpu-common.h

··· 83 83 size_t qemu_ram_pagesize_largest(void); 84 84 85 85 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, 86 86 - int len, int is_write); 86 86 + hwaddr len, int is_write); 87 87 static inline void cpu_physical_memory_read(hwaddr addr, 88 88 - void *buf, int len) 88 88 + void *buf, hwaddr len) 89 89 { 90 90 cpu_physical_memory_rw(addr, buf, len, 0); 91 91 } 92 92 static inline void cpu_physical_memory_write(hwaddr addr, 93 93 - const void *buf, int len) 93 93 + const void *buf, hwaddr len) 94 94 { 95 95 cpu_physical_memory_rw(addr, (void *)buf, len, 1); 96 96 } ··· 111 111 */ 112 112 void qemu_flush_coalesced_mmio_buffer(void); 113 113 114 114 - void cpu_flush_icache_range(hwaddr start, int len); 114 114 + void cpu_flush_icache_range(hwaddr start, hwaddr len); 115 115 116 116 extern struct MemoryRegion io_mem_rom; 117 117 extern struct MemoryRegion io_mem_notdirty;

+11 -11

include/exec/memory.h

··· 1791 1791 */ 1792 1792 MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, 1793 1793 MemTxAttrs attrs, uint8_t *buf, 1794 1794 - int len, bool is_write); 1794 1794 + hwaddr len, bool is_write); 1795 1795 1796 1796 /** 1797 1797 * address_space_write: write to address space. ··· 1808 1808 */ 1809 1809 MemTxResult address_space_write(AddressSpace *as, hwaddr addr, 1810 1810 MemTxAttrs attrs, 1811 1811 - const uint8_t *buf, int len); 1811 1811 + const uint8_t *buf, hwaddr len); 1812 1812 1813 1813 /** 1814 1814 * address_space_write_rom: write to address space, including ROM. ··· 1834 1834 */ 1835 1835 MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, 1836 1836 MemTxAttrs attrs, 1837 1837 - const uint8_t *buf, int len); 1837 1837 + const uint8_t *buf, hwaddr len); 1838 1838 1839 1839 /* address_space_ld*: load from an address space 1840 1840 * address_space_st*: store to an address space ··· 2035 2035 * @is_write: indicates the transfer direction 2036 2036 * @attrs: memory attributes 2037 2037 */ 2038 2038 - bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, 2038 2038 + bool address_space_access_valid(AddressSpace *as, hwaddr addr, hwaddr len, 2039 2039 bool is_write, MemTxAttrs attrs); 2040 2040 2041 2041 /* address_space_map: map a physical memory region into a host virtual address ··· 2072 2072 2073 2073 /* Internal functions, part of the implementation of address_space_read. */ 2074 2074 MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, 2075 2075 - MemTxAttrs attrs, uint8_t *buf, int len); 2075 2075 + MemTxAttrs attrs, uint8_t *buf, hwaddr len); 2076 2076 MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, 2077 2077 MemTxAttrs attrs, uint8_t *buf, 2078 2078 - int len, hwaddr addr1, hwaddr l, 2078 2078 + hwaddr len, hwaddr addr1, hwaddr l, 2079 2079 MemoryRegion *mr); 2080 2080 void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr); 2081 2081 2082 2082 /* Internal functions, part of the implementation of address_space_read_cached 2083 2083 * and address_space_write_cached. */ 2084 2084 void address_space_read_cached_slow(MemoryRegionCache *cache, 2085 2085 - hwaddr addr, void *buf, int len); 2085 2085 + hwaddr addr, void *buf, hwaddr len); 2086 2086 void address_space_write_cached_slow(MemoryRegionCache *cache, 2087 2087 - hwaddr addr, const void *buf, int len); 2087 2087 + hwaddr addr, const void *buf, hwaddr len); 2088 2088 2089 2089 static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) 2090 2090 { ··· 2112 2112 static inline __attribute__((__always_inline__)) 2113 2113 MemTxResult address_space_read(AddressSpace *as, hwaddr addr, 2114 2114 MemTxAttrs attrs, uint8_t *buf, 2115 2115 - int len) 2115 2115 + hwaddr len) 2116 2116 { 2117 2117 MemTxResult result = MEMTX_OK; 2118 2118 hwaddr l, addr1; ··· 2151 2151 */ 2152 2152 static inline void 2153 2153 address_space_read_cached(MemoryRegionCache *cache, hwaddr addr, 2154 2154 - void *buf, int len) 2154 2154 + void *buf, hwaddr len) 2155 2155 { 2156 2156 assert(addr < cache->len && len <= cache->len - addr); 2157 2157 if (likely(cache->ptr)) { ··· 2171 2171 */ 2172 2172 static inline void 2173 2173 address_space_write_cached(MemoryRegionCache *cache, hwaddr addr, 2174 2174 - void *buf, int len) 2174 2174 + void *buf, hwaddr len) 2175 2175 { 2176 2176 assert(addr < cache->len && len <= cache->len - addr); 2177 2177 if (likely(cache->ptr)) {

-1

include/hw/boards.h

··· 180 180 int default_cpus; 181 181 unsigned int no_serial:1, 182 182 no_parallel:1, 183 183 - use_virtcon:1, 184 183 no_floppy:1, 185 184 no_cdrom:1, 186 185 no_sdcard:1,

+77

include/hw/elf_ops.h

··· 265 265 return ret; 266 266 } 267 267 268 268 + /* 269 269 + * Given 'nhdr', a pointer to a range of ELF Notes, search through them 270 270 + * for a note matching type 'elf_note_type' and return a pointer to 271 271 + * the matching ELF note. 272 272 + */ 273 273 + static struct elf_note *glue(get_elf_note_type, SZ)(struct elf_note *nhdr, 274 274 + elf_word note_size, 275 275 + elf_word phdr_align, 276 276 + elf_word elf_note_type) 277 277 + { 278 278 + elf_word nhdr_size = sizeof(struct elf_note); 279 279 + elf_word elf_note_entry_offset = 0; 280 280 + elf_word note_type; 281 281 + elf_word nhdr_namesz; 282 282 + elf_word nhdr_descsz; 283 283 + 284 284 + if (nhdr == NULL) { 285 285 + return NULL; 286 286 + } 287 287 + 288 288 + note_type = nhdr->n_type; 289 289 + while (note_type != elf_note_type) { 290 290 + nhdr_namesz = nhdr->n_namesz; 291 291 + nhdr_descsz = nhdr->n_descsz; 292 292 + 293 293 + elf_note_entry_offset = nhdr_size + 294 294 + QEMU_ALIGN_UP(nhdr_namesz, phdr_align) + 295 295 + QEMU_ALIGN_UP(nhdr_descsz, phdr_align); 296 296 + 297 297 + /* 298 298 + * If the offset calculated in this iteration exceeds the 299 299 + * supplied size, we are done and no matching note was found. 300 300 + */ 301 301 + if (elf_note_entry_offset > note_size) { 302 302 + return NULL; 303 303 + } 304 304 + 305 305 + /* skip to the next ELF Note entry */ 306 306 + nhdr = (void *)nhdr + elf_note_entry_offset; 307 307 + note_type = nhdr->n_type; 308 308 + } 309 309 + 310 310 + return nhdr; 311 311 + } 312 312 + 268 313 static int glue(load_elf, SZ)(const char *name, int fd, 314 314 + uint64_t (*elf_note_fn)(void *, void *, bool), 269 315 uint64_t (*translate_fn)(void *, uint64_t), 270 316 void *translate_opaque, 271 317 int must_swab, uint64_t *pentry, ··· 496 542 high = addr + mem_size; 497 543 498 544 data = NULL; 545 545 + 546 546 + } else if (ph->p_type == PT_NOTE && elf_note_fn) { 547 547 + struct elf_note *nhdr = NULL; 548 548 + 549 549 + file_size = ph->p_filesz; /* Size of the range of ELF notes */ 550 550 + data = g_malloc0(file_size); 551 551 + if (ph->p_filesz > 0) { 552 552 + if (lseek(fd, ph->p_offset, SEEK_SET) < 0) { 553 553 + goto fail; 554 554 + } 555 555 + if (read(fd, data, file_size) != file_size) { 556 556 + goto fail; 557 557 + } 558 558 + } 559 559 + 560 560 + /* 561 561 + * Search the ELF notes to find one with a type matching the 562 562 + * value passed in via 'translate_opaque' 563 563 + */ 564 564 + nhdr = (struct elf_note *)data; 565 565 + assert(translate_opaque != NULL); 566 566 + nhdr = glue(get_elf_note_type, SZ)(nhdr, file_size, ph->p_align, 567 567 + *(uint64_t *)translate_opaque); 568 568 + if (nhdr != NULL) { 569 569 + bool is64 = 570 570 + sizeof(struct elf_note) == sizeof(struct elf64_note); 571 571 + elf_note_fn((void *)nhdr, (void *)&ph->p_align, is64); 572 572 + } 573 573 + g_free(data); 574 574 + data = NULL; 499 575 } 500 576 } 577 577 + 501 578 g_free(phdr); 502 579 if (lowaddr) 503 580 *lowaddr = (uint64_t)(elf_sword)low;

+3

include/hw/i386/pc.h

··· 133 133 134 134 /* use DMA capable linuxboot option rom */ 135 135 bool linuxboot_dma_enabled; 136 136 + 137 137 + /* use PVH to load kernels that support this feature */ 138 138 + bool pvh_enabled; 136 139 } PCMachineClass; 137 140 138 141 #define TYPE_PC_MACHINE "generic-pc-machine"

+8 -1

include/hw/loader.h

··· 93 93 94 94 /** load_elf_ram_sym: 95 95 * @filename: Path of ELF file 96 96 + * @elf_note_fn: optional function to parse ELF Note type 97 97 + * passed via @translate_opaque 96 98 * @translate_fn: optional function to translate load addresses 97 99 * @translate_opaque: opaque data passed to @translate_fn 98 100 * @pentry: Populated with program entry point. Ignored if NULL. ··· 125 127 uint64_t st_value, uint64_t st_size); 126 128 127 129 int load_elf_ram_sym(const char *filename, 130 130 + uint64_t (*elf_note_fn)(void *, void *, bool), 128 131 uint64_t (*translate_fn)(void *, uint64_t), 129 132 void *translate_opaque, uint64_t *pentry, 130 133 uint64_t *lowaddr, uint64_t *highaddr, int big_endian, ··· 136 139 * symbol callback function 137 140 */ 138 141 int load_elf_ram(const char *filename, 142 142 + uint64_t (*elf_note_fn)(void *, void *, bool), 139 143 uint64_t (*translate_fn)(void *, uint64_t), 140 144 void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, 141 145 uint64_t *highaddr, int big_endian, int elf_machine, ··· 146 150 * Same as load_elf_ram(), but always loads the elf as ROM 147 151 */ 148 152 int load_elf_as(const char *filename, 153 153 + uint64_t (*elf_note_fn)(void *, void *, bool), 149 154 uint64_t (*translate_fn)(void *, uint64_t), 150 155 void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, 151 156 uint64_t *highaddr, int big_endian, int elf_machine, ··· 155 160 * Same as load_elf_as(), but doesn't allow the caller to specify an 156 161 * AddressSpace. 157 162 */ 158 158 - int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t), 163 163 + int load_elf(const char *filename, 164 164 + uint64_t (*elf_note_fn)(void *, void *, bool), 165 165 + uint64_t (*translate_fn)(void *, uint64_t), 159 166 void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, 160 167 uint64_t *highaddr, int big_endian, int elf_machine, 161 168 int clear_lsb, int data_swab);

+146

include/hw/xen/start_info.h

··· 1 1 + /* 2 2 + * Permission is hereby granted, free of charge, to any person obtaining a copy 3 3 + * of this software and associated documentation files (the "Software"), to 4 4 + * deal in the Software without restriction, including without limitation the 5 5 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 6 6 + * sell copies of the Software, and to permit persons to whom the Software is 7 7 + * furnished to do so, subject to the following conditions: 8 8 + * 9 9 + * The above copyright notice and this permission notice shall be included in 10 10 + * all copies or substantial portions of the Software. 11 11 + * 12 12 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 13 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 14 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 15 15 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 16 16 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 17 17 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 18 18 + * DEALINGS IN THE SOFTWARE. 19 19 + * 20 20 + * Copyright (c) 2016, Citrix Systems, Inc. 21 21 + */ 22 22 + 23 23 + #ifndef __XEN_PUBLIC_ARCH_X86_HVM_START_INFO_H__ 24 24 + #define __XEN_PUBLIC_ARCH_X86_HVM_START_INFO_H__ 25 25 + 26 26 + /* 27 27 + * Start of day structure passed to PVH guests and to HVM guests in %ebx. 28 28 + * 29 29 + * NOTE: nothing will be loaded at physical address 0, so a 0 value in any 30 30 + * of the address fields should be treated as not present. 31 31 + * 32 32 + * 0 +----------------+ 33 33 + * | magic | Contains the magic value XEN_HVM_START_MAGIC_VALUE 34 34 + * | | ("xEn3" with the 0x80 bit of the "E" set). 35 35 + * 4 +----------------+ 36 36 + * | version | Version of this structure. Current version is 1. New 37 37 + * | | versions are guaranteed to be backwards-compatible. 38 38 + * 8 +----------------+ 39 39 + * | flags | SIF_xxx flags. 40 40 + * 12 +----------------+ 41 41 + * | nr_modules | Number of modules passed to the kernel. 42 42 + * 16 +----------------+ 43 43 + * | modlist_paddr | Physical address of an array of modules 44 44 + * | | (layout of the structure below). 45 45 + * 24 +----------------+ 46 46 + * | cmdline_paddr | Physical address of the command line, 47 47 + * | | a zero-terminated ASCII string. 48 48 + * 32 +----------------+ 49 49 + * | rsdp_paddr | Physical address of the RSDP ACPI data structure. 50 50 + * 40 +----------------+ 51 51 + * | memmap_paddr | Physical address of the (optional) memory map. Only 52 52 + * | | present in version 1 and newer of the structure. 53 53 + * 48 +----------------+ 54 54 + * | memmap_entries | Number of entries in the memory map table. Only 55 55 + * | | present in version 1 and newer of the structure. 56 56 + * | | Zero if there is no memory map being provided. 57 57 + * 52 +----------------+ 58 58 + * | reserved | Version 1 and newer only. 59 59 + * 56 +----------------+ 60 60 + * 61 61 + * The layout of each entry in the module structure is the following: 62 62 + * 63 63 + * 0 +----------------+ 64 64 + * | paddr | Physical address of the module. 65 65 + * 8 +----------------+ 66 66 + * | size | Size of the module in bytes. 67 67 + * 16 +----------------+ 68 68 + * | cmdline_paddr | Physical address of the command line, 69 69 + * | | a zero-terminated ASCII string. 70 70 + * 24 +----------------+ 71 71 + * | reserved | 72 72 + * 32 +----------------+ 73 73 + * 74 74 + * The layout of each entry in the memory map table is as follows: 75 75 + * 76 76 + * 0 +----------------+ 77 77 + * | addr | Base address 78 78 + * 8 +----------------+ 79 79 + * | size | Size of mapping in bytes 80 80 + * 16 +----------------+ 81 81 + * | type | Type of mapping as defined between the hypervisor 82 82 + * | | and guest it's starting. E820_TYPE_xxx, for example. 83 83 + * 20 +----------------| 84 84 + * | reserved | 85 85 + * 24 +----------------+ 86 86 + * 87 87 + * The address and sizes are always a 64bit little endian unsigned integer. 88 88 + * 89 89 + * NB: Xen on x86 will always try to place all the data below the 4GiB 90 90 + * boundary. 91 91 + * 92 92 + * Version numbers of the hvm_start_info structure have evolved like this: 93 93 + * 94 94 + * Version 0: 95 95 + * 96 96 + * Version 1: Added the memmap_paddr/memmap_entries fields (plus 4 bytes of 97 97 + * padding) to the end of the hvm_start_info struct. These new 98 98 + * fields can be used to pass a memory map to the guest. The 99 99 + * memory map is optional and so guests that understand version 1 100 100 + * of the structure must check that memmap_entries is non-zero 101 101 + * before trying to read the memory map. 102 102 + */ 103 103 + #define XEN_HVM_START_MAGIC_VALUE 0x336ec578 104 104 + 105 105 + /* 106 106 + * C representation of the x86/HVM start info layout. 107 107 + * 108 108 + * The canonical definition of this layout is above, this is just a way to 109 109 + * represent the layout described there using C types. 110 110 + */ 111 111 + struct hvm_start_info { 112 112 + uint32_t magic; /* Contains the magic value 0x336ec578 */ 113 113 + /* ("xEn3" with the 0x80 bit of the "E" set).*/ 114 114 + uint32_t version; /* Version of this structure. */ 115 115 + uint32_t flags; /* SIF_xxx flags. */ 116 116 + uint32_t nr_modules; /* Number of modules passed to the kernel. */ 117 117 + uint64_t modlist_paddr; /* Physical address of an array of */ 118 118 + /* hvm_modlist_entry. */ 119 119 + uint64_t cmdline_paddr; /* Physical address of the command line. */ 120 120 + uint64_t rsdp_paddr; /* Physical address of the RSDP ACPI data */ 121 121 + /* structure. */ 122 122 + uint64_t memmap_paddr; /* Physical address of an array of */ 123 123 + /* hvm_memmap_table_entry. Only present in */ 124 124 + /* version 1 and newer of the structure */ 125 125 + uint32_t memmap_entries; /* Number of entries in the memmap table. */ 126 126 + /* Only present in version 1 and newer of */ 127 127 + /* the structure. Value will be zero if */ 128 128 + /* there is no memory map being provided. */ 129 129 + uint32_t reserved; 130 130 + }; 131 131 + 132 132 + struct hvm_modlist_entry { 133 133 + uint64_t paddr; /* Physical address of the module. */ 134 134 + uint64_t size; /* Size of the module in bytes. */ 135 135 + uint64_t cmdline_paddr; /* Physical address of the command line. */ 136 136 + uint64_t reserved; 137 137 + }; 138 138 + 139 139 + struct hvm_memmap_table_entry { 140 140 + uint64_t addr; /* Base address of the memory region */ 141 141 + uint64_t size; /* Size of the memory region in bytes */ 142 142 + uint32_t type; /* Mapping type */ 143 143 + uint32_t reserved; 144 144 + }; 145 145 + 146 146 + #endif /* __XEN_PUBLIC_ARCH_X86_HVM_START_INFO_H__ */

+1 -1

include/qemu/queue.h

··· 439 439 440 440 #define QTAILQ_FOREACH_REVERSE_SAFE(var, head, field, prev_var) \ 441 441 for ((var) = QTAILQ_LAST(head); \ 442 442 - (var) && ((prev_var) = QTAILQ_PREV(var, field)); \ 442 442 + (var) && ((prev_var) = QTAILQ_PREV(var, field), 1); \ 443 443 (var) = (prev_var)) 444 444 445 445 /*

+34

include/standard-headers/asm-x86/bootparam.h

··· 1 1 + /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 2 + #ifndef _ASM_X86_BOOTPARAM_H 3 3 + #define _ASM_X86_BOOTPARAM_H 4 4 + 5 5 + /* setup_data types */ 6 6 + #define SETUP_NONE 0 7 7 + #define SETUP_E820_EXT 1 8 8 + #define SETUP_DTB 2 9 9 + #define SETUP_PCI 3 10 10 + #define SETUP_EFI 4 11 11 + #define SETUP_APPLE_PROPERTIES 5 12 12 + #define SETUP_JAILHOUSE 6 13 13 + 14 14 + /* ram_size flags */ 15 15 + #define RAMDISK_IMAGE_START_MASK 0x07FF 16 16 + #define RAMDISK_PROMPT_FLAG 0x8000 17 17 + #define RAMDISK_LOAD_FLAG 0x4000 18 18 + 19 19 + /* loadflags */ 20 20 + #define LOADED_HIGH (1<<0) 21 21 + #define KASLR_FLAG (1<<1) 22 22 + #define QUIET_FLAG (1<<5) 23 23 + #define KEEP_SEGMENTS (1<<6) 24 24 + #define CAN_USE_HEAP (1<<7) 25 25 + 26 26 + /* xloadflags */ 27 27 + #define XLF_KERNEL_64 (1<<0) 28 28 + #define XLF_CAN_BE_LOADED_ABOVE_4G (1<<1) 29 29 + #define XLF_EFI_HANDOVER_32 (1<<2) 30 30 + #define XLF_EFI_HANDOVER_64 (1<<3) 31 31 + #define XLF_EFI_KEXEC (1<<4) 32 32 + 33 33 + 34 34 + #endif /* _ASM_X86_BOOTPARAM_H */

+2 -3

monitor.c

··· 4617 4617 4618 4618 void monitor_cleanup(void) 4619 4619 { 4620 4620 - Monitor *mon, *next; 4621 4621 - 4622 4620 /* 4623 4621 * We need to explicitly stop the I/O thread (but not destroy it), 4624 4622 * clean up the monitor resources, then destroy the I/O thread since ··· 4632 4630 /* Flush output buffers and destroy monitors */ 4633 4631 qemu_mutex_lock(&monitor_lock); 4634 4632 monitor_destroyed = true; 4635 4635 - QTAILQ_FOREACH_SAFE(mon, &mon_list, entry, next) { 4633 4633 + while (!QTAILQ_EMPTY(&mon_list)) { 4634 4634 + Monitor *mon = QTAILQ_FIRST(&mon_list); 4636 4635 QTAILQ_REMOVE(&mon_list, mon, entry); 4637 4636 /* Permit QAPI event emission from character frontend release */ 4638 4637 qemu_mutex_unlock(&monitor_lock);

+4 -1

pc-bios/optionrom/Makefile

··· 37 37 ASFLAGS += -32 38 38 QEMU_CFLAGS += $(call cc-c-option, $(QEMU_CFLAGS), $(Wa)-32) 39 39 40 40 - build-all: multiboot.bin linuxboot.bin linuxboot_dma.bin kvmvapic.bin 40 40 + build-all: multiboot.bin linuxboot.bin linuxboot_dma.bin kvmvapic.bin pvh.bin 41 41 42 42 # suppress auto-removal of intermediate files 43 43 .SECONDARY: ··· 45 45 46 46 %.o: %.S 47 47 $(call quiet-command,$(CPP) $(QEMU_INCLUDES) $(QEMU_DGFLAGS) -c -o - $< | $(AS) $(ASFLAGS) -o $@,"AS","$(TARGET_DIR)$@") 48 48 + 49 49 + pvh.img: pvh.o pvh_main.o 50 50 + $(call quiet-command,$(LD) $(LDFLAGS_NOPIE) -m $(LD_I386_EMULATION) -T $(SRC_PATH)/pc-bios/optionrom/flat.lds -s -o $@ $^,"BUILD","$(TARGET_DIR)$@") 48 51 49 52 %.img: %.o 50 53 $(call quiet-command,$(LD) $(LDFLAGS_NOPIE) -m $(LD_I386_EMULATION) -T $(SRC_PATH)/pc-bios/optionrom/flat.lds -s -o $@ $<,"BUILD","$(TARGET_DIR)$@")

+19 -95

pc-bios/optionrom/linuxboot_dma.c

··· 58 58 " jmp load_kernel\n" 59 59 ); 60 60 61 61 - /* QEMU_CFG_DMA_CONTROL bits */ 62 62 - #define BIOS_CFG_DMA_CTL_ERROR 0x01 63 63 - #define BIOS_CFG_DMA_CTL_READ 0x02 64 64 - #define BIOS_CFG_DMA_CTL_SKIP 0x04 65 65 - #define BIOS_CFG_DMA_CTL_SELECT 0x08 66 66 - 67 67 - #define BIOS_CFG_DMA_ADDR_HIGH 0x514 68 68 - #define BIOS_CFG_DMA_ADDR_LOW 0x518 69 69 - 70 70 - #define uint64_t unsigned long long 71 71 - #define uint32_t unsigned int 72 72 - #define uint16_t unsigned short 73 73 - 74 74 - #include "../../include/standard-headers/linux/qemu_fw_cfg.h" 75 75 - 76 76 - #define barrier() asm("" : : : "memory") 77 77 - 78 78 - typedef struct FWCfgDmaAccess { 79 79 - uint32_t control; 80 80 - uint32_t length; 81 81 - uint64_t address; 82 82 - } __attribute__((packed)) FWCfgDmaAccess; 83 83 - 84 84 - static inline void outl(uint32_t value, uint16_t port) 85 85 - { 86 86 - asm("outl %0, %w1" : : "a"(value), "Nd"(port)); 87 87 - } 61 61 + /* 62 62 + * The includes of C headers must be after the asm block to avoid compiler 63 63 + * errors. 64 64 + */ 65 65 + #include <stdint.h> 66 66 + #include "optrom.h" 67 67 + #include "optrom_fw_cfg.h" 88 68 89 69 static inline void set_es(void *addr) 90 70 { 91 71 uint32_t seg = (uint32_t)addr >> 4; 92 72 asm("movl %0, %%es" : : "r"(seg)); 93 73 } 94 94 - 95 95 - #ifdef __clang__ 96 96 - #define ADDR32 97 97 - #else 98 98 - #define ADDR32 "addr32 " 99 99 - #endif 100 74 101 75 static inline uint16_t readw_es(uint16_t offset) 102 76 { ··· 120 94 asm(ADDR32 "movl %0, %%es:(%1)" : : "r"(val), "r"((uint32_t)offset)); 121 95 } 122 96 123 123 - static inline uint32_t bswap32(uint32_t x) 124 124 - { 125 125 - asm("bswapl %0" : "=r" (x) : "0" (x)); 126 126 - return x; 127 127 - } 128 128 - 129 129 - static inline uint64_t bswap64(uint64_t x) 130 130 - { 131 131 - asm("bswapl %%eax; bswapl %%edx; xchg %%eax, %%edx" : "=A" (x) : "0" (x)); 132 132 - return x; 133 133 - } 134 134 - 135 135 - static inline uint64_t cpu_to_be64(uint64_t x) 136 136 - { 137 137 - return bswap64(x); 138 138 - } 139 139 - 140 140 - static inline uint32_t cpu_to_be32(uint32_t x) 141 141 - { 142 142 - return bswap32(x); 143 143 - } 144 144 - 145 145 - static inline uint32_t be32_to_cpu(uint32_t x) 146 146 - { 147 147 - return bswap32(x); 148 148 - } 149 149 - 150 150 - /* clang is happy to inline this function, and bloats the 151 151 - * ROM. 152 152 - */ 153 153 - static __attribute__((__noinline__)) 154 154 - void bios_cfg_read_entry(void *buf, uint16_t entry, uint32_t len) 155 155 - { 156 156 - FWCfgDmaAccess access; 157 157 - uint32_t control = (entry << 16) | BIOS_CFG_DMA_CTL_SELECT 158 158 - | BIOS_CFG_DMA_CTL_READ; 159 159 - 160 160 - access.address = cpu_to_be64((uint64_t)(uint32_t)buf); 161 161 - access.length = cpu_to_be32(len); 162 162 - access.control = cpu_to_be32(control); 163 163 - 164 164 - barrier(); 165 165 - 166 166 - outl(cpu_to_be32((uint32_t)&access), BIOS_CFG_DMA_ADDR_LOW); 167 167 - 168 168 - while (be32_to_cpu(access.control) & ~BIOS_CFG_DMA_CTL_ERROR) { 169 169 - barrier(); 170 170 - } 171 171 - } 172 172 - 173 97 /* Return top of memory using BIOS function E801. */ 174 98 static uint32_t get_e801_addr(void) 175 99 { ··· 223 147 uint32_t initrd_end_page, max_allowed_page; 224 148 uint32_t segment_addr, stack_addr; 225 149 226 226 - bios_cfg_read_entry(&setup_addr, FW_CFG_SETUP_ADDR, 4); 227 227 - bios_cfg_read_entry(&setup_size, FW_CFG_SETUP_SIZE, 4); 228 228 - bios_cfg_read_entry(setup_addr, FW_CFG_SETUP_DATA, setup_size); 150 150 + bios_cfg_read_entry_dma(&setup_addr, FW_CFG_SETUP_ADDR, 4); 151 151 + bios_cfg_read_entry_dma(&setup_size, FW_CFG_SETUP_SIZE, 4); 152 152 + bios_cfg_read_entry_dma(setup_addr, FW_CFG_SETUP_DATA, setup_size); 229 153 230 154 set_es(setup_addr); 231 155 ··· 235 159 writel_es(0x22c, 0x37ffffff); 236 160 } 237 161 238 238 - bios_cfg_read_entry(&initrd_addr, FW_CFG_INITRD_ADDR, 4); 239 239 - bios_cfg_read_entry(&initrd_size, FW_CFG_INITRD_SIZE, 4); 162 162 + bios_cfg_read_entry_dma(&initrd_addr, FW_CFG_INITRD_ADDR, 4); 163 163 + bios_cfg_read_entry_dma(&initrd_size, FW_CFG_INITRD_SIZE, 4); 240 164 241 165 initrd_end_page = ((uint32_t)(initrd_addr + initrd_size) & -4096); 242 166 max_allowed_page = (readl_es(0x22c) & -4096); ··· 251 175 252 176 } 253 177 254 254 - bios_cfg_read_entry(initrd_addr, FW_CFG_INITRD_DATA, initrd_size); 178 178 + bios_cfg_read_entry_dma(initrd_addr, FW_CFG_INITRD_DATA, initrd_size); 255 179 256 256 - bios_cfg_read_entry(&kernel_addr, FW_CFG_KERNEL_ADDR, 4); 257 257 - bios_cfg_read_entry(&kernel_size, FW_CFG_KERNEL_SIZE, 4); 258 258 - bios_cfg_read_entry(kernel_addr, FW_CFG_KERNEL_DATA, kernel_size); 180 180 + bios_cfg_read_entry_dma(&kernel_addr, FW_CFG_KERNEL_ADDR, 4); 181 181 + bios_cfg_read_entry_dma(&kernel_size, FW_CFG_KERNEL_SIZE, 4); 182 182 + bios_cfg_read_entry_dma(kernel_addr, FW_CFG_KERNEL_DATA, kernel_size); 259 183 260 260 - bios_cfg_read_entry(&cmdline_addr, FW_CFG_CMDLINE_ADDR, 4); 261 261 - bios_cfg_read_entry(&cmdline_size, FW_CFG_CMDLINE_SIZE, 4); 262 262 - bios_cfg_read_entry(cmdline_addr, FW_CFG_CMDLINE_DATA, cmdline_size); 184 184 + bios_cfg_read_entry_dma(&cmdline_addr, FW_CFG_CMDLINE_ADDR, 4); 185 185 + bios_cfg_read_entry_dma(&cmdline_size, FW_CFG_CMDLINE_SIZE, 4); 186 186 + bios_cfg_read_entry_dma(cmdline_addr, FW_CFG_CMDLINE_DATA, cmdline_size); 263 187 264 188 /* Boot linux */ 265 189 segment_addr = ((uint32_t)setup_addr >> 4);

+110

pc-bios/optionrom/optrom.h

··· 1 1 + /* 2 2 + * Common Option ROM Functions for C code 3 3 + * 4 4 + * This program is free software; you can redistribute it and/or modify 5 5 + * it under the terms of the GNU General Public License as published by 6 6 + * the Free Software Foundation; either version 2 of the License, or 7 7 + * (at your option) any later version. 8 8 + * 9 9 + * This program is distributed in the hope that it will be useful, 10 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 12 + * GNU General Public License for more details. 13 13 + * 14 14 + * You should have received a copy of the GNU General Public License 15 15 + * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 16 + * 17 17 + * Copyright (c) 2015-2019 Red Hat Inc. 18 18 + * Authors: 19 19 + * Marc Marí <marc.mari.barcelo@gmail.com> 20 20 + * Richard W.M. Jones <rjones@redhat.com> 21 21 + * Stefano Garzarella <sgarzare@redhat.com> 22 22 + */ 23 23 + 24 24 + #ifndef OPTROM_H 25 25 + #define OPTROM_H 26 26 + 27 27 + #include <stdint.h> 28 28 + #include "../../include/standard-headers/linux/qemu_fw_cfg.h" 29 29 + 30 30 + #define barrier() asm("" : : : "memory") 31 31 + 32 32 + #ifdef __clang__ 33 33 + #define ADDR32 34 34 + #else 35 35 + #define ADDR32 "addr32 " 36 36 + #endif 37 37 + 38 38 + static inline void outb(uint8_t value, uint16_t port) 39 39 + { 40 40 + asm volatile("outb %0, %w1" : : "a"(value), "Nd"(port)); 41 41 + } 42 42 + 43 43 + static inline void outw(uint16_t value, uint16_t port) 44 44 + { 45 45 + asm volatile("outw %0, %w1" : : "a"(value), "Nd"(port)); 46 46 + } 47 47 + 48 48 + static inline void outl(uint32_t value, uint16_t port) 49 49 + { 50 50 + asm volatile("outl %0, %w1" : : "a"(value), "Nd"(port)); 51 51 + } 52 52 + 53 53 + static inline uint8_t inb(uint16_t port) 54 54 + { 55 55 + uint8_t value; 56 56 + 57 57 + asm volatile("inb %w1, %0" : "=a"(value) : "Nd"(port)); 58 58 + return value; 59 59 + } 60 60 + 61 61 + static inline uint16_t inw(uint16_t port) 62 62 + { 63 63 + uint16_t value; 64 64 + 65 65 + asm volatile("inw %w1, %0" : "=a"(value) : "Nd"(port)); 66 66 + return value; 67 67 + } 68 68 + 69 69 + static inline uint32_t inl(uint16_t port) 70 70 + { 71 71 + uint32_t value; 72 72 + 73 73 + asm volatile("inl %w1, %0" : "=a"(value) : "Nd"(port)); 74 74 + return value; 75 75 + } 76 76 + 77 77 + static inline void insb(uint16_t port, uint8_t *buf, uint32_t len) 78 78 + { 79 79 + asm volatile("rep insb %%dx, %%es:(%%edi)" 80 80 + : "+c"(len), "+D"(buf) : "d"(port) : "memory"); 81 81 + } 82 82 + 83 83 + static inline uint32_t bswap32(uint32_t x) 84 84 + { 85 85 + asm("bswapl %0" : "=r" (x) : "0" (x)); 86 86 + return x; 87 87 + } 88 88 + 89 89 + static inline uint64_t bswap64(uint64_t x) 90 90 + { 91 91 + asm("bswapl %%eax; bswapl %%edx; xchg %%eax, %%edx" : "=A" (x) : "0" (x)); 92 92 + return x; 93 93 + } 94 94 + 95 95 + static inline uint64_t cpu_to_be64(uint64_t x) 96 96 + { 97 97 + return bswap64(x); 98 98 + } 99 99 + 100 100 + static inline uint32_t cpu_to_be32(uint32_t x) 101 101 + { 102 102 + return bswap32(x); 103 103 + } 104 104 + 105 105 + static inline uint32_t be32_to_cpu(uint32_t x) 106 106 + { 107 107 + return bswap32(x); 108 108 + } 109 109 + 110 110 + #endif /* OPTROM_H */

+92

pc-bios/optionrom/optrom_fw_cfg.h

··· 1 1 + /* 2 2 + * Common Option ROM Functions for fw_cfg 3 3 + * 4 4 + * This program is free software; you can redistribute it and/or modify 5 5 + * it under the terms of the GNU General Public License as published by 6 6 + * the Free Software Foundation; either version 2 of the License, or 7 7 + * (at your option) any later version. 8 8 + * 9 9 + * This program is distributed in the hope that it will be useful, 10 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 12 + * GNU General Public License for more details. 13 13 + * 14 14 + * You should have received a copy of the GNU General Public License 15 15 + * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 16 + * 17 17 + * Copyright (c) 2015-2019 Red Hat Inc. 18 18 + * Authors: 19 19 + * Marc Marí <marc.mari.barcelo@gmail.com> 20 20 + * Richard W.M. Jones <rjones@redhat.com> 21 21 + * Stefano Garzarella <sgarzare@redhat.com> 22 22 + */ 23 23 + 24 24 + #ifndef OPTROM_FW_CFG_H 25 25 + #define OPTROM_FW_CFG_H 26 26 + 27 27 + #include "../../include/standard-headers/linux/qemu_fw_cfg.h" 28 28 + 29 29 + #define BIOS_CFG_IOPORT_CFG 0x510 30 30 + #define BIOS_CFG_IOPORT_DATA 0x511 31 31 + #define BIOS_CFG_DMA_ADDR_HIGH 0x514 32 32 + #define BIOS_CFG_DMA_ADDR_LOW 0x518 33 33 + 34 34 + static __attribute__((unused)) 35 35 + void bios_cfg_select(uint16_t key) 36 36 + { 37 37 + outw(key, BIOS_CFG_IOPORT_CFG); 38 38 + } 39 39 + 40 40 + static __attribute__((unused)) 41 41 + void bios_cfg_read_entry_io(void *buf, uint16_t entry, uint32_t len) 42 42 + { 43 43 + bios_cfg_select(entry); 44 44 + insb(BIOS_CFG_IOPORT_DATA, buf, len); 45 45 + } 46 46 + 47 47 + /* 48 48 + * clang is happy to inline this function, and bloats the 49 49 + * ROM. 50 50 + */ 51 51 + static __attribute__((__noinline__)) __attribute__((unused)) 52 52 + void bios_cfg_read_entry_dma(void *buf, uint16_t entry, uint32_t len) 53 53 + { 54 54 + struct fw_cfg_dma_access access; 55 55 + uint32_t control = (entry << 16) | FW_CFG_DMA_CTL_SELECT 56 56 + | FW_CFG_DMA_CTL_READ; 57 57 + 58 58 + access.address = cpu_to_be64((uint64_t)(uint32_t)buf); 59 59 + access.length = cpu_to_be32(len); 60 60 + access.control = cpu_to_be32(control); 61 61 + 62 62 + barrier(); 63 63 + 64 64 + outl(cpu_to_be32((uint32_t)&access), BIOS_CFG_DMA_ADDR_LOW); 65 65 + 66 66 + while (be32_to_cpu(access.control) & ~FW_CFG_DMA_CTL_ERROR) { 67 67 + barrier(); 68 68 + } 69 69 + } 70 70 + 71 71 + static __attribute__((unused)) 72 72 + void bios_cfg_read_entry(void *buf, uint16_t entry, uint32_t len, 73 73 + uint32_t version) 74 74 + { 75 75 + if (version & FW_CFG_VERSION_DMA) { 76 76 + bios_cfg_read_entry_dma(buf, entry, len); 77 77 + } else { 78 78 + bios_cfg_read_entry_io(buf, entry, len); 79 79 + } 80 80 + } 81 81 + 82 82 + static __attribute__((unused)) 83 83 + uint32_t bios_cfg_version(void) 84 84 + { 85 85 + uint32_t version; 86 86 + 87 87 + bios_cfg_read_entry_io(&version, FW_CFG_ID, sizeof(version)); 88 88 + 89 89 + return version; 90 90 + } 91 91 + 92 92 + #endif /* OPTROM_FW_CFG_H */

+200

pc-bios/optionrom/pvh.S

··· 1 1 + /* 2 2 + * PVH Option ROM 3 3 + * 4 4 + * This program is free software; you can redistribute it and/or modify 5 5 + * it under the terms of the GNU General Public License as published by 6 6 + * the Free Software Foundation; either version 2 of the License, or 7 7 + * (at your option) any later version. 8 8 + * 9 9 + * This program is distributed in the hope that it will be useful, 10 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 12 + * GNU General Public License for more details. 13 13 + * 14 14 + * You should have received a copy of the GNU General Public License 15 15 + * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 16 + * 17 17 + * Copyright Novell Inc, 2009 18 18 + * Authors: Alexander Graf <agraf@suse.de> 19 19 + * 20 20 + * Copyright (c) 2019 Red Hat Inc. 21 21 + * Authors: Stefano Garzarella <sgarzare@redhat.com> 22 22 + */ 23 23 + 24 24 + #include "optionrom.h" 25 25 + 26 26 + #define BOOT_ROM_PRODUCT "PVH loader" 27 27 + 28 28 + #define GS_PROT_JUMP 0 29 29 + #define GS_GDT_DESC 6 30 30 + 31 31 + #ifdef OPTION_ROM_START 32 32 + #undef OPTION_ROM_START 33 33 + #endif 34 34 + #ifdef OPTION_ROM_END 35 35 + #undef OPTION_ROM_END 36 36 + #endif 37 37 + 38 38 + /* 39 39 + * Redefine OPTION_ROM_START and OPTION_ROM_END, because this rom is produced 40 40 + * linking multiple objects. 41 41 + * signrom.py will add padding. 42 42 + */ 43 43 + #define OPTION_ROM_START \ 44 44 + .code16; \ 45 45 + .text; \ 46 46 + .global _start; \ 47 47 + _start:; \ 48 48 + .short 0xaa55; \ 49 49 + .byte 3; /* desired size in 512 units */ 50 50 + 51 51 + #define OPTION_ROM_END \ 52 52 + _end: 53 53 + 54 54 + BOOT_ROM_START 55 55 + 56 56 + run_pvhboot: 57 57 + 58 58 + cli 59 59 + cld 60 60 + 61 61 + mov %cs, %eax 62 62 + shl $0x4, %eax 63 63 + 64 64 + /* set up a long jump descriptor that is PC relative */ 65 65 + 66 66 + /* move stack memory to %gs */ 67 67 + mov %ss, %ecx 68 68 + shl $0x4, %ecx 69 69 + mov %esp, %ebx 70 70 + add %ebx, %ecx 71 71 + sub $0x20, %ecx 72 72 + sub $0x30, %esp 73 73 + shr $0x4, %ecx 74 74 + mov %cx, %gs 75 75 + 76 76 + /* now push the indirect jump descriptor there */ 77 77 + mov (prot_jump), %ebx 78 78 + add %eax, %ebx 79 79 + movl %ebx, %gs:GS_PROT_JUMP 80 80 + mov $8, %bx 81 81 + movw %bx, %gs:GS_PROT_JUMP + 4 82 82 + 83 83 + /* fix the gdt descriptor to be PC relative */ 84 84 + movw (gdt_desc), %bx 85 85 + movw %bx, %gs:GS_GDT_DESC 86 86 + movl (gdt_desc+2), %ebx 87 87 + add %eax, %ebx 88 88 + movl %ebx, %gs:GS_GDT_DESC + 2 89 89 + 90 90 + /* initialize HVM memmap table using int 0x15(e820) */ 91 91 + 92 92 + /* ES = pvh_e820 struct */ 93 93 + mov $pvh_e820, %eax 94 94 + shr $4, %eax 95 95 + mov %ax, %es 96 96 + 97 97 + /* start storing memmap table at %es:8 (pvh_e820.table) */ 98 98 + mov $8,%edi 99 99 + xor %ebx, %ebx 100 100 + jmp memmap_loop 101 101 + 102 102 + memmap_loop_check: 103 103 + /* pvh_e820 can contains up to 128 entries */ 104 104 + cmp $128, %ebx 105 105 + je memmap_done 106 106 + 107 107 + memmap_loop: 108 108 + /* entry size (hvm_memmap_table_entry) & max buffer size (int15) */ 109 109 + movl $24, %ecx 110 110 + /* e820 */ 111 111 + movl $0x0000e820, %eax 112 112 + /* 'SMAP' magic */ 113 113 + movl $0x534d4150, %edx 114 114 + /* store counter value at %es:0 (pvh_e820.entries) */ 115 115 + movl %ebx, %es:0 116 116 + 117 117 + int $0x15 118 118 + /* error or last entry already done? */ 119 119 + jb memmap_err 120 120 + 121 121 + /* %edi += entry size (hvm_memmap_table_entry) */ 122 122 + add $24, %edi 123 123 + 124 124 + /* continuation value 0 means last entry */ 125 125 + test %ebx, %ebx 126 126 + jnz memmap_loop_check 127 127 + 128 128 + /* increase pvh_e820.entries to save the last entry */ 129 129 + movl %es:0, %ebx 130 130 + inc %ebx 131 131 + 132 132 + memmap_done: 133 133 + movl %ebx, %es:0 134 134 + 135 135 + memmap_err: 136 136 + 137 137 + /* load the GDT before going into protected mode */ 138 138 + lgdt: 139 139 + data32 lgdt %gs:GS_GDT_DESC 140 140 + 141 141 + /* get us to protected mode now */ 142 142 + movl $1, %eax 143 143 + movl %eax, %cr0 144 144 + 145 145 + /* the LJMP sets CS for us and gets us to 32-bit */ 146 146 + ljmp: 147 147 + data32 ljmp *%gs:GS_PROT_JUMP 148 148 + 149 149 + prot_mode: 150 150 + .code32 151 151 + 152 152 + /* initialize all other segments */ 153 153 + movl $0x10, %eax 154 154 + movl %eax, %ss 155 155 + movl %eax, %ds 156 156 + movl %eax, %es 157 157 + movl %eax, %fs 158 158 + movl %eax, %gs 159 159 + 160 160 + jmp pvh_load_kernel 161 161 + 162 162 + /* Variables */ 163 163 + .align 4, 0 164 164 + prot_jump: .long prot_mode 165 165 + .short 8 166 166 + 167 167 + .align 4, 0 168 168 + gdt: 169 169 + /* 0x00 */ 170 170 + .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 171 171 + 172 172 + /* 173 173 + * 0x08: code segment 174 174 + * (base=0, limit=0xfffff, type=32bit code exec/read, DPL=0, 4k) 175 175 + */ 176 176 + .byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x9a, 0xcf, 0x00 177 177 + 178 178 + /* 179 179 + * 0x10: data segment 180 180 + * (base=0, limit=0xfffff, type=32bit data read/write, DPL=0, 4k) 181 181 + */ 182 182 + .byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x92, 0xcf, 0x00 183 183 + 184 184 + /* 185 185 + * 0x18: code segment 186 186 + * (base=0, limit=0x0ffff, type=16bit code exec/read/conf, DPL=0, 1b) 187 187 + */ 188 188 + .byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x9e, 0x00, 0x00 189 189 + 190 190 + /* 191 191 + * 0x20: data segment 192 192 + * (base=0, limit=0x0ffff, type=16bit data read/write, DPL=0, 1b) 193 193 + */ 194 194 + .byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x92, 0x00, 0x00 195 195 + 196 196 + gdt_desc: 197 197 + .short (5 * 8) - 1 198 198 + .long gdt 199 199 + 200 200 + BOOT_ROM_END

+133

pc-bios/optionrom/pvh_main.c

··· 1 1 + /* 2 2 + * PVH Option ROM for fw_cfg DMA 3 3 + * 4 4 + * This program is free software; you can redistribute it and/or modify 5 5 + * it under the terms of the GNU General Public License as published by 6 6 + * the Free Software Foundation; either version 2 of the License, or 7 7 + * (at your option) any later version. 8 8 + * 9 9 + * This program is distributed in the hope that it will be useful, 10 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 12 + * GNU General Public License for more details. 13 13 + * 14 14 + * You should have received a copy of the GNU General Public License 15 15 + * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 16 + * 17 17 + * Copyright (c) 2019 Red Hat Inc. 18 18 + * Authors: 19 19 + * Stefano Garzarella <sgarzare@redhat.com> 20 20 + */ 21 21 + 22 22 + asm (".code32"); /* this code will be executed in protected mode */ 23 23 + 24 24 + #include <stddef.h> 25 25 + #include <stdint.h> 26 26 + #include "optrom.h" 27 27 + #include "optrom_fw_cfg.h" 28 28 + #include "../../include/hw/xen/start_info.h" 29 29 + 30 30 + #define RSDP_SIGNATURE 0x2052545020445352LL /* "RSD PTR " */ 31 31 + #define RSDP_AREA_ADDR 0x000E0000 32 32 + #define RSDP_AREA_SIZE 2048 33 33 + #define EBDA_BASE_ADDR 0x0000040E 34 34 + #define EBDA_SIZE 1024 35 35 + 36 36 + #define E820_MAXENTRIES 128 37 37 + #define CMDLINE_BUFSIZE 4096 38 38 + 39 39 + /* e820 table filled in pvh.S using int 0x15 */ 40 40 + struct pvh_e820_table { 41 41 + uint32_t entries; 42 42 + uint32_t reserved; 43 43 + struct hvm_memmap_table_entry table[E820_MAXENTRIES]; 44 44 + }; 45 45 + 46 46 + struct pvh_e820_table pvh_e820 asm("pvh_e820") __attribute__ ((aligned)); 47 47 + 48 48 + static struct hvm_start_info start_info; 49 49 + static struct hvm_modlist_entry ramdisk_mod; 50 50 + static uint8_t cmdline_buffer[CMDLINE_BUFSIZE]; 51 51 + 52 52 + 53 53 + /* Search RSDP signature. */ 54 54 + static uintptr_t search_rsdp(uint32_t start_addr, uint32_t end_addr) 55 55 + { 56 56 + uint64_t *rsdp_p; 57 57 + 58 58 + /* RSDP signature is always on a 16 byte boundary */ 59 59 + for (rsdp_p = (uint64_t *)start_addr; rsdp_p < (uint64_t *)end_addr; 60 60 + rsdp_p += 2) { 61 61 + if (*rsdp_p == RSDP_SIGNATURE) { 62 62 + return (uintptr_t)rsdp_p; 63 63 + } 64 64 + } 65 65 + 66 66 + return 0; 67 67 + } 68 68 + 69 69 + /* Force the asm name without leading underscore, even on Win32. */ 70 70 + extern void pvh_load_kernel(void) asm("pvh_load_kernel"); 71 71 + 72 72 + void pvh_load_kernel(void) 73 73 + { 74 74 + void *cmdline_addr = &cmdline_buffer; 75 75 + void *kernel_entry, *initrd_addr; 76 76 + uint32_t cmdline_size, initrd_size, fw_cfg_version = bios_cfg_version(); 77 77 + 78 78 + start_info.magic = XEN_HVM_START_MAGIC_VALUE; 79 79 + start_info.version = 1; 80 80 + 81 81 + /* 82 82 + * pvh_e820 is filled in the pvh.S before to switch in protected mode, 83 83 + * because we can use int 0x15 only in real mode. 84 84 + */ 85 85 + start_info.memmap_entries = pvh_e820.entries; 86 86 + start_info.memmap_paddr = (uintptr_t)pvh_e820.table; 87 87 + 88 88 + /* 89 89 + * Search RSDP in the main BIOS area below 1 MB. 90 90 + * SeaBIOS store the RSDP in this area, so we try it first. 91 91 + */ 92 92 + start_info.rsdp_paddr = search_rsdp(RSDP_AREA_ADDR, 93 93 + RSDP_AREA_ADDR + RSDP_AREA_SIZE); 94 94 + 95 95 + /* Search RSDP in the EBDA if it is not found */ 96 96 + if (!start_info.rsdp_paddr) { 97 97 + /* 98 98 + * Th EBDA address is stored at EBDA_BASE_ADDR. It contains 2 bytes 99 99 + * segment pointer to EBDA, so we must convert it to a linear address. 100 100 + */ 101 101 + uint32_t ebda_paddr = ((uint32_t)*((uint16_t *)EBDA_BASE_ADDR)) << 4; 102 102 + if (ebda_paddr > 0x400) { 103 103 + uint32_t *ebda = (uint32_t *)ebda_paddr; 104 104 + 105 105 + start_info.rsdp_paddr = search_rsdp(*ebda, *ebda + EBDA_SIZE); 106 106 + } 107 107 + } 108 108 + 109 109 + bios_cfg_read_entry(&cmdline_size, FW_CFG_CMDLINE_SIZE, 4, fw_cfg_version); 110 110 + bios_cfg_read_entry(cmdline_addr, FW_CFG_CMDLINE_DATA, cmdline_size, 111 111 + fw_cfg_version); 112 112 + start_info.cmdline_paddr = (uintptr_t)cmdline_addr; 113 113 + 114 114 + /* Check if we have the initrd to load */ 115 115 + bios_cfg_read_entry(&initrd_size, FW_CFG_INITRD_SIZE, 4, fw_cfg_version); 116 116 + if (initrd_size) { 117 117 + bios_cfg_read_entry(&initrd_addr, FW_CFG_INITRD_ADDR, 4, 118 118 + fw_cfg_version); 119 119 + bios_cfg_read_entry(initrd_addr, FW_CFG_INITRD_DATA, initrd_size, 120 120 + fw_cfg_version); 121 121 + 122 122 + ramdisk_mod.paddr = (uintptr_t)initrd_addr; 123 123 + ramdisk_mod.size = initrd_size; 124 124 + 125 125 + /* The first module is always ramdisk. */ 126 126 + start_info.modlist_paddr = (uintptr_t)&ramdisk_mod; 127 127 + start_info.nr_modules = 1; 128 128 + } 129 129 + 130 130 + bios_cfg_read_entry(&kernel_entry, FW_CFG_KERNEL_ENTRY, 4, fw_cfg_version); 131 131 + 132 132 + asm volatile("jmp *%1" : : "b"(&start_info), "c"(kernel_entry)); 133 133 + }

pc-bios/pvh.bin

This is a binary file and will not be displayed.

+7 -5

qemu-deprecated.texi

··· 42 42 Option @option{-virtioconsole} has been replaced by 43 43 @option{-device virtconsole}. 44 44 45 45 + @subsection -no-frame (since 2.12.0) 46 46 + 47 47 + The @code{--no-frame} argument works with SDL 1.2 only. The other user 48 48 + interfaces never implemented this in the first place. So this will be 49 49 + removed together with SDL 1.2 support. 50 50 + >>>>>>> remotes/bonzini/tags/for-upstream 51 51 + 45 52 @subsection -clock (since 3.0.0) 46 53 47 54 The @code{-clock} option is ignored since QEMU version 1.7.0. There is no 48 55 replacement since it is not needed anymore. 49 49 - 50 50 - @subsection -enable-hax (since 3.0.0) 51 51 - 52 52 - The @option{-enable-hax} option has been replaced by @option{-accel hax}. 53 53 - Both options have been introduced in QEMU version 2.9.0. 54 56 55 57 @subsection -drive file=json:@{...@{'driver':'file'@}@} (since 3.0) 56 58

-21

qemu-options.hx

··· 3370 3370 if KVM support is enabled when compiling. 3371 3371 ETEXI 3372 3372 3373 3373 - DEF("enable-hax", 0, QEMU_OPTION_enable_hax, \ 3374 3374 - "-enable-hax enable HAX virtualization support\n", QEMU_ARCH_I386) 3375 3375 - STEXI 3376 3376 - @item -enable-hax 3377 3377 - @findex -enable-hax 3378 3378 - Enable HAX (Hardware-based Acceleration eXecution) support. This option 3379 3379 - is only available if HAX support is enabled when compiling. HAX is only 3380 3380 - applicable to MAC and Windows platform, and thus does not conflict with 3381 3381 - KVM. This option is deprecated, use @option{-accel hax} instead. 3382 3382 - ETEXI 3383 3383 - 3384 3373 DEF("xen-domid", HAS_ARG, QEMU_OPTION_xen_domid, 3385 3374 "-xen-domid id specify xen guest domain id\n", QEMU_ARCH_ALL) 3386 3375 DEF("xen-attach", 0, QEMU_OPTION_xen_attach, ··· 3614 3603 @item -echr 0x14 3615 3604 @itemx -echr 20 3616 3605 @end table 3617 3617 - ETEXI 3618 3618 - 3619 3619 - DEF("virtioconsole", HAS_ARG, QEMU_OPTION_virtiocon, \ 3620 3620 - "-virtioconsole c\n" \ 3621 3621 - " set virtio console\n", QEMU_ARCH_ALL) 3622 3622 - STEXI 3623 3623 - @item -virtioconsole @var{c} 3624 3624 - @findex -virtioconsole 3625 3625 - Set virtio console. 3626 3626 - This option is deprecated, please use @option{-device virtconsole} instead. 3627 3606 ETEXI 3628 3607 3629 3608 DEF("show-cursor", 0, QEMU_OPTION_show_cursor, \

+1

scripts/tap-driver.pl

··· 313 313 my $iterator = TAP::Parser::Iterator::Stream->new(\*STDIN); 314 314 my $parser = TAP::Parser->new ({iterator => $iterator }); 315 315 316 316 + STDOUT->autoflush(1); 316 317 while (defined (my $cur = $parser->next)) 317 318 { 318 319 # Parsing of TAP input should stop after a "Bail out!" directive.

+1

scripts/tap-merge.pl

··· 53 53 my $testno = 0; # Number of test results seen so far. 54 54 my $bailed_out = 0; # Whether a "Bail out!" directive has been seen. 55 55 56 56 + STDOUT->autoflush(1); 56 57 while (defined (my $cur = $parser->next)) 57 58 { 58 59 if ($cur->is_bailout)

+6

scripts/update-linux-headers.sh

··· 127 127 cp "$tmpdir/include/asm/unistd_x32.h" "$output/linux-headers/asm-x86/" 128 128 cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-x86/" 129 129 cp_portable "$tmpdir/include/asm/kvm_para.h" "$output/include/standard-headers/asm-$arch" 130 130 + # Remove everything except the macros from bootparam.h avoiding the 131 131 + # unnecessary import of several video/ist/etc headers 132 132 + sed -e '/__ASSEMBLY__/,/__ASSEMBLY__/d' \ 133 133 + "$tmpdir/include/asm/bootparam.h" > "$tmpdir/bootparam.h" 134 134 + cp_portable "$tmpdir/bootparam.h" \ 135 135 + "$output/include/standard-headers/asm-$arch" 130 136 fi 131 137 done 132 138

+7 -10

target/i386/cpu.c

··· 1077 1077 NULL, NULL, NULL, NULL, 1078 1078 NULL, NULL, NULL, NULL, 1079 1079 NULL, NULL, NULL, NULL, 1080 1080 - NULL, NULL, "pconfig", NULL, 1080 1080 + NULL, NULL, NULL, NULL, 1081 1081 NULL, NULL, NULL, NULL, 1082 1082 NULL, NULL, "spec-ctrl", "stibp", 1083 1083 NULL, "arch-capabilities", NULL, "ssbd", ··· 2530 2530 CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | 2531 2531 CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | 2532 2532 CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | 2533 2533 - CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT | 2534 2534 - CPUID_7_0_EBX_INTEL_PT, 2533 2533 + CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, 2535 2534 .features[FEAT_7_0_ECX] = 2536 2535 CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_OSPKE | 2537 2536 CPUID_7_0_ECX_AVX512VNNI, ··· 2583 2582 CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | 2584 2583 CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID | 2585 2584 CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | 2586 2586 - CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_INTEL_PT, 2585 2585 + CPUID_7_0_EBX_SMAP, 2587 2586 .features[FEAT_7_0_ECX] = 2588 2587 CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | 2589 2588 CPUID_7_0_ECX_OSPKE | CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | ··· 2641 2640 CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | 2642 2641 CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | 2643 2642 CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | 2644 2644 - CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT | 2645 2645 - CPUID_7_0_EBX_INTEL_PT, 2643 2643 + CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, 2646 2644 .features[FEAT_7_0_ECX] = 2647 2645 CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | 2648 2646 CPUID_7_0_ECX_OSPKE | CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | ··· 2650 2648 CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG | 2651 2649 CPUID_7_0_ECX_AVX512_VPOPCNTDQ | CPUID_7_0_ECX_LA57, 2652 2650 .features[FEAT_7_0_EDX] = 2653 2653 - CPUID_7_0_EDX_PCONFIG | CPUID_7_0_EDX_SPEC_CTRL | 2654 2654 - CPUID_7_0_EDX_SPEC_CTRL_SSBD, 2651 2651 + CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, 2655 2652 /* Missing: XSAVES (not supported by some Linux versions, 2656 2653 * including v4.1 to v4.12). 2657 2654 * KVM doesn't yet expose any XSAVES state save component, ··· 5873 5870 cc->gdb_arch_name = x86_gdb_arch_name; 5874 5871 #ifdef TARGET_X86_64 5875 5872 cc->gdb_core_xml_file = "i386-64bit.xml"; 5876 5876 - cc->gdb_num_core_regs = 57; 5873 5873 + cc->gdb_num_core_regs = 66; 5877 5874 #else 5878 5875 cc->gdb_core_xml_file = "i386-32bit.xml"; 5879 5879 - cc->gdb_num_core_regs = 41; 5876 5876 + cc->gdb_num_core_regs = 50; 5880 5877 #endif 5881 5878 #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) 5882 5879 cc->debug_excp_handler = breakpoint_handler;

-1

target/i386/cpu.h

··· 694 694 695 695 #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */ 696 696 #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */ 697 697 - #define CPUID_7_0_EDX_PCONFIG (1U << 18) /* Platform Configuration */ 698 697 #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ 699 698 #define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29) /*Arch Capabilities*/ 700 699 #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */

+189 -4

target/i386/gdbstub.c

··· 32 32 #endif 33 33 static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; 34 34 35 35 + /* 36 36 + * Keep these in sync with assignment to 37 37 + * gdb_num_core_regs in target/i386/cpu.c 38 38 + * and with the machine description 39 39 + */ 40 40 + 41 41 + /* 42 42 + * SEG: 6 segments, plus fs_base, gs_base, kernel_gs_base 43 43 + */ 44 44 + 45 45 + /* 46 46 + * general regs -----> 8 or 16 47 47 + */ 48 48 + #define IDX_NB_IP 1 49 49 + #define IDX_NB_FLAGS 1 50 50 + #define IDX_NB_SEG (6 + 3) 51 51 + #define IDX_NB_CTL 6 52 52 + #define IDX_NB_FP 16 53 53 + /* 54 54 + * fpu regs ----------> 8 or 16 55 55 + */ 56 56 + #define IDX_NB_MXCSR 1 57 57 + /* 58 58 + * total ----> 8+1+1+9+6+16+8+1=50 or 16+1+1+9+6+16+16+1=66 59 59 + */ 60 60 + 35 61 #define IDX_IP_REG CPU_NB_REGS 36 36 - #define IDX_FLAGS_REG (IDX_IP_REG + 1) 37 37 - #define IDX_SEG_REGS (IDX_FLAGS_REG + 1) 38 38 - #define IDX_FP_REGS (IDX_SEG_REGS + 6) 39 39 - #define IDX_XMM_REGS (IDX_FP_REGS + 16) 62 62 + #define IDX_FLAGS_REG (IDX_IP_REG + IDX_NB_IP) 63 63 + #define IDX_SEG_REGS (IDX_FLAGS_REG + IDX_NB_FLAGS) 64 64 + #define IDX_CTL_REGS (IDX_SEG_REGS + IDX_NB_SEG) 65 65 + #define IDX_FP_REGS (IDX_CTL_REGS + IDX_NB_CTL) 66 66 + #define IDX_XMM_REGS (IDX_FP_REGS + IDX_NB_FP) 40 67 #define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS) 68 68 + 69 69 + #define IDX_CTL_CR0_REG (IDX_CTL_REGS + 0) 70 70 + #define IDX_CTL_CR2_REG (IDX_CTL_REGS + 1) 71 71 + #define IDX_CTL_CR3_REG (IDX_CTL_REGS + 2) 72 72 + #define IDX_CTL_CR4_REG (IDX_CTL_REGS + 3) 73 73 + #define IDX_CTL_CR8_REG (IDX_CTL_REGS + 4) 74 74 + #define IDX_CTL_EFER_REG (IDX_CTL_REGS + 5) 75 75 + 76 76 + #ifdef TARGET_X86_64 77 77 + #define GDB_FORCE_64 1 78 78 + #else 79 79 + #define GDB_FORCE_64 0 80 80 + #endif 81 81 + 41 82 42 83 int x86_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) 43 84 { 44 85 X86CPU *cpu = X86_CPU(cs); 45 86 CPUX86State *env = &cpu->env; 46 87 88 88 + uint64_t tpr; 89 89 + 47 90 /* N.B. GDB can't deal with changes in registers or sizes in the middle 48 91 of a session. So if we're in 32-bit mode on a 64-bit cpu, still act 49 92 as if we're on a 64-bit cpu. */ ··· 104 147 return gdb_get_reg32(mem_buf, env->segs[R_FS].selector); 105 148 case IDX_SEG_REGS + 5: 106 149 return gdb_get_reg32(mem_buf, env->segs[R_GS].selector); 150 150 + 151 151 + case IDX_SEG_REGS + 6: 152 152 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 153 153 + return gdb_get_reg64(mem_buf, env->segs[R_FS].base); 154 154 + } 155 155 + return gdb_get_reg32(mem_buf, env->segs[R_FS].base); 156 156 + 157 157 + case IDX_SEG_REGS + 7: 158 158 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 159 159 + return gdb_get_reg64(mem_buf, env->segs[R_GS].base); 160 160 + } 161 161 + return gdb_get_reg32(mem_buf, env->segs[R_GS].base); 162 162 + 163 163 + case IDX_SEG_REGS + 8: 164 164 + #ifdef TARGET_X86_64 165 165 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 166 166 + return gdb_get_reg64(mem_buf, env->kernelgsbase); 167 167 + } 168 168 + return gdb_get_reg32(mem_buf, env->kernelgsbase); 169 169 + #else 170 170 + return gdb_get_reg32(mem_buf, 0); 171 171 + #endif 107 172 108 173 case IDX_FP_REGS + 8: 109 174 return gdb_get_reg32(mem_buf, env->fpuc); ··· 125 190 126 191 case IDX_MXCSR_REG: 127 192 return gdb_get_reg32(mem_buf, env->mxcsr); 193 193 + 194 194 + case IDX_CTL_CR0_REG: 195 195 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 196 196 + return gdb_get_reg64(mem_buf, env->cr[0]); 197 197 + } 198 198 + return gdb_get_reg32(mem_buf, env->cr[0]); 199 199 + 200 200 + case IDX_CTL_CR2_REG: 201 201 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 202 202 + return gdb_get_reg64(mem_buf, env->cr[2]); 203 203 + } 204 204 + return gdb_get_reg32(mem_buf, env->cr[2]); 205 205 + 206 206 + case IDX_CTL_CR3_REG: 207 207 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 208 208 + return gdb_get_reg64(mem_buf, env->cr[3]); 209 209 + } 210 210 + return gdb_get_reg32(mem_buf, env->cr[3]); 211 211 + 212 212 + case IDX_CTL_CR4_REG: 213 213 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 214 214 + return gdb_get_reg64(mem_buf, env->cr[4]); 215 215 + } 216 216 + return gdb_get_reg32(mem_buf, env->cr[4]); 217 217 + 218 218 + case IDX_CTL_CR8_REG: 219 219 + #ifdef CONFIG_SOFTMMU 220 220 + tpr = cpu_get_apic_tpr(cpu->apic_state); 221 221 + #else 222 222 + tpr = 0; 223 223 + #endif 224 224 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 225 225 + return gdb_get_reg64(mem_buf, tpr); 226 226 + } 227 227 + return gdb_get_reg32(mem_buf, tpr); 228 228 + 229 229 + case IDX_CTL_EFER_REG: 230 230 + if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { 231 231 + return gdb_get_reg64(mem_buf, env->efer); 232 232 + } 233 233 + return gdb_get_reg32(mem_buf, env->efer); 128 234 } 129 235 } 130 236 return 0; ··· 229 335 case IDX_SEG_REGS + 5: 230 336 return x86_cpu_gdb_load_seg(cpu, R_GS, mem_buf); 231 337 338 338 + case IDX_SEG_REGS + 6: 339 339 + if (env->hflags & HF_CS64_MASK) { 340 340 + env->segs[R_FS].base = ldq_p(mem_buf); 341 341 + return 8; 342 342 + } 343 343 + env->segs[R_FS].base = ldl_p(mem_buf); 344 344 + return 4; 345 345 + 346 346 + case IDX_SEG_REGS + 7: 347 347 + if (env->hflags & HF_CS64_MASK) { 348 348 + env->segs[R_GS].base = ldq_p(mem_buf); 349 349 + return 8; 350 350 + } 351 351 + env->segs[R_GS].base = ldl_p(mem_buf); 352 352 + return 4; 353 353 + 354 354 + #ifdef TARGET_X86_64 355 355 + case IDX_SEG_REGS + 8: 356 356 + if (env->hflags & HF_CS64_MASK) { 357 357 + env->kernelgsbase = ldq_p(mem_buf); 358 358 + return 8; 359 359 + } 360 360 + env->kernelgsbase = ldl_p(mem_buf); 361 361 + return 4; 362 362 + #endif 363 363 + 232 364 case IDX_FP_REGS + 8: 233 365 cpu_set_fpuc(env, ldl_p(mem_buf)); 234 366 return 4; ··· 253 385 case IDX_MXCSR_REG: 254 386 cpu_set_mxcsr(env, ldl_p(mem_buf)); 255 387 return 4; 388 388 + 389 389 + case IDX_CTL_CR0_REG: 390 390 + if (env->hflags & HF_CS64_MASK) { 391 391 + cpu_x86_update_cr0(env, ldq_p(mem_buf)); 392 392 + return 8; 393 393 + } 394 394 + cpu_x86_update_cr0(env, ldl_p(mem_buf)); 395 395 + return 4; 396 396 + 397 397 + case IDX_CTL_CR2_REG: 398 398 + if (env->hflags & HF_CS64_MASK) { 399 399 + env->cr[2] = ldq_p(mem_buf); 400 400 + return 8; 401 401 + } 402 402 + env->cr[2] = ldl_p(mem_buf); 403 403 + return 4; 404 404 + 405 405 + case IDX_CTL_CR3_REG: 406 406 + if (env->hflags & HF_CS64_MASK) { 407 407 + cpu_x86_update_cr3(env, ldq_p(mem_buf)); 408 408 + return 8; 409 409 + } 410 410 + cpu_x86_update_cr3(env, ldl_p(mem_buf)); 411 411 + return 4; 412 412 + 413 413 + case IDX_CTL_CR4_REG: 414 414 + if (env->hflags & HF_CS64_MASK) { 415 415 + cpu_x86_update_cr4(env, ldq_p(mem_buf)); 416 416 + return 8; 417 417 + } 418 418 + cpu_x86_update_cr4(env, ldl_p(mem_buf)); 419 419 + return 4; 420 420 + 421 421 + case IDX_CTL_CR8_REG: 422 422 + if (env->hflags & HF_CS64_MASK) { 423 423 + #ifdef CONFIG_SOFTMMU 424 424 + cpu_set_apic_tpr(cpu->apic_state, ldq_p(mem_buf)); 425 425 + #endif 426 426 + return 8; 427 427 + } 428 428 + #ifdef CONFIG_SOFTMMU 429 429 + cpu_set_apic_tpr(cpu->apic_state, ldl_p(mem_buf)); 430 430 + #endif 431 431 + return 4; 432 432 + 433 433 + case IDX_CTL_EFER_REG: 434 434 + if (env->hflags & HF_CS64_MASK) { 435 435 + cpu_load_efer(env, ldq_p(mem_buf)); 436 436 + return 8; 437 437 + } 438 438 + cpu_load_efer(env, ldl_p(mem_buf)); 439 439 + return 4; 440 440 + 256 441 } 257 442 } 258 443 /* Unrecognised register. */

-5

target/i386/hvf/hvf.c

··· 499 499 } 500 500 501 501 hv_vm_sync_tsc(0); 502 502 - cpu->halted = 0; 503 502 hv_vcpu_invalidate_tlb(cpu->hvf_fd); 504 503 hv_vcpu_flush(cpu->hvf_fd); 505 504 } ··· 582 581 583 582 wvmcs(cpu->hvf_fd, VMCS_TPR_THRESHOLD, 0); 584 583 585 585 - hvf_reset_vcpu(cpu); 586 586 - 587 584 x86cpu = X86_CPU(cpu); 588 585 x86cpu->env.xsave_buf = qemu_memalign(4096, 4096); 589 586 ··· 658 655 CPUX86State *env = &x86_cpu->env; 659 656 int ret = 0; 660 657 uint64_t rip = 0; 661 661 - 662 662 - cpu->halted = 0; 663 658 664 659 if (hvf_process_events(cpu)) { 665 660 return EXCP_HLT;

+1 -17

target/i386/hvf/x86_cpuid.c

··· 38 38 return (((uint64_t)edx) << 32) | eax; 39 39 } 40 40 41 41 - static bool vmx_mpx_supported() 42 42 - { 43 43 - uint64_t cap_exit, cap_entry; 44 44 - 45 45 - hv_vmx_read_capability(HV_VMX_CAP_ENTRY, &cap_entry); 46 46 - hv_vmx_read_capability(HV_VMX_CAP_EXIT, &cap_exit); 47 47 - 48 48 - return ((cap_exit & (1 << 23)) && (cap_entry & (1 << 16))); 49 49 - } 50 50 - 51 41 uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, 52 42 int reg) 53 43 { ··· 92 82 CPUID_7_0_EBX_CLFLUSHOPT | CPUID_7_0_EBX_CLWB | 93 83 CPUID_7_0_EBX_AVX512DQ | CPUID_7_0_EBX_SHA_NI | 94 84 CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512VL | 95 95 - CPUID_7_0_EBX_INVPCID | CPUID_7_0_EBX_MPX; 85 85 + CPUID_7_0_EBX_INVPCID; 96 86 97 97 - if (!vmx_mpx_supported()) { 98 98 - ebx &= ~CPUID_7_0_EBX_MPX; 99 99 - } 100 87 hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap); 101 88 if (!(cap & CPU_BASED2_INVPCID)) { 102 89 ebx &= ~CPUID_7_0_EBX_INVPCID; ··· 119 106 XSTATE_BNDCSR_MASK | XSTATE_OPMASK_MASK | 120 107 XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK); 121 108 eax &= supp_xcr0; 122 122 - if (!vmx_mpx_supported()) { 123 123 - eax &= ~(XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK); 124 124 - } 125 109 } else if (idx == 1) { 126 110 hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap); 127 111 eax &= CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1;

+1 -1

target/i386/hvf/x86_decode.c

··· 1642 1642 X86Seg seg = R_DS; 1643 1643 1644 1644 if (!decode->modrm.mod && 6 == decode->modrm.rm) { 1645 1645 - op->ptr = (uint16_t)decode->displacement; 1645 1645 + ptr = decode->displacement; 1646 1646 goto calc_addr; 1647 1647 } 1648 1648

-4

tests/Makefile.include

··· 798 798 rm $(INITRD_WORK_DIR)/init 799 799 rmdir $(INITRD_WORK_DIR) 800 800 801 801 - ifeq ($(CONFIG_POSIX),y) 802 802 - LIBS += -lutil 803 803 - endif 804 804 - 805 801 # QTest rules 806 802 807 803 TARGETS=$(patsubst %-softmmu,%, $(filter %-softmmu,$(TARGET_DIRS)))

+3 -2

tests/docker/dockerfiles/centos7.docker

··· 1 1 FROM centos:7 2 2 - RUN yum install -y epel-release centos-release-xen 2 2 + RUN yum install -y epel-release centos-release-xen-48 3 3 + 3 4 RUN yum -y update 4 5 ENV PACKAGES \ 5 6 bison \ ··· 8 9 ccache \ 9 10 csnappy-devel \ 10 11 flex \ 11 11 - g++ \ 12 12 + gcc-c++ \ 12 13 gcc \ 13 14 gettext \ 14 15 git \

+68 -36

tests/vhost-user-test.c

··· 51 51 #define VHOST_USER_F_PROTOCOL_FEATURES 30 52 52 #define VHOST_USER_PROTOCOL_F_MQ 0 53 53 #define VHOST_USER_PROTOCOL_F_LOG_SHMFD 1 54 54 + #define VHOST_USER_PROTOCOL_F_CROSS_ENDIAN 6 54 55 55 56 #define VHOST_LOG_PAGE 0x1000 56 57 ··· 186 187 } 187 188 } 188 189 189 189 - static void init_virtio_dev(TestServer *s, uint32_t features_mask) 190 190 + static void init_virtio_dev(QTestState *qts, TestServer *s, uint32_t features_mask) 190 191 { 191 192 uint32_t features; 192 193 int i; 193 194 194 194 - s->bus = qpci_init_pc(global_qtest, NULL); 195 195 + s->bus = qpci_init_pc(qts, NULL); 195 196 g_assert_nonnull(s->bus); 196 197 197 198 s->dev = qvirtio_pci_device_find(s->bus, VIRTIO_ID_NET); ··· 202 203 qvirtio_set_acknowledge(&s->dev->vdev); 203 204 qvirtio_set_driver(&s->dev->vdev); 204 205 205 205 - s->alloc = pc_alloc_init(global_qtest); 206 206 + s->alloc = pc_alloc_init(qts); 206 207 207 208 for (i = 0; i < s->queues * 2; i++) { 208 209 s->vq[i] = qvirtqueue_setup(&s->dev->vdev, s->alloc, i); ··· 227 228 qvirtio_pci_device_free(s->dev); 228 229 } 229 230 230 230 - static void wait_for_fds(TestServer *s) 231 231 + static bool wait_for_fds(TestServer *s) 231 232 { 232 233 gint64 end_time; 234 234 + bool got_region; 235 235 + int i; 233 236 234 237 g_mutex_lock(&s->data_mutex); 235 238 ··· 247 250 g_assert_cmpint(s->fds_num, ==, s->memory.nregions); 248 251 249 252 g_mutex_unlock(&s->data_mutex); 253 253 + 254 254 + got_region = false; 255 255 + for (i = 0; i < s->memory.nregions; ++i) { 256 256 + VhostUserMemoryRegion *reg = &s->memory.regions[i]; 257 257 + if (reg->guest_phys_addr == 0) { 258 258 + got_region = true; 259 259 + break; 260 260 + } 261 261 + } 262 262 + if (!got_region) { 263 263 + g_test_skip("No memory at address 0x0"); 264 264 + } 265 265 + return got_region; 250 266 } 251 267 252 252 - static void read_guest_mem_server(TestServer *s) 268 268 + static void read_guest_mem_server(QTestState *qts, TestServer *s) 253 269 { 254 254 - uint32_t *guest_mem; 270 270 + uint8_t *guest_mem; 255 271 int i, j; 256 272 size_t size; 257 257 - 258 258 - wait_for_fds(s); 259 273 260 274 g_mutex_lock(&s->data_mutex); 261 275 ··· 278 292 g_assert(guest_mem != MAP_FAILED); 279 293 guest_mem += (s->memory.regions[i].mmap_offset / sizeof(*guest_mem)); 280 294 281 281 - for (j = 0; j < 256; j++) { 282 282 - uint32_t a = readl(s->memory.regions[i].guest_phys_addr + j*4); 295 295 + for (j = 0; j < 1024; j++) { 296 296 + uint32_t a = qtest_readb(qts, s->memory.regions[i].guest_phys_addr + j); 283 297 uint32_t b = guest_mem[j]; 284 298 285 299 g_assert_cmpint(a, ==, b); ··· 367 381 msg.flags |= VHOST_USER_REPLY_MASK; 368 382 msg.size = sizeof(m.payload.u64); 369 383 msg.payload.u64 = 1 << VHOST_USER_PROTOCOL_F_LOG_SHMFD; 384 384 + msg.payload.u64 |= 1 << VHOST_USER_PROTOCOL_F_CROSS_ENDIAN; 370 385 if (s->queues > 1) { 371 386 msg.payload.u64 |= 1 << VHOST_USER_PROTOCOL_F_MQ; 372 387 } ··· 384 399 385 400 assert(msg.payload.state.index < s->queues * 2); 386 401 s->rings &= ~(0x1ULL << msg.payload.state.index); 402 402 + g_cond_broadcast(&s->data_cond); 387 403 break; 388 404 389 405 case VHOST_USER_SET_MEM_TABLE: ··· 393 409 G_N_ELEMENTS(s->fds)); 394 410 395 411 /* signal the test that it can continue */ 396 396 - g_cond_signal(&s->data_cond); 412 412 + g_cond_broadcast(&s->data_cond); 397 413 break; 398 414 399 415 case VHOST_USER_SET_VRING_KICK: ··· 419 435 p = (uint8_t *) &msg; 420 436 qemu_chr_fe_write_all(chr, p, VHOST_USER_HDR_SIZE); 421 437 422 422 - g_cond_signal(&s->data_cond); 438 438 + g_cond_broadcast(&s->data_cond); 423 439 break; 424 440 425 441 case VHOST_USER_SET_VRING_BASE: 426 442 assert(msg.payload.state.index < s->queues * 2); 427 443 s->rings |= 0x1ULL << msg.payload.state.index; 444 444 + g_cond_broadcast(&s->data_cond); 428 445 break; 429 446 430 447 case VHOST_USER_GET_QUEUE_NUM: ··· 573 590 int i, j; 574 591 size_t size; 575 592 576 576 - wait_for_fds(s); 577 577 - 578 593 /* iterate all regions */ 579 594 for (i = 0; i < s->fds_num; i++) { 580 595 ··· 655 670 s = qtest_start(qemu_cmd); 656 671 g_free(qemu_cmd); 657 672 658 658 - init_virtio_dev(server, 1u << VIRTIO_NET_F_MAC); 673 673 + init_virtio_dev(global_qtest, server, 1u << VIRTIO_NET_F_MAC); 674 674 + 675 675 + if (!wait_for_fds(server)) { 676 676 + goto exit; 677 677 + } 659 678 660 660 - read_guest_mem_server(server); 679 679 + read_guest_mem_server(global_qtest, server); 661 680 681 681 + exit: 662 682 uninit_virtio_dev(server); 663 683 664 684 qtest_quit(s); ··· 670 690 TestServer *s = test_server_new("src"); 671 691 TestServer *dest = test_server_new("dest"); 672 692 char *uri = g_strdup_printf("%s%s", "unix:", dest->mig_path); 673 673 - QTestState *global = global_qtest, *from, *to; 693 693 + QTestState *from, *to; 674 694 GSource *source; 675 695 gchar *cmd, *tmp; 676 696 QDict *rsp; ··· 684 704 from = qtest_start(cmd); 685 705 g_free(cmd); 686 706 687 687 - init_virtio_dev(s, 1u << VIRTIO_NET_F_MAC); 688 688 - init_virtio_dev(dest, 1u << VIRTIO_NET_F_MAC); 689 689 - wait_for_fds(s); 707 707 + init_virtio_dev(from, s, 1u << VIRTIO_NET_F_MAC); 708 708 + if (!wait_for_fds(s)) { 709 709 + goto exit; 710 710 + } 711 711 + 690 712 size = get_log_size(s); 691 713 g_assert_cmpint(size, ==, (2 * 1024 * 1024) / (VHOST_LOG_PAGE * 8)); 692 714 ··· 695 717 g_free(tmp); 696 718 to = qtest_init(cmd); 697 719 g_free(cmd); 720 720 + init_virtio_dev(to, dest, 1u << VIRTIO_NET_F_MAC); 698 721 699 722 source = g_source_new(&test_migrate_source_funcs, 700 723 sizeof(TestMigrateSource)); ··· 730 753 qobject_unref(rsp); 731 754 732 755 qmp_eventwait("STOP"); 733 733 - 734 734 - global_qtest = to; 735 735 - qmp_eventwait("RESUME"); 756 756 + qtest_qmp_eventwait(to, "RESUME"); 736 757 737 737 - read_guest_mem_server(dest); 758 758 + g_assert(wait_for_fds(dest)); 759 759 + read_guest_mem_server(to, dest); 738 760 739 739 - uninit_virtio_dev(s); 740 761 uninit_virtio_dev(dest); 762 762 + qtest_quit(to); 741 763 742 764 g_source_destroy(source); 743 765 g_source_unref(source); 744 766 745 745 - qtest_quit(to); 767 767 + exit: 768 768 + uninit_virtio_dev(s); 769 769 + 746 770 test_server_free(dest); 747 771 qtest_quit(from); 748 772 test_server_free(s); 749 773 g_free(uri); 750 750 - 751 751 - global_qtest = global; 752 774 } 753 775 754 776 static void wait_for_rings_started(TestServer *s, size_t count) ··· 805 827 qtest_start(cmd); 806 828 g_free(cmd); 807 829 808 808 - init_virtio_dev(s, 1u << VIRTIO_NET_F_MAC); 809 809 - wait_for_fds(s); 830 830 + init_virtio_dev(global_qtest, s, 1u << VIRTIO_NET_F_MAC); 831 831 + if (!wait_for_fds(s)) { 832 832 + goto exit; 833 833 + } 834 834 + 810 835 wait_for_rings_started(s, 2); 811 836 812 837 /* reconnect */ 813 838 s->fds_num = 0; 814 839 s->rings = 0; 815 840 g_idle_add(reconnect_cb, s); 816 816 - wait_for_fds(s); 841 841 + g_assert(wait_for_fds(s)); 817 842 wait_for_rings_started(s, 2); 818 843 844 844 + exit: 819 845 uninit_virtio_dev(s); 820 846 821 847 qtest_end(); ··· 843 869 qtest_start(cmd); 844 870 g_free(cmd); 845 871 846 846 - init_virtio_dev(s, 1u << VIRTIO_NET_F_MAC); 847 847 - wait_for_fds(s); 872 872 + init_virtio_dev(global_qtest, s, 1u << VIRTIO_NET_F_MAC); 873 873 + if (!wait_for_fds(s)) { 874 874 + goto exit; 875 875 + } 848 876 wait_for_rings_started(s, 2); 849 877 878 878 + exit: 850 879 uninit_virtio_dev(s); 851 880 852 881 qtest_end(); ··· 873 902 qtest_start(cmd); 874 903 g_free(cmd); 875 904 876 876 - init_virtio_dev(s, 1u << VIRTIO_NET_F_MAC); 877 877 - wait_for_fds(s); 905 905 + init_virtio_dev(global_qtest, s, 1u << VIRTIO_NET_F_MAC); 906 906 + if (!wait_for_fds(s)) { 907 907 + goto exit; 908 908 + } 878 909 wait_for_rings_started(s, 2); 879 910 911 911 + exit: 880 912 uninit_virtio_dev(s); 881 913 882 914 qtest_end(); ··· 921 953 qtest_start(cmd); 922 954 g_free(cmd); 923 955 924 924 - init_virtio_dev(s, features_mask); 956 956 + init_virtio_dev(global_qtest, s, features_mask); 925 957 926 958 wait_for_rings_started(s, s->queues * 2); 927 959

+125 -125

ui/vnc-enc-hextile-template.h

··· 30 30 int n_subtiles = 0; 31 31 32 32 for (j = 0; j < h; j++) { 33 33 - for (i = 0; i < w; i++) { 34 34 - switch (n_colors) { 35 35 - case 0: 36 36 - bg = irow[i]; 37 37 - n_colors = 1; 38 38 - break; 39 39 - case 1: 40 40 - if (irow[i] != bg) { 41 41 - fg = irow[i]; 42 42 - n_colors = 2; 43 43 - } 44 44 - break; 45 45 - case 2: 46 46 - if (irow[i] != bg && irow[i] != fg) { 47 47 - n_colors = 3; 48 48 - } else { 49 49 - if (irow[i] == bg) 50 50 - bg_count++; 51 51 - else if (irow[i] == fg) 52 52 - fg_count++; 53 53 - } 54 54 - break; 55 55 - default: 56 56 - break; 57 57 - } 58 58 - } 59 59 - if (n_colors > 2) 60 60 - break; 61 61 - irow += vnc_server_fb_stride(vd) / sizeof(pixel_t); 33 33 + for (i = 0; i < w; i++) { 34 34 + switch (n_colors) { 35 35 + case 0: 36 36 + bg = irow[i]; 37 37 + n_colors = 1; 38 38 + break; 39 39 + case 1: 40 40 + if (irow[i] != bg) { 41 41 + fg = irow[i]; 42 42 + n_colors = 2; 43 43 + } 44 44 + break; 45 45 + case 2: 46 46 + if (irow[i] != bg && irow[i] != fg) { 47 47 + n_colors = 3; 48 48 + } else { 49 49 + if (irow[i] == bg) 50 50 + bg_count++; 51 51 + else if (irow[i] == fg) 52 52 + fg_count++; 53 53 + } 54 54 + break; 55 55 + default: 56 56 + break; 57 57 + } 58 58 + } 59 59 + if (n_colors > 2) 60 60 + break; 61 61 + irow += vnc_server_fb_stride(vd) / sizeof(pixel_t); 62 62 } 63 63 64 64 if (n_colors > 1 && fg_count > bg_count) { 65 65 - pixel_t tmp = fg; 66 66 - fg = bg; 67 67 - bg = tmp; 65 65 + pixel_t tmp = fg; 66 66 + fg = bg; 67 67 + bg = tmp; 68 68 } 69 69 70 70 if (!*has_bg || *last_bg != bg) { 71 71 - flags |= 0x02; 72 72 - *has_bg = 1; 73 73 - *last_bg = bg; 71 71 + flags |= 0x02; 72 72 + *has_bg = 1; 73 73 + *last_bg = bg; 74 74 } 75 75 76 76 if (n_colors < 3 && (!*has_fg || *last_fg != fg)) { 77 77 - flags |= 0x04; 78 78 - *has_fg = 1; 79 79 - *last_fg = fg; 77 77 + flags |= 0x04; 78 78 + *has_fg = 1; 79 79 + *last_fg = fg; 80 80 } 81 81 82 82 switch (n_colors) { 83 83 case 1: 84 84 - n_data = 0; 85 85 - break; 84 84 + n_data = 0; 85 85 + break; 86 86 case 2: 87 87 - flags |= 0x08; 87 87 + flags |= 0x08; 88 88 89 89 - irow = (pixel_t *)row; 89 89 + irow = (pixel_t *)row; 90 90 91 91 - for (j = 0; j < h; j++) { 92 92 - int min_x = -1; 93 93 - for (i = 0; i < w; i++) { 94 94 - if (irow[i] == fg) { 95 95 - if (min_x == -1) 96 96 - min_x = i; 97 97 - } else if (min_x != -1) { 98 98 - hextile_enc_cord(data + n_data, min_x, j, i - min_x, 1); 99 99 - n_data += 2; 100 100 - n_subtiles++; 101 101 - min_x = -1; 102 102 - } 103 103 - } 104 104 - if (min_x != -1) { 105 105 - hextile_enc_cord(data + n_data, min_x, j, i - min_x, 1); 106 106 - n_data += 2; 107 107 - n_subtiles++; 108 108 - } 109 109 - irow += vnc_server_fb_stride(vd) / sizeof(pixel_t); 110 110 - } 111 111 - break; 91 91 + for (j = 0; j < h; j++) { 92 92 + int min_x = -1; 93 93 + for (i = 0; i < w; i++) { 94 94 + if (irow[i] == fg) { 95 95 + if (min_x == -1) 96 96 + min_x = i; 97 97 + } else if (min_x != -1) { 98 98 + hextile_enc_cord(data + n_data, min_x, j, i - min_x, 1); 99 99 + n_data += 2; 100 100 + n_subtiles++; 101 101 + min_x = -1; 102 102 + } 103 103 + } 104 104 + if (min_x != -1) { 105 105 + hextile_enc_cord(data + n_data, min_x, j, i - min_x, 1); 106 106 + n_data += 2; 107 107 + n_subtiles++; 108 108 + } 109 109 + irow += vnc_server_fb_stride(vd) / sizeof(pixel_t); 110 110 + } 111 111 + break; 112 112 case 3: 113 113 - flags |= 0x18; 113 113 + flags |= 0x18; 114 114 115 115 - irow = (pixel_t *)row; 115 115 + irow = (pixel_t *)row; 116 116 117 117 - if (!*has_bg || *last_bg != bg) 118 118 - flags |= 0x02; 117 117 + if (!*has_bg || *last_bg != bg) 118 118 + flags |= 0x02; 119 119 120 120 - for (j = 0; j < h; j++) { 121 121 - int has_color = 0; 122 122 - int min_x = -1; 123 123 - pixel_t color = 0; /* shut up gcc */ 120 120 + for (j = 0; j < h; j++) { 121 121 + int has_color = 0; 122 122 + int min_x = -1; 123 123 + pixel_t color = 0; /* shut up gcc */ 124 124 125 125 - for (i = 0; i < w; i++) { 126 126 - if (!has_color) { 127 127 - if (irow[i] == bg) 128 128 - continue; 129 129 - color = irow[i]; 130 130 - min_x = i; 131 131 - has_color = 1; 132 132 - } else if (irow[i] != color) { 133 133 - has_color = 0; 125 125 + for (i = 0; i < w; i++) { 126 126 + if (!has_color) { 127 127 + if (irow[i] == bg) 128 128 + continue; 129 129 + color = irow[i]; 130 130 + min_x = i; 131 131 + has_color = 1; 132 132 + } else if (irow[i] != color) { 133 133 + has_color = 0; 134 134 #ifdef GENERIC 135 135 vnc_convert_pixel(vs, data + n_data, color); 136 136 n_data += vs->client_pf.bytes_per_pixel; 137 137 #else 138 138 - memcpy(data + n_data, &color, sizeof(color)); 138 138 + memcpy(data + n_data, &color, sizeof(color)); 139 139 n_data += sizeof(pixel_t); 140 140 #endif 141 141 - hextile_enc_cord(data + n_data, min_x, j, i - min_x, 1); 142 142 - n_data += 2; 143 143 - n_subtiles++; 141 141 + hextile_enc_cord(data + n_data, min_x, j, i - min_x, 1); 142 142 + n_data += 2; 143 143 + n_subtiles++; 144 144 145 145 - min_x = -1; 146 146 - if (irow[i] != bg) { 147 147 - color = irow[i]; 148 148 - min_x = i; 149 149 - has_color = 1; 150 150 - } 151 151 - } 152 152 - } 153 153 - if (has_color) { 145 145 + min_x = -1; 146 146 + if (irow[i] != bg) { 147 147 + color = irow[i]; 148 148 + min_x = i; 149 149 + has_color = 1; 150 150 + } 151 151 + } 152 152 + } 153 153 + if (has_color) { 154 154 #ifdef GENERIC 155 155 vnc_convert_pixel(vs, data + n_data, color); 156 156 n_data += vs->client_pf.bytes_per_pixel; ··· 158 158 memcpy(data + n_data, &color, sizeof(color)); 159 159 n_data += sizeof(pixel_t); 160 160 #endif 161 161 - hextile_enc_cord(data + n_data, min_x, j, i - min_x, 1); 162 162 - n_data += 2; 163 163 - n_subtiles++; 164 164 - } 165 165 - irow += vnc_server_fb_stride(vd) / sizeof(pixel_t); 166 166 - } 161 161 + hextile_enc_cord(data + n_data, min_x, j, i - min_x, 1); 162 162 + n_data += 2; 163 163 + n_subtiles++; 164 164 + } 165 165 + irow += vnc_server_fb_stride(vd) / sizeof(pixel_t); 166 166 + } 167 167 168 168 - /* A SubrectsColoured subtile invalidates the foreground color */ 169 169 - *has_fg = 0; 170 170 - if (n_data > (w * h * sizeof(pixel_t))) { 171 171 - n_colors = 4; 172 172 - flags = 0x01; 173 173 - *has_bg = 0; 168 168 + /* A SubrectsColoured subtile invalidates the foreground color */ 169 169 + *has_fg = 0; 170 170 + if (n_data > (w * h * sizeof(pixel_t))) { 171 171 + n_colors = 4; 172 172 + flags = 0x01; 173 173 + *has_bg = 0; 174 174 175 175 - /* we really don't have to invalidate either the bg or fg 176 176 - but we've lost the old values. oh well. */ 177 177 - } 175 175 + /* we really don't have to invalidate either the bg or fg 176 176 + but we've lost the old values. oh well. */ 177 177 + } 178 178 break; 179 179 default: 180 180 - break; 180 180 + break; 181 181 } 182 182 183 183 if (n_colors > 3) { 184 184 - flags = 0x01; 185 185 - *has_fg = 0; 186 186 - *has_bg = 0; 187 187 - n_colors = 4; 184 184 + flags = 0x01; 185 185 + *has_fg = 0; 186 186 + *has_bg = 0; 187 187 + n_colors = 4; 188 188 } 189 189 190 190 vnc_write_u8(vs, flags); 191 191 if (n_colors < 4) { 192 192 - if (flags & 0x02) 193 193 - vs->write_pixels(vs, last_bg, sizeof(pixel_t)); 194 194 - if (flags & 0x04) 195 195 - vs->write_pixels(vs, last_fg, sizeof(pixel_t)); 196 196 - if (n_subtiles) { 197 197 - vnc_write_u8(vs, n_subtiles); 198 198 - vnc_write(vs, data, n_data); 199 199 - } 192 192 + if (flags & 0x02) 193 193 + vs->write_pixels(vs, last_bg, sizeof(pixel_t)); 194 194 + if (flags & 0x04) 195 195 + vs->write_pixels(vs, last_fg, sizeof(pixel_t)); 196 196 + if (n_subtiles) { 197 197 + vnc_write_u8(vs, n_subtiles); 198 198 + vnc_write(vs, data, n_data); 199 199 + } 200 200 } else { 201 201 - for (j = 0; j < h; j++) { 202 202 - vs->write_pixels(vs, row, w * 4); 203 203 - row += vnc_server_fb_stride(vd); 204 204 - } 201 201 + for (j = 0; j < h; j++) { 202 202 + vs->write_pixels(vs, row, w * 4); 203 203 + row += vnc_server_fb_stride(vd); 204 204 + } 205 205 } 206 206 } 207 207

+196 -196

ui/vnc-enc-zywrle.h

··· 48 48 #ifndef ZYWRLE_QUANTIZE 49 49 /* Type A:lower bit omitting of EZW style. */ 50 50 static const unsigned int zywrle_param[3][3]={ 51 51 - {0x0000F000, 0x00000000, 0x00000000}, 52 52 - {0x0000C000, 0x00F0F0F0, 0x00000000}, 53 53 - {0x0000C000, 0x00C0C0C0, 0x00F0F0F0}, 51 51 + {0x0000F000, 0x00000000, 0x00000000}, 52 52 + {0x0000C000, 0x00F0F0F0, 0x00000000}, 53 53 + {0x0000C000, 0x00C0C0C0, 0x00F0F0F0}, 54 54 /* {0x0000FF00, 0x00000000, 0x00000000}, 55 55 - {0x0000FF00, 0x00FFFFFF, 0x00000000}, 56 56 - {0x0000FF00, 0x00FFFFFF, 0x00FFFFFF}, */ 55 55 + {0x0000FF00, 0x00FFFFFF, 0x00000000}, 56 56 + {0x0000FF00, 0x00FFFFFF, 0x00FFFFFF}, */ 57 57 }; 58 58 #else 59 59 /* Type B:Non liner quantization filter. */ 60 60 static const int8_t zywrle_conv[4][256]={ 61 61 { /* bi=5, bo=5 r=0.0:PSNR=24.849 */ 62 62 - 0, 0, 0, 0, 0, 0, 0, 0, 63 63 - 0, 0, 0, 0, 0, 0, 0, 0, 64 64 - 0, 0, 0, 0, 0, 0, 0, 0, 65 65 - 0, 0, 0, 0, 0, 0, 0, 0, 66 66 - 0, 0, 0, 0, 0, 0, 0, 0, 67 67 - 0, 0, 0, 0, 0, 0, 0, 0, 68 68 - 0, 0, 0, 0, 0, 0, 0, 0, 69 69 - 0, 0, 0, 0, 0, 0, 0, 0, 70 70 - 0, 0, 0, 0, 0, 0, 0, 0, 71 71 - 0, 0, 0, 0, 0, 0, 0, 0, 72 72 - 0, 0, 0, 0, 0, 0, 0, 0, 73 73 - 0, 0, 0, 0, 0, 0, 0, 0, 74 74 - 0, 0, 0, 0, 0, 0, 0, 0, 75 75 - 0, 0, 0, 0, 0, 0, 0, 0, 76 76 - 0, 0, 0, 0, 0, 0, 0, 0, 77 77 - 0, 0, 0, 0, 0, 0, 0, 0, 78 78 - 0, 0, 0, 0, 0, 0, 0, 0, 79 79 - 0, 0, 0, 0, 0, 0, 0, 0, 80 80 - 0, 0, 0, 0, 0, 0, 0, 0, 81 81 - 0, 0, 0, 0, 0, 0, 0, 0, 82 82 - 0, 0, 0, 0, 0, 0, 0, 0, 83 83 - 0, 0, 0, 0, 0, 0, 0, 0, 84 84 - 0, 0, 0, 0, 0, 0, 0, 0, 85 85 - 0, 0, 0, 0, 0, 0, 0, 0, 86 86 - 0, 0, 0, 0, 0, 0, 0, 0, 87 87 - 0, 0, 0, 0, 0, 0, 0, 0, 88 88 - 0, 0, 0, 0, 0, 0, 0, 0, 89 89 - 0, 0, 0, 0, 0, 0, 0, 0, 90 90 - 0, 0, 0, 0, 0, 0, 0, 0, 91 91 - 0, 0, 0, 0, 0, 0, 0, 0, 92 92 - 0, 0, 0, 0, 0, 0, 0, 0, 93 93 - 0, 0, 0, 0, 0, 0, 0, 0, 62 62 + 0, 0, 0, 0, 0, 0, 0, 0, 63 63 + 0, 0, 0, 0, 0, 0, 0, 0, 64 64 + 0, 0, 0, 0, 0, 0, 0, 0, 65 65 + 0, 0, 0, 0, 0, 0, 0, 0, 66 66 + 0, 0, 0, 0, 0, 0, 0, 0, 67 67 + 0, 0, 0, 0, 0, 0, 0, 0, 68 68 + 0, 0, 0, 0, 0, 0, 0, 0, 69 69 + 0, 0, 0, 0, 0, 0, 0, 0, 70 70 + 0, 0, 0, 0, 0, 0, 0, 0, 71 71 + 0, 0, 0, 0, 0, 0, 0, 0, 72 72 + 0, 0, 0, 0, 0, 0, 0, 0, 73 73 + 0, 0, 0, 0, 0, 0, 0, 0, 74 74 + 0, 0, 0, 0, 0, 0, 0, 0, 75 75 + 0, 0, 0, 0, 0, 0, 0, 0, 76 76 + 0, 0, 0, 0, 0, 0, 0, 0, 77 77 + 0, 0, 0, 0, 0, 0, 0, 0, 78 78 + 0, 0, 0, 0, 0, 0, 0, 0, 79 79 + 0, 0, 0, 0, 0, 0, 0, 0, 80 80 + 0, 0, 0, 0, 0, 0, 0, 0, 81 81 + 0, 0, 0, 0, 0, 0, 0, 0, 82 82 + 0, 0, 0, 0, 0, 0, 0, 0, 83 83 + 0, 0, 0, 0, 0, 0, 0, 0, 84 84 + 0, 0, 0, 0, 0, 0, 0, 0, 85 85 + 0, 0, 0, 0, 0, 0, 0, 0, 86 86 + 0, 0, 0, 0, 0, 0, 0, 0, 87 87 + 0, 0, 0, 0, 0, 0, 0, 0, 88 88 + 0, 0, 0, 0, 0, 0, 0, 0, 89 89 + 0, 0, 0, 0, 0, 0, 0, 0, 90 90 + 0, 0, 0, 0, 0, 0, 0, 0, 91 91 + 0, 0, 0, 0, 0, 0, 0, 0, 92 92 + 0, 0, 0, 0, 0, 0, 0, 0, 93 93 + 0, 0, 0, 0, 0, 0, 0, 0, 94 94 }, 95 95 { /* bi=5, bo=5 r=2.0:PSNR=74.031 */ 96 96 - 0, 0, 0, 0, 0, 0, 0, 0, 97 97 - 0, 0, 0, 0, 0, 0, 0, 0, 98 98 - 0, 0, 0, 0, 0, 0, 0, 32, 99 99 - 32, 32, 32, 32, 32, 32, 32, 32, 100 100 - 32, 32, 32, 32, 32, 32, 32, 32, 101 101 - 48, 48, 48, 48, 48, 48, 48, 48, 102 102 - 48, 48, 48, 56, 56, 56, 56, 56, 103 103 - 56, 56, 56, 56, 64, 64, 64, 64, 104 104 - 64, 64, 64, 64, 72, 72, 72, 72, 105 105 - 72, 72, 72, 72, 80, 80, 80, 80, 106 106 - 80, 80, 88, 88, 88, 88, 88, 88, 107 107 - 88, 88, 88, 88, 88, 88, 96, 96, 108 108 - 96, 96, 96, 104, 104, 104, 104, 104, 109 109 - 104, 104, 104, 104, 104, 112, 112, 112, 110 110 - 112, 112, 112, 112, 112, 112, 120, 120, 111 111 - 120, 120, 120, 120, 120, 120, 120, 120, 112 112 - 0, -120, -120, -120, -120, -120, -120, -120, 113 113 - -120, -120, -120, -112, -112, -112, -112, -112, 114 114 - -112, -112, -112, -112, -104, -104, -104, -104, 115 115 - -104, -104, -104, -104, -104, -104, -96, -96, 116 116 - -96, -96, -96, -88, -88, -88, -88, -88, 117 117 - -88, -88, -88, -88, -88, -88, -88, -80, 118 118 - -80, -80, -80, -80, -80, -72, -72, -72, 119 119 - -72, -72, -72, -72, -72, -64, -64, -64, 120 120 - -64, -64, -64, -64, -64, -56, -56, -56, 121 121 - -56, -56, -56, -56, -56, -56, -48, -48, 122 122 - -48, -48, -48, -48, -48, -48, -48, -48, 123 123 - -48, -32, -32, -32, -32, -32, -32, -32, 124 124 - -32, -32, -32, -32, -32, -32, -32, -32, 125 125 - -32, -32, 0, 0, 0, 0, 0, 0, 126 126 - 0, 0, 0, 0, 0, 0, 0, 0, 127 127 - 0, 0, 0, 0, 0, 0, 0, 0, 96 96 + 0, 0, 0, 0, 0, 0, 0, 0, 97 97 + 0, 0, 0, 0, 0, 0, 0, 0, 98 98 + 0, 0, 0, 0, 0, 0, 0, 32, 99 99 + 32, 32, 32, 32, 32, 32, 32, 32, 100 100 + 32, 32, 32, 32, 32, 32, 32, 32, 101 101 + 48, 48, 48, 48, 48, 48, 48, 48, 102 102 + 48, 48, 48, 56, 56, 56, 56, 56, 103 103 + 56, 56, 56, 56, 64, 64, 64, 64, 104 104 + 64, 64, 64, 64, 72, 72, 72, 72, 105 105 + 72, 72, 72, 72, 80, 80, 80, 80, 106 106 + 80, 80, 88, 88, 88, 88, 88, 88, 107 107 + 88, 88, 88, 88, 88, 88, 96, 96, 108 108 + 96, 96, 96, 104, 104, 104, 104, 104, 109 109 + 104, 104, 104, 104, 104, 112, 112, 112, 110 110 + 112, 112, 112, 112, 112, 112, 120, 120, 111 111 + 120, 120, 120, 120, 120, 120, 120, 120, 112 112 + 0, -120, -120, -120, -120, -120, -120, -120, 113 113 + -120, -120, -120, -112, -112, -112, -112, -112, 114 114 + -112, -112, -112, -112, -104, -104, -104, -104, 115 115 + -104, -104, -104, -104, -104, -104, -96, -96, 116 116 + -96, -96, -96, -88, -88, -88, -88, -88, 117 117 + -88, -88, -88, -88, -88, -88, -88, -80, 118 118 + -80, -80, -80, -80, -80, -72, -72, -72, 119 119 + -72, -72, -72, -72, -72, -64, -64, -64, 120 120 + -64, -64, -64, -64, -64, -56, -56, -56, 121 121 + -56, -56, -56, -56, -56, -56, -48, -48, 122 122 + -48, -48, -48, -48, -48, -48, -48, -48, 123 123 + -48, -32, -32, -32, -32, -32, -32, -32, 124 124 + -32, -32, -32, -32, -32, -32, -32, -32, 125 125 + -32, -32, 0, 0, 0, 0, 0, 0, 126 126 + 0, 0, 0, 0, 0, 0, 0, 0, 127 127 + 0, 0, 0, 0, 0, 0, 0, 0, 128 128 }, 129 129 { /* bi=5, bo=4 r=2.0:PSNR=64.441 */ 130 130 - 0, 0, 0, 0, 0, 0, 0, 0, 131 131 - 0, 0, 0, 0, 0, 0, 0, 0, 132 132 - 0, 0, 0, 0, 0, 0, 0, 0, 133 133 - 0, 0, 0, 0, 0, 0, 0, 0, 134 134 - 48, 48, 48, 48, 48, 48, 48, 48, 135 135 - 48, 48, 48, 48, 48, 48, 48, 48, 136 136 - 48, 48, 48, 48, 48, 48, 48, 48, 137 137 - 64, 64, 64, 64, 64, 64, 64, 64, 138 138 - 64, 64, 64, 64, 64, 64, 64, 64, 139 139 - 80, 80, 80, 80, 80, 80, 80, 80, 140 140 - 80, 80, 80, 80, 80, 88, 88, 88, 141 141 - 88, 88, 88, 88, 88, 88, 88, 88, 142 142 - 104, 104, 104, 104, 104, 104, 104, 104, 143 143 - 104, 104, 104, 112, 112, 112, 112, 112, 144 144 - 112, 112, 112, 112, 120, 120, 120, 120, 145 145 - 120, 120, 120, 120, 120, 120, 120, 120, 146 146 - 0, -120, -120, -120, -120, -120, -120, -120, 147 147 - -120, -120, -120, -120, -120, -112, -112, -112, 148 148 - -112, -112, -112, -112, -112, -112, -104, -104, 149 149 - -104, -104, -104, -104, -104, -104, -104, -104, 150 150 - -104, -88, -88, -88, -88, -88, -88, -88, 151 151 - -88, -88, -88, -88, -80, -80, -80, -80, 152 152 - -80, -80, -80, -80, -80, -80, -80, -80, 153 153 - -80, -64, -64, -64, -64, -64, -64, -64, 154 154 - -64, -64, -64, -64, -64, -64, -64, -64, 155 155 - -64, -48, -48, -48, -48, -48, -48, -48, 156 156 - -48, -48, -48, -48, -48, -48, -48, -48, 157 157 - -48, -48, -48, -48, -48, -48, -48, -48, 158 158 - -48, 0, 0, 0, 0, 0, 0, 0, 159 159 - 0, 0, 0, 0, 0, 0, 0, 0, 160 160 - 0, 0, 0, 0, 0, 0, 0, 0, 161 161 - 0, 0, 0, 0, 0, 0, 0, 0, 130 130 + 0, 0, 0, 0, 0, 0, 0, 0, 131 131 + 0, 0, 0, 0, 0, 0, 0, 0, 132 132 + 0, 0, 0, 0, 0, 0, 0, 0, 133 133 + 0, 0, 0, 0, 0, 0, 0, 0, 134 134 + 48, 48, 48, 48, 48, 48, 48, 48, 135 135 + 48, 48, 48, 48, 48, 48, 48, 48, 136 136 + 48, 48, 48, 48, 48, 48, 48, 48, 137 137 + 64, 64, 64, 64, 64, 64, 64, 64, 138 138 + 64, 64, 64, 64, 64, 64, 64, 64, 139 139 + 80, 80, 80, 80, 80, 80, 80, 80, 140 140 + 80, 80, 80, 80, 80, 88, 88, 88, 141 141 + 88, 88, 88, 88, 88, 88, 88, 88, 142 142 + 104, 104, 104, 104, 104, 104, 104, 104, 143 143 + 104, 104, 104, 112, 112, 112, 112, 112, 144 144 + 112, 112, 112, 112, 120, 120, 120, 120, 145 145 + 120, 120, 120, 120, 120, 120, 120, 120, 146 146 + 0, -120, -120, -120, -120, -120, -120, -120, 147 147 + -120, -120, -120, -120, -120, -112, -112, -112, 148 148 + -112, -112, -112, -112, -112, -112, -104, -104, 149 149 + -104, -104, -104, -104, -104, -104, -104, -104, 150 150 + -104, -88, -88, -88, -88, -88, -88, -88, 151 151 + -88, -88, -88, -88, -80, -80, -80, -80, 152 152 + -80, -80, -80, -80, -80, -80, -80, -80, 153 153 + -80, -64, -64, -64, -64, -64, -64, -64, 154 154 + -64, -64, -64, -64, -64, -64, -64, -64, 155 155 + -64, -48, -48, -48, -48, -48, -48, -48, 156 156 + -48, -48, -48, -48, -48, -48, -48, -48, 157 157 + -48, -48, -48, -48, -48, -48, -48, -48, 158 158 + -48, 0, 0, 0, 0, 0, 0, 0, 159 159 + 0, 0, 0, 0, 0, 0, 0, 0, 160 160 + 0, 0, 0, 0, 0, 0, 0, 0, 161 161 + 0, 0, 0, 0, 0, 0, 0, 0, 162 162 }, 163 163 { /* bi=5, bo=2 r=2.0:PSNR=43.175 */ 164 164 - 0, 0, 0, 0, 0, 0, 0, 0, 165 165 - 0, 0, 0, 0, 0, 0, 0, 0, 166 166 - 0, 0, 0, 0, 0, 0, 0, 0, 167 167 - 0, 0, 0, 0, 0, 0, 0, 0, 168 168 - 0, 0, 0, 0, 0, 0, 0, 0, 169 169 - 0, 0, 0, 0, 0, 0, 0, 0, 170 170 - 0, 0, 0, 0, 0, 0, 0, 0, 171 171 - 0, 0, 0, 0, 0, 0, 0, 0, 172 172 - 88, 88, 88, 88, 88, 88, 88, 88, 173 173 - 88, 88, 88, 88, 88, 88, 88, 88, 174 174 - 88, 88, 88, 88, 88, 88, 88, 88, 175 175 - 88, 88, 88, 88, 88, 88, 88, 88, 176 176 - 88, 88, 88, 88, 88, 88, 88, 88, 177 177 - 88, 88, 88, 88, 88, 88, 88, 88, 178 178 - 88, 88, 88, 88, 88, 88, 88, 88, 179 179 - 88, 88, 88, 88, 88, 88, 88, 88, 180 180 - 0, -88, -88, -88, -88, -88, -88, -88, 181 181 - -88, -88, -88, -88, -88, -88, -88, -88, 182 182 - -88, -88, -88, -88, -88, -88, -88, -88, 183 183 - -88, -88, -88, -88, -88, -88, -88, -88, 184 184 - -88, -88, -88, -88, -88, -88, -88, -88, 185 185 - -88, -88, -88, -88, -88, -88, -88, -88, 186 186 - -88, -88, -88, -88, -88, -88, -88, -88, 187 187 - -88, -88, -88, -88, -88, -88, -88, -88, 188 188 - -88, 0, 0, 0, 0, 0, 0, 0, 189 189 - 0, 0, 0, 0, 0, 0, 0, 0, 190 190 - 0, 0, 0, 0, 0, 0, 0, 0, 191 191 - 0, 0, 0, 0, 0, 0, 0, 0, 192 192 - 0, 0, 0, 0, 0, 0, 0, 0, 193 193 - 0, 0, 0, 0, 0, 0, 0, 0, 194 194 - 0, 0, 0, 0, 0, 0, 0, 0, 195 195 - 0, 0, 0, 0, 0, 0, 0, 0, 164 164 + 0, 0, 0, 0, 0, 0, 0, 0, 165 165 + 0, 0, 0, 0, 0, 0, 0, 0, 166 166 + 0, 0, 0, 0, 0, 0, 0, 0, 167 167 + 0, 0, 0, 0, 0, 0, 0, 0, 168 168 + 0, 0, 0, 0, 0, 0, 0, 0, 169 169 + 0, 0, 0, 0, 0, 0, 0, 0, 170 170 + 0, 0, 0, 0, 0, 0, 0, 0, 171 171 + 0, 0, 0, 0, 0, 0, 0, 0, 172 172 + 88, 88, 88, 88, 88, 88, 88, 88, 173 173 + 88, 88, 88, 88, 88, 88, 88, 88, 174 174 + 88, 88, 88, 88, 88, 88, 88, 88, 175 175 + 88, 88, 88, 88, 88, 88, 88, 88, 176 176 + 88, 88, 88, 88, 88, 88, 88, 88, 177 177 + 88, 88, 88, 88, 88, 88, 88, 88, 178 178 + 88, 88, 88, 88, 88, 88, 88, 88, 179 179 + 88, 88, 88, 88, 88, 88, 88, 88, 180 180 + 0, -88, -88, -88, -88, -88, -88, -88, 181 181 + -88, -88, -88, -88, -88, -88, -88, -88, 182 182 + -88, -88, -88, -88, -88, -88, -88, -88, 183 183 + -88, -88, -88, -88, -88, -88, -88, -88, 184 184 + -88, -88, -88, -88, -88, -88, -88, -88, 185 185 + -88, -88, -88, -88, -88, -88, -88, -88, 186 186 + -88, -88, -88, -88, -88, -88, -88, -88, 187 187 + -88, -88, -88, -88, -88, -88, -88, -88, 188 188 + -88, 0, 0, 0, 0, 0, 0, 0, 189 189 + 0, 0, 0, 0, 0, 0, 0, 0, 190 190 + 0, 0, 0, 0, 0, 0, 0, 0, 191 191 + 0, 0, 0, 0, 0, 0, 0, 0, 192 192 + 0, 0, 0, 0, 0, 0, 0, 0, 193 193 + 0, 0, 0, 0, 0, 0, 0, 0, 194 194 + 0, 0, 0, 0, 0, 0, 0, 0, 195 195 + 0, 0, 0, 0, 0, 0, 0, 0, 196 196 } 197 197 }; 198 198 199 199 static const int8_t *zywrle_param[3][3][3]={ 200 200 - {{zywrle_conv[0], zywrle_conv[2], zywrle_conv[0]}, 200 200 + {{zywrle_conv[0], zywrle_conv[2], zywrle_conv[0]}, 201 201 {zywrle_conv[0], zywrle_conv[0], zywrle_conv[0]}, 202 202 {zywrle_conv[0], zywrle_conv[0], zywrle_conv[0]}}, 203 203 - {{zywrle_conv[0], zywrle_conv[3], zywrle_conv[0]}, 203 203 + {{zywrle_conv[0], zywrle_conv[3], zywrle_conv[0]}, 204 204 {zywrle_conv[1], zywrle_conv[1], zywrle_conv[1]}, 205 205 {zywrle_conv[0], zywrle_conv[0], zywrle_conv[0]}}, 206 206 - {{zywrle_conv[0], zywrle_conv[3], zywrle_conv[0]}, 206 206 + {{zywrle_conv[0], zywrle_conv[3], zywrle_conv[0]}, 207 207 {zywrle_conv[2], zywrle_conv[2], zywrle_conv[2]}, 208 208 {zywrle_conv[1], zywrle_conv[1], zywrle_conv[1]}}, 209 209 }; ··· 214 214 #define ZYWRLE_UVMASK15 0xFFFFFFF8 215 215 #define ZYWRLE_LOAD_PIXEL15(src, r, g, b) \ 216 216 do { \ 217 217 - r = (((uint8_t*)src)[S_1]<< 1)& 0xF8; \ 218 218 - g = (((uint8_t*)src)[S_1]<< 6) | (((uint8_t*)src)[S_0]>> 2); \ 217 217 + r = (((uint8_t*)src)[S_1]<< 1)& 0xF8; \ 218 218 + g = (((uint8_t*)src)[S_1]<< 6) | (((uint8_t*)src)[S_0]>> 2); \ 219 219 g &= 0xF8; \ 220 220 - b = (((uint8_t*)src)[S_0]<< 3)& 0xF8; \ 220 220 + b = (((uint8_t*)src)[S_0]<< 3)& 0xF8; \ 221 221 } while (0) 222 222 223 223 #define ZYWRLE_SAVE_PIXEL15(dst, r, g, b) \ 224 224 do { \ 225 225 - r &= 0xF8; \ 226 226 - g &= 0xF8; \ 227 227 - b &= 0xF8; \ 228 228 - ((uint8_t*)dst)[S_1] = (uint8_t)((r >> 1)|(g >> 6)); \ 229 229 - ((uint8_t*)dst)[S_0] = (uint8_t)(((b >> 3)|(g << 2))& 0xFF); \ 225 225 + r &= 0xF8; \ 226 226 + g &= 0xF8; \ 227 227 + b &= 0xF8; \ 228 228 + ((uint8_t*)dst)[S_1] = (uint8_t)((r >> 1)|(g >> 6)); \ 229 229 + ((uint8_t*)dst)[S_0] = (uint8_t)(((b >> 3)|(g << 2))& 0xFF); \ 230 230 } while (0) 231 231 232 232 #define ZYWRLE_YMASK16 0xFFFFFFFC 233 233 #define ZYWRLE_UVMASK16 0xFFFFFFF8 234 234 #define ZYWRLE_LOAD_PIXEL16(src, r, g, b) \ 235 235 do { \ 236 236 - r = ((uint8_t*)src)[S_1] & 0xF8; \ 237 237 - g = (((uint8_t*)src)[S_1]<< 5) | (((uint8_t*)src)[S_0] >> 3); \ 236 236 + r = ((uint8_t*)src)[S_1] & 0xF8; \ 237 237 + g = (((uint8_t*)src)[S_1]<< 5) | (((uint8_t*)src)[S_0] >> 3); \ 238 238 g &= 0xFC; \ 239 239 - b = (((uint8_t*)src)[S_0]<< 3) & 0xF8; \ 239 239 + b = (((uint8_t*)src)[S_0]<< 3) & 0xF8; \ 240 240 } while (0) 241 241 242 242 #define ZYWRLE_SAVE_PIXEL16(dst, r, g,b) \ 243 243 do { \ 244 244 - r &= 0xF8; \ 245 245 - g &= 0xFC; \ 246 246 - b &= 0xF8; \ 247 247 - ((uint8_t*)dst)[S_1] = (uint8_t)(r | (g >> 5)); \ 248 248 - ((uint8_t*)dst)[S_0] = (uint8_t)(((b >> 3)|(g << 3)) & 0xFF); \ 244 244 + r &= 0xF8; \ 245 245 + g &= 0xFC; \ 246 246 + b &= 0xF8; \ 247 247 + ((uint8_t*)dst)[S_1] = (uint8_t)(r | (g >> 5)); \ 248 248 + ((uint8_t*)dst)[S_0] = (uint8_t)(((b >> 3)|(g << 3)) & 0xFF); \ 249 249 } while (0) 250 250 251 251 #define ZYWRLE_YMASK32 0xFFFFFFFF 252 252 #define ZYWRLE_UVMASK32 0xFFFFFFFF 253 253 #define ZYWRLE_LOAD_PIXEL32(src, r, g, b) \ 254 254 do { \ 255 255 - r = ((uint8_t*)src)[L_2]; \ 256 256 - g = ((uint8_t*)src)[L_1]; \ 257 257 - b = ((uint8_t*)src)[L_0]; \ 255 255 + r = ((uint8_t*)src)[L_2]; \ 256 256 + g = ((uint8_t*)src)[L_1]; \ 257 257 + b = ((uint8_t*)src)[L_0]; \ 258 258 } while (0) 259 259 #define ZYWRLE_SAVE_PIXEL32(dst, r, g, b) \ 260 260 do { \ 261 261 - ((uint8_t*)dst)[L_2] = (uint8_t)r; \ 262 262 - ((uint8_t*)dst)[L_1] = (uint8_t)g; \ 263 263 - ((uint8_t*)dst)[L_0] = (uint8_t)b; \ 261 261 + ((uint8_t*)dst)[L_2] = (uint8_t)r; \ 262 262 + ((uint8_t*)dst)[L_1] = (uint8_t)g; \ 263 263 + ((uint8_t*)dst)[L_0] = (uint8_t)b; \ 264 264 } while (0) 265 265 266 266 static inline void harr(int8_t *px0, int8_t *px1) ··· 443 443 444 444 static inline void wavelet(int *buf, int width, int height, int level) 445 445 { 446 446 - int l, s; 447 447 - int *top; 448 448 - int *end; 446 446 + int l, s; 447 447 + int *top; 448 448 + int *end; 449 449 450 450 - for (l = 0; l < level; l++) { 451 451 - top = buf; 452 452 - end = buf + height * width; 453 453 - s = width << l; 454 454 - while (top < end) { 455 455 - wavelet_level(top, width, l, 1); 456 456 - top += s; 457 457 - } 458 458 - top = buf; 459 459 - end = buf + width; 460 460 - s = 1<<l; 461 461 - while (top < end) { 462 462 - wavelet_level(top, height, l, width); 463 463 - top += s; 464 464 - } 465 465 - filter_wavelet_square(buf, width, height, level, l); 466 466 - } 450 450 + for (l = 0; l < level; l++) { 451 451 + top = buf; 452 452 + end = buf + height * width; 453 453 + s = width << l; 454 454 + while (top < end) { 455 455 + wavelet_level(top, width, l, 1); 456 456 + top += s; 457 457 + } 458 458 + top = buf; 459 459 + end = buf + width; 460 460 + s = 1<<l; 461 461 + while (top < end) { 462 462 + wavelet_level(top, height, l, width); 463 463 + top += s; 464 464 + } 465 465 + filter_wavelet_square(buf, width, height, level, l); 466 466 + } 467 467 } 468 468 469 469 ··· 471 471 Coefficients manages as 24 bits little-endian pixel. */ 472 472 #define ZYWRLE_LOAD_COEFF(src, r, g, b) \ 473 473 do { \ 474 474 - r = ((int8_t*)src)[2]; \ 475 475 - g = ((int8_t*)src)[1]; \ 476 476 - b = ((int8_t*)src)[0]; \ 474 474 + r = ((int8_t*)src)[2]; \ 475 475 + g = ((int8_t*)src)[1]; \ 476 476 + b = ((int8_t*)src)[0]; \ 477 477 } while (0) 478 478 479 479 #define ZYWRLE_SAVE_COEFF(dst, r, g, b) \ 480 480 do { \ 481 481 - ((int8_t*)dst)[2] = (int8_t)r; \ 482 482 - ((int8_t*)dst)[1] = (int8_t)g; \ 483 483 - ((int8_t*)dst)[0] = (int8_t)b; \ 481 481 + ((int8_t*)dst)[2] = (int8_t)r; \ 482 482 + ((int8_t*)dst)[1] = (int8_t)g; \ 483 483 + ((int8_t*)dst)[0] = (int8_t)b; \ 484 484 } while (0) 485 485 486 486 /* ··· 502 502 More exact PLHarr, we reduce to odd range(-127<=x<=127). */ 503 503 #define ZYWRLE_RGBYUV_(r, g, b, y, u, v, ymask, uvmask) \ 504 504 do { \ 505 505 - y = (r + (g << 1) + b) >> 2; \ 506 506 - u = b - g; \ 507 507 - v = r - g; \ 508 508 - y -= 128; \ 509 509 - u >>= 1; \ 510 510 - v >>= 1; \ 511 511 - y &= ymask; \ 512 512 - u &= uvmask; \ 513 513 - v &= uvmask; \ 514 514 - if (y == -128) { \ 505 505 + y = (r + (g << 1) + b) >> 2; \ 506 506 + u = b - g; \ 507 507 + v = r - g; \ 508 508 + y -= 128; \ 509 509 + u >>= 1; \ 510 510 + v >>= 1; \ 511 511 + y &= ymask; \ 512 512 + u &= uvmask; \ 513 513 + v &= uvmask; \ 514 514 + if (y == -128) { \ 515 515 y += (0xFFFFFFFF - ymask + 1); \ 516 516 } \ 517 517 - if (u == -128) { \ 517 517 + if (u == -128) { \ 518 518 u += (0xFFFFFFFF - uvmask + 1); \ 519 519 } \ 520 520 - if (v == -128) { \ 520 520 + if (v == -128) { \ 521 521 v += (0xFFFFFFFF - uvmask + 1); \ 522 522 } \ 523 523 } while (0)

+1 -65

vl.c

··· 163 163 static int num_serial_hds; 164 164 static Chardev **serial_hds; 165 165 Chardev *parallel_hds[MAX_PARALLEL_PORTS]; 166 166 - Chardev *virtcon_hds[MAX_VIRTIO_CONSOLES]; 167 166 int win2k_install_hack = 0; 168 167 int singlestep = 0; 169 168 int smp_cpus; ··· 214 213 static int has_defaults = 1; 215 214 static int default_serial = 1; 216 215 static int default_parallel = 1; 217 217 - static int default_virtcon = 1; 218 216 static int default_monitor = 1; 219 217 static int default_floppy = 1; 220 218 static int default_cdrom = 1; ··· 235 233 { .driver = "ide-drive", .flag = &default_cdrom }, 236 234 { .driver = "scsi-cd", .flag = &default_cdrom }, 237 235 { .driver = "scsi-hd", .flag = &default_cdrom }, 238 238 - { .driver = "virtio-serial-pci", .flag = &default_virtcon }, 239 239 - { .driver = "virtio-serial", .flag = &default_virtcon }, 240 236 { .driver = "VGA", .flag = &default_vga }, 241 237 { .driver = "isa-vga", .flag = &default_vga }, 242 238 { .driver = "cirrus-vga", .flag = &default_vga }, ··· 2393 2389 DEV_BT, /* -bt */ 2394 2390 DEV_SERIAL, /* -serial */ 2395 2391 DEV_PARALLEL, /* -parallel */ 2396 2396 - DEV_VIRTCON, /* -virtioconsole */ 2397 2392 DEV_DEBUGCON, /* -debugcon */ 2398 2393 DEV_GDB, /* -gdb, -s */ 2399 2394 DEV_SCLP, /* s390 sclp */ ··· 2491 2486 return 0; 2492 2487 } 2493 2488 2494 2494 - static int virtcon_parse(const char *devname) 2495 2495 - { 2496 2496 - QemuOptsList *device = qemu_find_opts("device"); 2497 2497 - static int index = 0; 2498 2498 - char label[32]; 2499 2499 - QemuOpts *bus_opts, *dev_opts; 2500 2500 - 2501 2501 - if (strcmp(devname, "none") == 0) 2502 2502 - return 0; 2503 2503 - if (index == MAX_VIRTIO_CONSOLES) { 2504 2504 - error_report("too many virtio consoles"); 2505 2505 - exit(1); 2506 2506 - } 2507 2507 - 2508 2508 - bus_opts = qemu_opts_create(device, NULL, 0, &error_abort); 2509 2509 - qemu_opt_set(bus_opts, "driver", "virtio-serial", &error_abort); 2510 2510 - 2511 2511 - dev_opts = qemu_opts_create(device, NULL, 0, &error_abort); 2512 2512 - qemu_opt_set(dev_opts, "driver", "virtconsole", &error_abort); 2513 2513 - 2514 2514 - snprintf(label, sizeof(label), "virtcon%d", index); 2515 2515 - virtcon_hds[index] = qemu_chr_new_mux_mon(label, devname); 2516 2516 - if (!virtcon_hds[index]) { 2517 2517 - error_report("could not connect virtio console" 2518 2518 - " to character backend '%s'", devname); 2519 2519 - return -1; 2520 2520 - } 2521 2521 - qemu_opt_set(dev_opts, "chardev", label, &error_abort); 2522 2522 - 2523 2523 - index++; 2524 2524 - return 0; 2525 2525 - } 2526 2526 - 2527 2489 static int debugcon_parse(const char *devname) 2528 2490 { 2529 2491 QemuOpts *opts; ··· 3558 3520 exit(1); 3559 3521 } 3560 3522 break; 3561 3561 - case QEMU_OPTION_virtiocon: 3562 3562 - warn_report("This option is deprecated, " 3563 3563 - "use '-device virtconsole' instead"); 3564 3564 - add_device_config(DEV_VIRTCON, optarg); 3565 3565 - default_virtcon = 0; 3566 3566 - if (strncmp(optarg, "mon:", 4) == 0) { 3567 3567 - default_monitor = 0; 3568 3568 - } 3569 3569 - break; 3570 3523 case QEMU_OPTION_parallel: 3571 3524 add_device_config(DEV_PARALLEL, optarg); 3572 3525 default_parallel = 0; ··· 3637 3590 case QEMU_OPTION_enable_kvm: 3638 3591 olist = qemu_find_opts("machine"); 3639 3592 qemu_opts_parse_noisily(olist, "accel=kvm", false); 3640 3640 - break; 3641 3641 - case QEMU_OPTION_enable_hax: 3642 3642 - warn_report("Option is deprecated, use '-accel hax' instead"); 3643 3643 - olist = qemu_find_opts("machine"); 3644 3644 - qemu_opts_parse_noisily(olist, "accel=hax", false); 3645 3593 break; 3646 3594 case QEMU_OPTION_M: 3647 3595 case QEMU_OPTION_machine: ··· 4171 4119 if (!has_defaults || machine_class->no_parallel) { 4172 4120 default_parallel = 0; 4173 4121 } 4174 4174 - if (!has_defaults || !machine_class->use_virtcon) { 4175 4175 - default_virtcon = 0; 4176 4176 - } 4177 4122 if (!has_defaults || machine_class->no_floppy) { 4178 4123 default_floppy = 0; 4179 4124 } ··· 4206 4151 * usage, -nographic is just a no-op in this case. 4207 4152 */ 4208 4153 if (nographic 4209 4209 - && (default_parallel || default_serial 4210 4210 - || default_monitor || default_virtcon)) { 4154 4154 + && (default_parallel || default_serial || default_monitor)) { 4211 4155 error_report("-nographic cannot be used with -daemonize"); 4212 4156 exit(1); 4213 4157 } ··· 4224 4168 add_device_config(DEV_PARALLEL, "null"); 4225 4169 if (default_serial && default_monitor) { 4226 4170 add_device_config(DEV_SERIAL, "mon:stdio"); 4227 4227 - } else if (default_virtcon && default_monitor) { 4228 4228 - add_device_config(DEV_VIRTCON, "mon:stdio"); 4229 4171 } else { 4230 4172 if (default_serial) 4231 4173 add_device_config(DEV_SERIAL, "stdio"); 4232 4232 - if (default_virtcon) 4233 4233 - add_device_config(DEV_VIRTCON, "stdio"); 4234 4174 if (default_monitor) 4235 4175 monitor_parse("stdio", "readline", false); 4236 4176 } ··· 4241 4181 add_device_config(DEV_PARALLEL, "vc:80Cx24C"); 4242 4182 if (default_monitor) 4243 4183 monitor_parse("vc:80Cx24C", "readline", false); 4244 4244 - if (default_virtcon) 4245 4245 - add_device_config(DEV_VIRTCON, "vc:80Cx24C"); 4246 4184 } 4247 4185 4248 4186 #if defined(CONFIG_VNC) ··· 4472 4410 if (foreach_device_config(DEV_SERIAL, serial_parse) < 0) 4473 4411 exit(1); 4474 4412 if (foreach_device_config(DEV_PARALLEL, parallel_parse) < 0) 4475 4475 - exit(1); 4476 4476 - if (foreach_device_config(DEV_VIRTCON, virtcon_parse) < 0) 4477 4413 exit(1); 4478 4414 if (foreach_device_config(DEV_DEBUGCON, debugcon_parse) < 0) 4479 4415 exit(1);