+1 -2

Makefile.objs

··· 13 13 ####################################################################### 14 14 # block-obj-y is code used by both qemu system emulation and qemu-img 15 15 16 16 - block-obj-y += nbd/ 16 16 + block-obj-y = nbd/ 17 17 block-obj-y += block.o blockjob.o job.o 18 18 block-obj-y += block/ scsi/ 19 19 block-obj-y += qemu-io-cmds.o ··· 101 101 ###################################################################### 102 102 # tracing 103 103 util-obj-y += trace/ 104 104 - target-obj-y += trace/ 105 104 106 105 ###################################################################### 107 106 # guest agent

+3 -8

Makefile.target

··· 105 105 # Dummy command so that make thinks it has done something 106 106 @true 107 107 108 108 + obj-y += trace/ 109 109 + 108 110 ######################################################### 109 111 # cpu emulator library 110 112 obj-y += exec.o ··· 173 175 dummy := $(call unnest-vars,,obj-y) 174 176 all-obj-y := $(obj-y) 175 177 176 176 - target-obj-y := 177 177 - block-obj-y := 178 178 - common-obj-y := 179 179 - chardev-obj-y := 180 178 include $(SRC_PATH)/Makefile.objs 181 181 - dummy := $(call unnest-vars,,target-obj-y) 182 182 - target-obj-y-save := $(target-obj-y) 183 179 dummy := $(call unnest-vars,.., \ 184 180 authz-obj-y \ 185 181 block-obj-y \ ··· 191 187 io-obj-y \ 192 188 common-obj-y \ 193 189 common-obj-m) 194 194 - target-obj-y := $(target-obj-y-save) 195 190 all-obj-y += $(common-obj-y) 196 196 - all-obj-y += $(target-obj-y) 197 191 all-obj-y += $(qom-obj-y) 198 192 all-obj-$(CONFIG_SOFTMMU) += $(authz-obj-y) 199 193 all-obj-$(CONFIG_SOFTMMU) += $(block-obj-y) $(chardev-obj-y) ··· 228 222 rm -f *.a *~ $(PROGS) 229 223 rm -f $(shell find . -name '*.[od]') 230 224 rm -f hmp-commands.h gdbstub-xml.c 225 225 + rm -f trace/generated-helpers.c trace/generated-helpers.c-timestamp 231 226 ifdef CONFIG_TRACE_SYSTEMTAP 232 227 rm -f *.stp 233 228 endif

+3 -1

accel/accel.c

··· 91 91 #elif defined(CONFIG_KVM) 92 92 accel = "kvm"; 93 93 #else 94 94 - #error "No default accelerator available" 94 94 + error_report("No accelerator selected and" 95 95 + " no default accelerator available"); 96 96 + exit(1); 95 97 #endif 96 98 } 97 99 }

+7

block/iscsi.c

··· 145 145 * unallocated. */ 146 146 #define ISCSI_CHECKALLOC_THRES 64 147 147 148 148 + #ifdef __linux__ 149 149 + 148 150 static void 149 151 iscsi_bh_cb(void *p) 150 152 { ··· 171 173 acb->bh = aio_bh_new(acb->iscsilun->aio_context, iscsi_bh_cb, acb); 172 174 qemu_bh_schedule(acb->bh); 173 175 } 176 176 + 177 177 + #endif 174 178 175 179 static void iscsi_co_generic_bh_cb(void *opaque) 176 180 { ··· 290 294 }; 291 295 } 292 296 297 297 + #ifdef __linux__ 298 298 + 293 299 /* Called (via iscsi_service) with QemuMutex held. */ 294 300 static void 295 301 iscsi_abort_task_cb(struct iscsi_context *iscsi, int status, void *command_data, ··· 338 344 .cancel_async = iscsi_aio_cancel, 339 345 }; 340 346 347 347 + #endif 341 348 342 349 static void iscsi_process_read(void *arg); 343 350 static void iscsi_process_write(void *arg);

+11 -1

chardev/char-socket.c

··· 59 59 QIONetListener *listener; 60 60 GSource *hup_source; 61 61 QCryptoTLSCreds *tls_creds; 62 62 + char *tls_authz; 62 63 TCPChardevState state; 63 64 int max_size; 64 65 int do_telnetopt; ··· 807 808 if (s->is_listen) { 808 809 tioc = qio_channel_tls_new_server( 809 810 s->ioc, s->tls_creds, 810 810 - NULL, /* XXX Use an ACL */ 811 811 + s->tls_authz, 811 812 &err); 812 813 } else { 813 814 tioc = qio_channel_tls_new_client( ··· 1055 1056 if (s->tls_creds) { 1056 1057 object_unref(OBJECT(s->tls_creds)); 1057 1058 } 1059 1059 + g_free(s->tls_authz); 1058 1060 1059 1061 qemu_chr_be_event(chr, CHR_EVENT_CLOSED); 1060 1062 } ··· 1242 1244 break; 1243 1245 } 1244 1246 1247 1247 + if (sock->has_tls_authz && !sock->has_tls_creds) { 1248 1248 + error_setg(errp, "'tls_authz' option requires 'tls_creds' option"); 1249 1249 + return false; 1250 1250 + } 1251 1251 + 1245 1252 /* Validate any options which have a dependancy on client vs server */ 1246 1253 if (!sock->has_server || sock->server) { 1247 1254 if (sock->has_reconnect) { ··· 1320 1327 } 1321 1328 } 1322 1329 } 1330 1330 + s->tls_authz = g_strdup(sock->tls_authz); 1323 1331 1324 1332 s->addr = addr = socket_address_flatten(sock->addr); 1325 1333 ··· 1399 1407 sock->reconnect = qemu_opt_get_number(opts, "reconnect", 0); 1400 1408 sock->has_tls_creds = qemu_opt_get(opts, "tls-creds"); 1401 1409 sock->tls_creds = g_strdup(qemu_opt_get(opts, "tls-creds")); 1410 1410 + sock->has_tls_authz = qemu_opt_get(opts, "tls-authz"); 1411 1411 + sock->tls_authz = g_strdup(qemu_opt_get(opts, "tls-authz")); 1402 1412 1403 1413 addr = g_new0(SocketAddressLegacy, 1); 1404 1414 if (path) {

+3

chardev/char.c

··· 881 881 .name = "tls-creds", 882 882 .type = QEMU_OPT_STRING, 883 883 },{ 884 884 + .name = "tls-authz", 885 885 + .type = QEMU_OPT_STRING, 886 886 + },{ 884 887 .name = "websocket", 885 888 .type = QEMU_OPT_BOOL, 886 889 },{

+12 -1

configure

··· 1836 1836 # Consult white-list to determine whether to enable werror 1837 1837 # by default. Only enable by default for git builds 1838 1838 if test -z "$werror" ; then 1839 1839 - if test -d "$source_path/.git" && \ 1839 1839 + if test -e "$source_path/.git" && \ 1840 1840 { test "$linux" = "yes" || test "$mingw32" = "yes"; }; then 1841 1841 werror="yes" 1842 1842 else ··· 5901 5901 LDFLAGS="-Wl,$flag $LDFLAGS" 5902 5902 fi 5903 5903 done 5904 5904 + fi 5905 5905 + 5906 5906 + # Disable OpenBSD W^X if available 5907 5907 + if test "$tcg" = "yes" && test "$targetos" = "OpenBSD"; then 5908 5908 + cat > $TMPC <<EOF 5909 5909 + int main(void) { return 0; } 5910 5910 + EOF 5911 5911 + wx_ldflags="-Wl,-z,wxneeded" 5912 5912 + if compile_prog "" "$wx_ldflags"; then 5913 5913 + QEMU_LDFLAGS="$QEMU_LDFLAGS $wx_ldflags" 5914 5914 + fi 5904 5915 fi 5905 5916 5906 5917 qemu_confdir=$sysconfdir$confsuffix

+6

contrib/elf2dmp/main.c

··· 524 524 } 525 525 } 526 526 527 527 + if (!nt_start_addr) { 528 528 + eprintf("Failed to find NT kernel image\n"); 529 529 + err = 1; 530 530 + goto out_ps; 531 531 + } 532 532 + 527 533 printf("KernBase = 0x%016"PRIx64", signature is \'%.2s\'\n", KernBase, 528 534 (char *)nt_start_addr); 529 535

+31 -17

exec.c

··· 1599 1599 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index); 1600 1600 } 1601 1601 1602 1602 + /* 1603 1603 + * The range in *section* may look like this: 1604 1604 + * 1605 1605 + * |s|PPPPPPP|s| 1606 1606 + * 1607 1607 + * where s stands for subpage and P for page. 1608 1608 + */ 1602 1609 void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section) 1603 1610 { 1604 1604 - MemoryRegionSection now = *section, remain = *section; 1611 1611 + MemoryRegionSection remain = *section; 1605 1612 Int128 page_size = int128_make64(TARGET_PAGE_SIZE); 1606 1613 1607 1607 - if (now.offset_within_address_space & ~TARGET_PAGE_MASK) { 1608 1608 - uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space) 1609 1609 - - now.offset_within_address_space; 1614 1614 + /* register first subpage */ 1615 1615 + if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { 1616 1616 + uint64_t left = TARGET_PAGE_ALIGN(remain.offset_within_address_space) 1617 1617 + - remain.offset_within_address_space; 1610 1618 1619 1619 + MemoryRegionSection now = remain; 1611 1620 now.size = int128_min(int128_make64(left), now.size); 1612 1621 register_subpage(fv, &now); 1613 1613 - } else { 1614 1614 - now.size = int128_zero(); 1615 1615 - } 1616 1616 - while (int128_ne(remain.size, now.size)) { 1622 1622 + if (int128_eq(remain.size, now.size)) { 1623 1623 + return; 1624 1624 + } 1617 1625 remain.size = int128_sub(remain.size, now.size); 1618 1626 remain.offset_within_address_space += int128_get64(now.size); 1619 1627 remain.offset_within_region += int128_get64(now.size); 1620 1620 - now = remain; 1621 1621 - if (int128_lt(remain.size, page_size)) { 1622 1622 - register_subpage(fv, &now); 1623 1623 - } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { 1624 1624 - now.size = page_size; 1625 1625 - register_subpage(fv, &now); 1626 1626 - } else { 1627 1627 - now.size = int128_and(now.size, int128_neg(page_size)); 1628 1628 - register_multipage(fv, &now); 1628 1628 + } 1629 1629 + 1630 1630 + /* register whole pages */ 1631 1631 + if (int128_ge(remain.size, page_size)) { 1632 1632 + MemoryRegionSection now = remain; 1633 1633 + now.size = int128_and(now.size, int128_neg(page_size)); 1634 1634 + register_multipage(fv, &now); 1635 1635 + if (int128_eq(remain.size, now.size)) { 1636 1636 + return; 1629 1637 } 1638 1638 + remain.size = int128_sub(remain.size, now.size); 1639 1639 + remain.offset_within_address_space += int128_get64(now.size); 1640 1640 + remain.offset_within_region += int128_get64(now.size); 1630 1641 } 1642 1642 + 1643 1643 + /* register last subpage */ 1644 1644 + register_subpage(fv, &remain); 1631 1645 } 1632 1646 1633 1647 void qemu_flush_coalesced_mmio_buffer(void)

+1 -1

hw/i386/amd_iommu.c

··· 2 2 * QEMU emulation of AMD IOMMU (AMD-Vi) 3 3 * 4 4 * Copyright (C) 2011 Eduard - Gabriel Munteanu 5 5 - * Copyright (C) 2015 David Kiarie, <davidkiarie4@gmail.com> 5 5 + * Copyright (C) 2015, 2016 David Kiarie Kahurani 6 6 * 7 7 * This program is free software; you can redistribute it and/or modify 8 8 * it under the terms of the GNU General Public License as published by

+1 -1

hw/i386/amd_iommu.h

··· 2 2 * QEMU emulation of an AMD IOMMU (AMD-Vi) 3 3 * 4 4 * Copyright (C) 2011 Eduard - Gabriel Munteanu 5 5 - * Copyright (C) 2015 David Kiarie, <davidkiarie4@gmail.com> 5 5 + * Copyright (C) 2015, 2016 David Kiarie Kahurani 6 6 * 7 7 * This program is free software; you can redistribute it and/or modify 8 8 * it under the terms of the GNU General Public License as published by

+12 -6

hw/i386/pc.c

··· 136 136 { "Icelake-Client" "-" TYPE_X86_CPU, "mpx", "on" }, 137 137 { "Icelake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, 138 138 { "Cascadelake-Server" "-" TYPE_X86_CPU, "stepping", "5" }, 139 139 + { TYPE_X86_CPU, "x-intel-pt-auto-level", "off" }, 139 140 }; 140 141 const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1); 141 142 ··· 1210 1211 protocol = lduw_p(header+0x206); 1211 1212 } else { 1212 1213 /* 1214 1214 + * This could be a multiboot kernel. If it is, let's stop treating it 1215 1215 + * like a Linux kernel. 1216 1216 + * Note: some multiboot images could be in the ELF format (the same of 1217 1217 + * PVH), so we try multiboot first since we check the multiboot magic 1218 1218 + * header before to load it. 1219 1219 + */ 1220 1220 + if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename, 1221 1221 + kernel_cmdline, kernel_size, header)) { 1222 1222 + return; 1223 1223 + } 1224 1224 + /* 1213 1225 * Check if the file is an uncompressed kernel file (ELF) and load it, 1214 1226 * saving the PVH entry point used by the x86/HVM direct boot ABI. 1215 1227 * If load_elfboot() is successful, populate the fw_cfg info. ··· 1260 1272 option_rom[nb_option_roms].name = "pvh.bin"; 1261 1273 nb_option_roms++; 1262 1274 1263 1263 - return; 1264 1264 - } 1265 1265 - /* This looks like a multiboot kernel. If it is, let's stop 1266 1266 - treating it like a Linux kernel. */ 1267 1267 - if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename, 1268 1268 - kernel_cmdline, kernel_size, header)) { 1269 1275 return; 1270 1276 } 1271 1277 protocol = 0;

+3

hw/riscv/Kconfig

··· 26 26 27 27 config RISCV_VIRT 28 28 bool 29 29 + imply PCI_DEVICES 30 30 + imply TEST_DEVICES 31 31 + select PCI 29 32 select HART 30 33 select SERIAL 31 34 select VIRTIO_MMIO

+101 -69

hw/scsi/lsi53c895a.c

··· 160 160 #define LSI_CCNTL1_DDAC 0x08 161 161 #define LSI_CCNTL1_ZMOD 0x80 162 162 163 163 + #define LSI_SBCL_ATN 0x08 164 164 + #define LSI_SBCL_BSY 0x20 165 165 + #define LSI_SBCL_ACK 0x40 166 166 + #define LSI_SBCL_REQ 0x80 167 167 + 163 168 /* Enable Response to Reselection */ 164 169 #define LSI_SCID_RRE 0x60 165 170 ··· 189 194 QTAILQ_ENTRY(lsi_request) next; 190 195 } lsi_request; 191 196 197 197 + enum { 198 198 + LSI_NOWAIT, /* SCRIPTS are running or stopped */ 199 199 + LSI_WAIT_RESELECT, /* Wait Reselect instruction has been issued */ 200 200 + LSI_DMA_SCRIPTS, /* processing DMA from lsi_execute_script */ 201 201 + LSI_DMA_IN_PROGRESS, /* DMA operation is in progress */ 202 202 + }; 203 203 + 204 204 + enum { 205 205 + LSI_MSG_ACTION_COMMAND = 0, 206 206 + LSI_MSG_ACTION_DISCONNECT = 1, 207 207 + LSI_MSG_ACTION_DOUT = 2, 208 208 + LSI_MSG_ACTION_DIN = 3, 209 209 + }; 210 210 + 192 211 typedef struct { 193 212 /*< private >*/ 194 213 PCIDevice parent_obj; ··· 202 221 203 222 int carry; /* ??? Should this be an a visible register somewhere? */ 204 223 int status; 205 205 - /* Action to take at the end of a MSG IN phase. 206 206 - 0 = COMMAND, 1 = disconnect, 2 = DATA OUT, 3 = DATA IN. */ 207 224 int msg_action; 208 225 int msg_len; 209 226 uint8_t msg[LSI_MAX_MSGIN_LEN]; 210 210 - /* 0 if SCRIPTS are running or stopped. 211 211 - * 1 if a Wait Reselect instruction has been issued. 212 212 - * 2 if processing DMA from lsi_execute_script. 213 213 - * 3 if a DMA operation is in progress. */ 214 227 int waiting; 215 228 SCSIBus bus; 216 229 int current_lun; ··· 258 271 uint8_t sdid; 259 272 uint8_t ssid; 260 273 uint8_t sfbr; 274 274 + uint8_t sbcl; 261 275 uint8_t stest1; 262 276 uint8_t stest2; 263 277 uint8_t stest3; ··· 283 297 uint8_t sbr; 284 298 uint32_t adder; 285 299 286 286 - /* Script ram is stored as 32-bit words in host byteorder. */ 287 287 - uint32_t script_ram[2048]; 300 300 + uint8_t script_ram[2048 * sizeof(uint32_t)]; 288 301 } LSIState; 289 302 290 303 #define TYPE_LSI53C810 "lsi53c810" ··· 293 306 #define LSI53C895A(obj) \ 294 307 OBJECT_CHECK(LSIState, (obj), TYPE_LSI53C895A) 295 308 309 309 + static const char *scsi_phases[] = { 310 310 + "DOUT", 311 311 + "DIN", 312 312 + "CMD", 313 313 + "STATUS", 314 314 + "RSVOUT", 315 315 + "RSVIN", 316 316 + "MSGOUT", 317 317 + "MSGIN" 318 318 + }; 319 319 + 320 320 + static const char *scsi_phase_name(int phase) 321 321 + { 322 322 + return scsi_phases[phase & PHASE_MASK]; 323 323 + } 324 324 + 296 325 static inline int lsi_irq_on_rsl(LSIState *s) 297 326 { 298 327 return (s->sien0 & LSI_SIST0_RSL) && (s->scid & LSI_SCID_RRE); ··· 315 344 trace_lsi_reset(); 316 345 s->carry = 0; 317 346 318 318 - s->msg_action = 0; 347 347 + s->msg_action = LSI_MSG_ACTION_COMMAND; 319 348 s->msg_len = 0; 320 320 - s->waiting = 0; 349 349 + s->waiting = LSI_NOWAIT; 321 350 s->dsa = 0; 322 351 s->dnad = 0; 323 352 s->dbc = 0; ··· 356 385 s->socl = 0; 357 386 s->sdid = 0; 358 387 s->ssid = 0; 388 388 + s->sbcl = 0; 359 389 s->stest1 = 0; 360 390 s->stest2 = 0; 361 391 s->stest3 = 0; ··· 530 560 531 561 static inline void lsi_set_phase(LSIState *s, int phase) 532 562 { 563 563 + s->sbcl &= ~PHASE_MASK; 564 564 + s->sbcl |= phase | LSI_SBCL_REQ; 533 565 s->sstat1 = (s->sstat1 & ~PHASE_MASK) | phase; 534 566 } 535 567 ··· 556 588 static void lsi_resume_script(LSIState *s) 557 589 { 558 590 if (s->waiting != 2) { 559 559 - s->waiting = 0; 591 591 + s->waiting = LSI_NOWAIT; 560 592 lsi_execute_script(s); 561 593 } else { 562 562 - s->waiting = 0; 594 594 + s->waiting = LSI_NOWAIT; 563 595 } 564 596 } 565 597 ··· 567 599 { 568 600 s->scntl1 &= ~LSI_SCNTL1_CON; 569 601 s->sstat1 &= ~PHASE_MASK; 602 602 + s->sbcl = 0; 570 603 } 571 604 572 605 static void lsi_bad_selection(LSIState *s, uint32_t id) ··· 674 707 trace_lsi_reselect(id); 675 708 s->scntl1 |= LSI_SCNTL1_CON; 676 709 lsi_set_phase(s, PHASE_MI); 677 677 - s->msg_action = p->out ? 2 : 3; 710 710 + s->msg_action = p->out ? LSI_MSG_ACTION_DOUT : LSI_MSG_ACTION_DIN; 678 711 s->current->dma_len = p->pending; 679 712 lsi_add_msg_byte(s, 0x80); 680 713 if (s->current->tag & LSI_TAG_VALID) { ··· 735 768 Since no interrupt stacking is implemented in the emulation, it 736 769 is also required that there are no pending interrupts waiting 737 770 for service from the device driver. */ 738 738 - if (s->waiting == 1 || 771 771 + if (s->waiting == LSI_WAIT_RESELECT || 739 772 (lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON) && 740 773 !(s->istat0 & (LSI_ISTAT0_SIP | LSI_ISTAT0_DIP)))) { 741 774 /* Reselect device. */ ··· 780 813 int out; 781 814 782 815 assert(req->hba_private); 783 783 - if (s->waiting == 1 || req->hba_private != s->current || 816 816 + if (s->waiting == LSI_WAIT_RESELECT || req->hba_private != s->current || 784 817 (lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON))) { 785 818 if (lsi_queue_req(s, req, len)) { 786 819 return; ··· 794 827 s->current->dma_len = len; 795 828 s->command_complete = 1; 796 829 if (s->waiting) { 797 797 - if (s->waiting == 1 || s->dbc == 0) { 830 830 + if (s->waiting == LSI_WAIT_RESELECT || s->dbc == 0) { 798 831 lsi_resume_script(s); 799 832 } else { 800 833 lsi_do_dma(s, out); ··· 845 878 lsi_add_msg_byte(s, 4); /* DISCONNECT */ 846 879 /* wait data */ 847 880 lsi_set_phase(s, PHASE_MI); 848 848 - s->msg_action = 1; 881 881 + s->msg_action = LSI_MSG_ACTION_DISCONNECT; 849 882 lsi_queue_command(s); 850 883 } else { 851 884 /* wait command complete */ ··· 866 899 s->sfbr = status; 867 900 pci_dma_write(PCI_DEVICE(s), s->dnad, &status, 1); 868 901 lsi_set_phase(s, PHASE_MI); 869 869 - s->msg_action = 1; 902 902 + s->msg_action = LSI_MSG_ACTION_DISCONNECT; 870 903 lsi_add_msg_byte(s, 0); /* COMMAND COMPLETE */ 871 904 } 872 905 ··· 889 922 /* ??? Check if ATN (not yet implemented) is asserted and maybe 890 923 switch to PHASE_MO. */ 891 924 switch (s->msg_action) { 892 892 - case 0: 925 925 + case LSI_MSG_ACTION_COMMAND: 893 926 lsi_set_phase(s, PHASE_CMD); 894 927 break; 895 895 - case 1: 928 928 + case LSI_MSG_ACTION_DISCONNECT: 896 929 lsi_disconnect(s); 897 930 break; 898 898 - case 2: 931 931 + case LSI_MSG_ACTION_DOUT: 899 932 lsi_set_phase(s, PHASE_DO); 900 933 break; 901 901 - case 3: 934 934 + case LSI_MSG_ACTION_DIN: 902 935 lsi_set_phase(s, PHASE_DI); 903 936 break; 904 937 default: ··· 1050 1083 qemu_log_mask(LOG_UNIMP, "Unimplemented message 0x%02x\n", msg); 1051 1084 lsi_set_phase(s, PHASE_MI); 1052 1085 lsi_add_msg_byte(s, 7); /* MESSAGE REJECT */ 1053 1053 - s->msg_action = 0; 1086 1086 + s->msg_action = LSI_MSG_ACTION_COMMAND; 1054 1087 } 1055 1088 1056 1089 #define LSI_BUF_SIZE 4096 ··· 1084 1117 lsi_reselect(s, p); 1085 1118 } 1086 1119 if (s->current == NULL) { 1087 1087 - s->waiting = 1; 1120 1120 + s->waiting = LSI_WAIT_RESELECT; 1088 1121 } 1089 1122 } 1090 1123 ··· 1184 1217 s->ia = s->dsp - 12; 1185 1218 } 1186 1219 if ((s->sstat1 & PHASE_MASK) != ((insn >> 24) & 7)) { 1187 1187 - trace_lsi_execute_script_blockmove_badphase(s->sstat1 & PHASE_MASK, 1188 1188 - (insn >> 24) & 7); 1220 1220 + trace_lsi_execute_script_blockmove_badphase( 1221 1221 + scsi_phase_name(s->sstat1), 1222 1222 + scsi_phase_name(insn >> 24)); 1189 1223 lsi_script_scsi_interrupt(s, LSI_SIST0_MA, 0); 1190 1224 break; 1191 1225 } ··· 1193 1227 s->dnad64 = addr_high; 1194 1228 switch (s->sstat1 & 0x7) { 1195 1229 case PHASE_DO: 1196 1196 - s->waiting = 2; 1230 1230 + s->waiting = LSI_DMA_SCRIPTS; 1197 1231 lsi_do_dma(s, 1); 1198 1232 if (s->waiting) 1199 1199 - s->waiting = 3; 1233 1233 + s->waiting = LSI_DMA_IN_PROGRESS; 1200 1234 break; 1201 1235 case PHASE_DI: 1202 1202 - s->waiting = 2; 1236 1236 + s->waiting = LSI_DMA_SCRIPTS; 1203 1237 lsi_do_dma(s, 0); 1204 1238 if (s->waiting) 1205 1205 - s->waiting = 3; 1239 1239 + s->waiting = LSI_DMA_IN_PROGRESS; 1206 1240 break; 1207 1241 case PHASE_CMD: 1208 1242 lsi_do_command(s); ··· 1217 1251 lsi_do_msgin(s); 1218 1252 break; 1219 1253 default: 1220 1220 - qemu_log_mask(LOG_UNIMP, "lsi_scsi: Unimplemented phase %d\n", 1221 1221 - s->sstat1 & PHASE_MASK); 1254 1254 + qemu_log_mask(LOG_UNIMP, "lsi_scsi: Unimplemented phase %s\n", 1255 1255 + scsi_phase_name(s->sstat1)); 1222 1256 } 1223 1257 s->dfifo = s->dbc & 0xff; 1224 1258 s->ctest5 = (s->ctest5 & 0xfc) | ((s->dbc >> 8) & 3); ··· 1265 1299 s->scntl1 |= LSI_SCNTL1_CON; 1266 1300 if (insn & (1 << 3)) { 1267 1301 s->socl |= LSI_SOCL_ATN; 1302 1302 + s->sbcl |= LSI_SBCL_ATN; 1268 1303 } 1304 1304 + s->sbcl |= LSI_SBCL_BSY; 1269 1305 lsi_set_phase(s, PHASE_MO); 1306 1306 + s->waiting = LSI_NOWAIT; 1270 1307 break; 1271 1308 case 1: /* Disconnect */ 1272 1309 trace_lsi_execute_script_io_disconnect(); ··· 1285 1322 } 1286 1323 break; 1287 1324 case 2: /* Wait Reselect */ 1288 1288 - if (!lsi_irq_on_rsl(s)) { 1289 1289 - lsi_wait_reselect(s); 1325 1325 + if (s->istat0 & LSI_ISTAT0_SIGP) { 1326 1326 + s->dsp = s->dnad; 1327 1327 + } else if (!lsi_irq_on_rsl(s)) { 1328 1328 + lsi_wait_reselect(s); 1290 1329 } 1291 1330 break; 1292 1331 case 3: /* Set */ ··· 1297 1336 insn & (1 << 10) ? " CC" : ""); 1298 1337 if (insn & (1 << 3)) { 1299 1338 s->socl |= LSI_SOCL_ATN; 1339 1339 + s->sbcl |= LSI_SBCL_ATN; 1300 1340 lsi_set_phase(s, PHASE_MO); 1301 1341 } 1342 1342 + 1343 1343 + if (insn & (1 << 6)) { 1344 1344 + s->sbcl |= LSI_SBCL_ACK; 1345 1345 + } 1346 1346 + 1302 1347 if (insn & (1 << 9)) { 1303 1348 qemu_log_mask(LOG_UNIMP, 1304 1349 "lsi_scsi: Target mode not implemented\n"); ··· 1314 1359 insn & (1 << 10) ? " CC" : ""); 1315 1360 if (insn & (1 << 3)) { 1316 1361 s->socl &= ~LSI_SOCL_ATN; 1362 1362 + s->sbcl &= ~LSI_SBCL_ATN; 1363 1363 + } 1364 1364 + 1365 1365 + if (insn & (1 << 6)) { 1366 1366 + s->sbcl &= ~LSI_SBCL_ACK; 1317 1367 } 1368 1368 + 1318 1369 if (insn & (1 << 10)) 1319 1370 s->carry = 0; 1320 1371 break; ··· 1429 1480 cond = s->carry != 0; 1430 1481 } 1431 1482 if (cond == jmp && (insn & (1 << 17))) { 1432 1432 - trace_lsi_execute_script_tc_compp( 1433 1433 - (s->sstat1 & PHASE_MASK), 1434 1434 - jmp ? '=' : '!', 1435 1435 - ((insn >> 24) & 7)); 1483 1483 + trace_lsi_execute_script_tc_compp(scsi_phase_name(s->sstat1), 1484 1484 + jmp ? '=' : '!', scsi_phase_name(insn >> 24)); 1436 1485 cond = (s->sstat1 & PHASE_MASK) == ((insn >> 24) & 7); 1437 1486 } 1438 1487 if (cond == jmp && (insn & (1 << 18))) { ··· 1519 1568 } 1520 1569 } 1521 1570 } 1522 1522 - if (insn_processed > 10000 && !s->waiting) { 1571 1571 + if (insn_processed > 10000 && s->waiting == LSI_NOWAIT) { 1523 1572 /* Some windows drivers make the device spin waiting for a memory 1524 1573 location to change. If we have been executed a lot of code then 1525 1574 assume this is the case and force an unexpected device disconnect. ··· 1531 1580 } 1532 1581 lsi_script_scsi_interrupt(s, LSI_SIST0_UDC, 0); 1533 1582 lsi_disconnect(s); 1534 1534 - } else if (s->istat1 & LSI_ISTAT1_SRUN && !s->waiting) { 1583 1583 + } else if (s->istat1 & LSI_ISTAT1_SRUN && s->waiting == LSI_NOWAIT) { 1535 1584 if (s->dcntl & LSI_DCNTL_SSM) { 1536 1585 lsi_script_dma_interrupt(s, LSI_DSTAT_SSI); 1537 1586 } else { ··· 1591 1640 ret = s->ssid; 1592 1641 break; 1593 1642 case 0xb: /* SBCL */ 1594 1594 - /* ??? This is not correct. However it's (hopefully) only 1595 1595 - used for diagnostics, so should be ok. */ 1596 1596 - ret = 0; 1643 1643 + ret = s->sbcl; 1597 1644 break; 1598 1645 case 0xc: /* DSTAT */ 1599 1646 ret = s->dstat | LSI_DSTAT_DFE; ··· 1641 1688 break; 1642 1689 CASE_GET_REG32(temp, 0x1c) 1643 1690 case 0x20: /* DFIFO */ 1644 1644 - ret = 0; 1691 1691 + ret = s->dfifo; 1645 1692 break; 1646 1693 case 0x21: /* CTEST4 */ 1647 1694 ret = s->ctest4; ··· 1864 1911 s->istat0 &= ~LSI_ISTAT0_INTF; 1865 1912 lsi_update_irq(s); 1866 1913 } 1867 1867 - if (s->waiting == 1 && val & LSI_ISTAT0_SIGP) { 1914 1914 + if (s->waiting == LSI_WAIT_RESELECT && val & LSI_ISTAT0_SIGP) { 1868 1915 trace_lsi_awoken(); 1869 1869 - s->waiting = 0; 1916 1916 + s->waiting = LSI_NOWAIT; 1870 1917 s->dsp = s->dnad; 1871 1918 lsi_execute_script(s); 1872 1919 } ··· 2037 2084 unsigned size) 2038 2085 { 2039 2086 LSIState *s = opaque; 2040 2040 - 2041 2087 return lsi_reg_readb(s, addr & 0xff); 2042 2088 } 2043 2089 2044 2090 static const MemoryRegionOps lsi_mmio_ops = { 2045 2091 .read = lsi_mmio_read, 2046 2092 .write = lsi_mmio_write, 2047 2047 - .endianness = DEVICE_NATIVE_ENDIAN, 2093 2093 + .endianness = DEVICE_LITTLE_ENDIAN, 2048 2094 .impl = { 2049 2095 .min_access_size = 1, 2050 2096 .max_access_size = 1, ··· 2055 2101 uint64_t val, unsigned size) 2056 2102 { 2057 2103 LSIState *s = opaque; 2058 2058 - uint32_t newval; 2059 2059 - uint32_t mask; 2060 2060 - int shift; 2061 2061 - 2062 2062 - newval = s->script_ram[addr >> 2]; 2063 2063 - shift = (addr & 3) * 8; 2064 2064 - mask = ((uint64_t)1 << (size * 8)) - 1; 2065 2065 - newval &= ~(mask << shift); 2066 2066 - newval |= val << shift; 2067 2067 - s->script_ram[addr >> 2] = newval; 2104 2104 + stn_le_p(s->script_ram + addr, size, val); 2068 2105 } 2069 2106 2070 2107 static uint64_t lsi_ram_read(void *opaque, hwaddr addr, 2071 2108 unsigned size) 2072 2109 { 2073 2110 LSIState *s = opaque; 2074 2074 - uint32_t val; 2075 2075 - uint32_t mask; 2076 2076 - 2077 2077 - val = s->script_ram[addr >> 2]; 2078 2078 - mask = ((uint64_t)1 << (size * 8)) - 1; 2079 2079 - val >>= (addr & 3) * 8; 2080 2080 - return val & mask; 2111 2111 + return ldn_le_p(s->script_ram + addr, size); 2081 2112 } 2082 2113 2083 2114 static const MemoryRegionOps lsi_ram_ops = { 2084 2115 .read = lsi_ram_read, 2085 2116 .write = lsi_ram_write, 2086 2086 - .endianness = DEVICE_NATIVE_ENDIAN, 2117 2117 + .endianness = DEVICE_LITTLE_ENDIAN, 2087 2118 }; 2088 2119 2089 2120 static uint64_t lsi_io_read(void *opaque, hwaddr addr, ··· 2103 2134 static const MemoryRegionOps lsi_io_ops = { 2104 2135 .read = lsi_io_read, 2105 2136 .write = lsi_io_write, 2106 2106 - .endianness = DEVICE_NATIVE_ENDIAN, 2137 2137 + .endianness = DEVICE_LITTLE_ENDIAN, 2107 2138 .impl = { 2108 2139 .min_access_size = 1, 2109 2140 .max_access_size = 1, ··· 2143 2174 2144 2175 static const VMStateDescription vmstate_lsi_scsi = { 2145 2176 .name = "lsiscsi", 2146 2146 - .version_id = 0, 2177 2177 + .version_id = 1, 2147 2178 .minimum_version_id = 0, 2148 2179 .pre_save = lsi_pre_save, 2149 2180 .post_load = lsi_post_load, ··· 2202 2233 VMSTATE_UINT8(stime0, LSIState), 2203 2234 VMSTATE_UINT8(respid0, LSIState), 2204 2235 VMSTATE_UINT8(respid1, LSIState), 2236 2236 + VMSTATE_UINT8_V(sbcl, LSIState, 1), 2205 2237 VMSTATE_UINT32(mmrs, LSIState), 2206 2238 VMSTATE_UINT32(mmws, LSIState), 2207 2239 VMSTATE_UINT32(sfs, LSIState), ··· 2219 2251 VMSTATE_BUFFER_UNSAFE(scratch, LSIState, 0, 18 * sizeof(uint32_t)), 2220 2252 VMSTATE_UINT8(sbr, LSIState), 2221 2253 2222 2222 - VMSTATE_BUFFER_UNSAFE(script_ram, LSIState, 0, 2048 * sizeof(uint32_t)), 2254 2254 + VMSTATE_BUFFER_UNSAFE(script_ram, LSIState, 0, 8192), 2223 2255 VMSTATE_END_OF_LIST() 2224 2256 } 2225 2257 };

+24 -13

hw/scsi/scsi-disk.c

··· 296 296 aio_context_release(blk_get_aio_context(s->qdev.conf.blk)); 297 297 } 298 298 299 299 - static void scsi_read_complete(void * opaque, int ret) 299 299 + static void scsi_read_complete_noio(SCSIDiskReq *r, int ret) 300 300 { 301 301 - SCSIDiskReq *r = (SCSIDiskReq *)opaque; 302 302 - SCSIDiskState *s = DO_UPCAST(SCSIDiskState, qdev, r->req.dev); 303 303 - int n; 301 301 + uint32_t n; 304 302 305 305 - assert(r->req.aiocb != NULL); 306 306 - r->req.aiocb = NULL; 307 307 - aio_context_acquire(blk_get_aio_context(s->qdev.conf.blk)); 308 308 - if (scsi_disk_req_check_error(r, ret, true)) { 303 303 + assert(r->req.aiocb == NULL); 304 304 + if (scsi_disk_req_check_error(r, ret, false)) { 309 305 goto done; 310 306 } 311 311 - 312 312 - block_acct_done(blk_get_stats(s->qdev.conf.blk), &r->acct); 313 313 - trace_scsi_disk_read_complete(r->req.tag, r->qiov.size); 314 307 315 308 n = r->qiov.size / 512; 316 309 r->sector += n; ··· 319 312 320 313 done: 321 314 scsi_req_unref(&r->req); 315 315 + } 316 316 + 317 317 + static void scsi_read_complete(void *opaque, int ret) 318 318 + { 319 319 + SCSIDiskReq *r = (SCSIDiskReq *)opaque; 320 320 + SCSIDiskState *s = DO_UPCAST(SCSIDiskState, qdev, r->req.dev); 321 321 + 322 322 + assert(r->req.aiocb != NULL); 323 323 + r->req.aiocb = NULL; 324 324 + 325 325 + aio_context_acquire(blk_get_aio_context(s->qdev.conf.blk)); 326 326 + if (ret < 0) { 327 327 + block_acct_failed(blk_get_stats(s->qdev.conf.blk), &r->acct); 328 328 + } else { 329 329 + block_acct_done(blk_get_stats(s->qdev.conf.blk), &r->acct); 330 330 + trace_scsi_disk_read_complete(r->req.tag, r->qiov.size); 331 331 + } 332 332 + scsi_read_complete_noio(r, ret); 322 333 aio_context_release(blk_get_aio_context(s->qdev.conf.blk)); 323 334 } 324 335 ··· 395 406 scsi_req_ref(&r->req); 396 407 if (r->req.cmd.mode == SCSI_XFER_TO_DEV) { 397 408 trace_scsi_disk_read_data_invalid(); 398 398 - scsi_read_complete(r, -EINVAL); 409 409 + scsi_read_complete_noio(r, -EINVAL); 399 410 return; 400 411 } 401 412 402 413 if (!blk_is_available(req->dev->conf.blk)) { 403 403 - scsi_read_complete(r, -ENOMEDIUM); 414 414 + scsi_read_complete_noio(r, -ENOMEDIUM); 404 415 return; 405 416 } 406 417

+3 -3

hw/scsi/trace-events

··· 268 268 lsi_wait_reselect(void) "Wait Reselect" 269 269 lsi_execute_script(uint32_t dsp, uint32_t insn, uint32_t addr) "SCRIPTS dsp=0x%"PRIx32" opcode 0x%"PRIx32" arg 0x%"PRIx32 270 270 lsi_execute_script_blockmove_delayed(void) "Delayed select timeout" 271 271 - lsi_execute_script_blockmove_badphase(uint8_t phase, uint8_t expected) "Wrong phase got %d expected %d" 271 271 + lsi_execute_script_blockmove_badphase(const char *phase, const char *expected) "Wrong phase got %s expected %s" 272 272 lsi_execute_script_io_alreadyreselected(void) "Already reselected, jumping to alternative address" 273 273 lsi_execute_script_io_selected(uint8_t id, const char *atn) "Selected target %d%s" 274 274 lsi_execute_script_io_disconnect(void) "Wait Disconnect" ··· 278 278 lsi_execute_script_tc_nop(void) "NOP" 279 279 lsi_execute_script_tc_delayedselect_timeout(void) "Delayed select timeout" 280 280 lsi_execute_script_tc_compc(int result) "Compare carry %d" 281 281 - lsi_execute_script_tc_compp(uint8_t phase, int op, uint8_t insn_phase) "Compare phase %d %c= %d" 282 282 - lsi_execute_script_tc_compd(uint32_t sfbr, uint8_t mask, int op, int result) "Compare data 0x%"PRIx32" & 0x%x %c= 0x%x" 281 281 + lsi_execute_script_tc_compp(const char *phase, char op, const char *insn_phase) "Compare phase %s %c= %s" 282 282 + lsi_execute_script_tc_compd(uint32_t sfbr, uint8_t mask, char op, int result) "Compare data 0x%"PRIx32" & 0x%x %c= 0x%x" 283 283 lsi_execute_script_tc_jump(uint32_t addr) "Jump to 0x%"PRIx32 284 284 lsi_execute_script_tc_call(uint32_t addr) "Call 0x%"PRIx32 285 285 lsi_execute_script_tc_return(uint32_t addr) "Return to 0x%"PRIx32

+7 -1

hw/scsi/virtio-scsi.c

··· 262 262 /* Here VIRTIO_SCSI_S_OK means "FUNCTION COMPLETE". */ 263 263 req->resp.tmf.response = VIRTIO_SCSI_S_OK; 264 264 265 265 - virtio_tswap32s(VIRTIO_DEVICE(s), &req->req.tmf.subtype); 265 265 + /* 266 266 + * req->req.tmf has the QEMU_PACKED attribute. Don't use virtio_tswap32s() 267 267 + * to avoid compiler errors. 268 268 + */ 269 269 + req->req.tmf.subtype = 270 270 + virtio_tswap32(VIRTIO_DEVICE(s), req->req.tmf.subtype); 271 271 + 266 272 switch (req->req.tmf.subtype) { 267 273 case VIRTIO_SCSI_T_TMF_ABORT_TASK: 268 274 case VIRTIO_SCSI_T_TMF_QUERY_TASK:

+2 -1

hw/vfio/Kconfig

··· 4 4 5 5 config VFIO_PCI 6 6 bool 7 7 + default y 7 8 select VFIO 8 8 - depends on LINUX 9 9 + depends on LINUX && PCI 9 10 10 11 config VFIO_CCW 11 12 bool

+1 -4

memory.c

··· 932 932 } else if (frold && frnew && flatrange_equal(frold, frnew)) { 933 933 /* In both and unchanged (except logging may have changed) */ 934 934 935 935 - if (!adding) { 936 936 - flat_range_coalesced_io_del(frold, as); 937 937 - } else { 935 935 + if (adding) { 938 936 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); 939 937 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { 940 938 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, ··· 946 944 frold->dirty_log_mask, 947 945 frnew->dirty_log_mask); 948 946 } 949 949 - flat_range_coalesced_io_add(frnew, as); 950 947 } 951 948 952 949 ++iold;

+6

qapi/char.json

··· 248 248 # @addr: socket address to listen on (server=true) 249 249 # or connect to (server=false) 250 250 # @tls-creds: the ID of the TLS credentials object (since 2.6) 251 251 + # @tls-authz: the ID of the QAuthZ authorization object against which 252 252 + # the client's x509 distinguished name will be validated. This 253 253 + # object is only resolved at time of use, so can be deleted 254 254 + # and recreated on the fly while the chardev server is active. 255 255 + # If missing, it will default to denying access (since 4.0) 251 256 # @server: create server socket (default: true) 252 257 # @wait: wait for incoming connection on server 253 258 # sockets (default: false). ··· 268 273 { 'struct': 'ChardevSocket', 269 274 'data': { 'addr': 'SocketAddressLegacy', 270 275 '*tls-creds': 'str', 276 276 + '*tls-authz' : 'str', 271 277 '*server': 'bool', 272 278 '*wait': 'bool', 273 279 '*nodelay': 'bool',

+8 -2

qemu-options.hx

··· 2428 2428 "-chardev null,id=id[,mux=on|off][,logfile=PATH][,logappend=on|off]\n" 2429 2429 "-chardev socket,id=id[,host=host],port=port[,to=to][,ipv4][,ipv6][,nodelay][,reconnect=seconds]\n" 2430 2430 " [,server][,nowait][,telnet][,websocket][,reconnect=seconds][,mux=on|off]\n" 2431 2431 - " [,logfile=PATH][,logappend=on|off][,tls-creds=ID] (tcp)\n" 2431 2431 + " [,logfile=PATH][,logappend=on|off][,tls-creds=ID][,tls-authz=ID] (tcp)\n" 2432 2432 "-chardev socket,id=id,path=path[,server][,nowait][,telnet][,websocket][,reconnect=seconds]\n" 2433 2433 " [,mux=on|off][,logfile=PATH][,logappend=on|off] (unix)\n" 2434 2434 "-chardev udp,id=id[,host=host],port=port[,localaddr=localaddr]\n" ··· 2557 2557 A void device. This device will not emit any data, and will drop any data it 2558 2558 receives. The null backend does not take any options. 2559 2559 2560 2560 - @item -chardev socket,id=@var{id}[,@var{TCP options} or @var{unix options}][,server][,nowait][,telnet][,websocket][,reconnect=@var{seconds}][,tls-creds=@var{id}] 2560 2560 + @item -chardev socket,id=@var{id}[,@var{TCP options} or @var{unix options}][,server][,nowait][,telnet][,websocket][,reconnect=@var{seconds}][,tls-creds=@var{id}][,tls-authz=@var{id}] 2561 2561 2562 2562 Create a two-way stream socket, which can be either a TCP or a unix socket. A 2563 2563 unix socket will be created if @option{path} is specified. Behaviour is ··· 2582 2582 and specifies the id of the TLS credentials to use for the handshake. The 2583 2583 credentials must be previously created with the @option{-object tls-creds} 2584 2584 argument. 2585 2585 + 2586 2586 + @option{tls-auth} provides the ID of the QAuthZ authorization object against 2587 2587 + which the client's x509 distinguished name will be validated. This object is 2588 2588 + only resolved at time of use, so can be deleted and recreated on the fly 2589 2589 + while the chardev server is active. If missing, it will default to denying 2590 2590 + access. 2585 2591 2586 2592 TCP and unix socket options are given below: 2587 2593

+3

qom/cpu.c

··· 380 380 381 381 static void cpu_common_finalize(Object *obj) 382 382 { 383 383 + CPUState *cpu = CPU(obj); 384 384 + 385 385 + qemu_mutex_destroy(&cpu->work_mutex); 383 386 } 384 387 385 388 static int64_t cpu_common_get_arch_id(CPUState *cpu)

+2 -5

scripts/qemu-gdb.py

··· 7 7 # Authors: 8 8 # Avi Kivity <avi@redhat.com> 9 9 # 10 10 - # This work is licensed under the terms of the GNU GPL, version 2. See 11 11 - # the COPYING file in the top-level directory. 12 12 - # 13 13 - # Contributions after 2012-01-13 are licensed under the terms of the 14 14 - # GNU GPL, version 2 or (at your option) any later version. 10 10 + # This work is licensed under the terms of the GNU GPL, version 2 or 11 11 + # later. See the COPYING file in the top-level directory. 15 12 16 13 # Usage: 17 14 # At the (gdb) prompt, type "source scripts/qemu-gdb.py".

+2 -5

scripts/qemugdb/coroutine.py

··· 7 7 # Authors: 8 8 # Avi Kivity <avi@redhat.com> 9 9 # 10 10 - # This work is licensed under the terms of the GNU GPL, version 2. See 11 11 - # the COPYING file in the top-level directory. 12 12 - # 13 13 - # Contributions after 2012-01-13 are licensed under the terms of the 14 14 - # GNU GPL, version 2 or (at your option) any later version. 10 10 + # This work is licensed under the terms of the GNU GPL, version 2 11 11 + # or later. See the COPYING file in the top-level directory. 15 12 16 13 import gdb 17 14

+2 -5

scripts/qemugdb/mtree.py

··· 7 7 # Authors: 8 8 # Avi Kivity <avi@redhat.com> 9 9 # 10 10 - # This work is licensed under the terms of the GNU GPL, version 2. See 11 11 - # the COPYING file in the top-level directory. 12 12 - # 13 13 - # Contributions after 2012-01-13 are licensed under the terms of the 14 14 - # GNU GPL, version 2 or (at your option) any later version. 10 10 + # This work is licensed under the terms of the GNU GPL, version 2 or 11 11 + # later. See the COPYING file in the top-level directory. 15 12 16 13 # 'qemu mtree' -- display the memory hierarchy 17 14

+2 -5

scripts/qemugdb/tcg.py

··· 8 8 # Authors: 9 9 # Alex Bennée <alex.bennee@linaro.org> 10 10 # 11 11 - # This work is licensed under the terms of the GNU GPL, version 2. See 12 12 - # the COPYING file in the top-level directory. 13 13 - # 14 14 - # Contributions after 2012-01-13 are licensed under the terms of the 15 15 - # GNU GPL, version 2 or (at your option) any later version. 11 11 + # This work is licensed under the terms of the GNU GPL, version 2 or 12 12 + # later. See the COPYING file in the top-level directory. 16 13 17 14 # 'qemu tcg-lock-status' -- display the TCG lock status across threads 18 15

+1 -1

target/i386/Makefile.objs

··· 3 3 obj-$(CONFIG_TCG) += bpt_helper.o cc_helper.o excp_helper.o fpu_helper.o 4 4 obj-$(CONFIG_TCG) += int_helper.o mem_helper.o misc_helper.o mpx_helper.o 5 5 obj-$(CONFIG_TCG) += seg_helper.o smm_helper.o svm_helper.o 6 6 + obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o 6 7 ifeq ($(CONFIG_SOFTMMU),y) 7 8 obj-y += machine.o arch_memory_mapping.o arch_dump.o monitor.o 8 9 obj-$(CONFIG_KVM) += kvm.o 9 9 - obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o 10 10 obj-$(CONFIG_HYPERV) += hyperv.o 11 11 obj-$(call lnot,$(CONFIG_HYPERV)) += hyperv-stub.o 12 12 ifeq ($(CONFIG_WIN32),y)

+9

target/i386/cpu.c

··· 5031 5031 x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); 5032 5032 x86_cpu_adjust_feat_level(cpu, FEAT_SVM); 5033 5033 x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); 5034 5034 + 5035 5035 + /* Intel Processor Trace requires CPUID[0x14] */ 5036 5036 + if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) && 5037 5037 + kvm_enabled() && cpu->intel_pt_auto_level) { 5038 5038 + x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); 5039 5039 + } 5040 5040 + 5034 5041 /* SVM requires CPUID[0x8000000A] */ 5035 5042 if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { 5036 5043 x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); ··· 5824 5831 DEFINE_PROP_INT32("x-hv-max-vps", X86CPU, hv_max_vps, -1), 5825 5832 DEFINE_PROP_BOOL("x-hv-synic-kvm-only", X86CPU, hyperv_synic_kvm_only, 5826 5833 false), 5834 5834 + DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level, 5835 5835 + true), 5827 5836 DEFINE_PROP_END_OF_LIST() 5828 5837 }; 5829 5838

+3

target/i386/cpu.h

··· 1454 1454 /* Enable auto level-increase for all CPUID leaves */ 1455 1455 bool full_cpuid_auto_level; 1456 1456 1457 1457 + /* Enable auto level-increase for Intel Processor Trace leave */ 1458 1458 + bool intel_pt_auto_level; 1459 1459 + 1457 1460 /* if true fill the top bits of the MTRR_PHYSMASKn variable range */ 1458 1461 bool fill_mtrr_mask; 1459 1462

+2 -1

tests/test-qgraph.c

··· 122 122 static void check_test(const char *test, const char *interface) 123 123 { 124 124 QOSGraphEdge *edge; 125 125 - const char *full_name = g_strdup_printf("%s-tests/%s", interface, test); 125 125 + char *full_name = g_strdup_printf("%s-tests/%s", interface, test); 126 126 127 127 qos_add_test(test, interface, testfunct, NULL); 128 128 g_assert_cmpint(qos_graph_has_machine(test), ==, FALSE); ··· 138 138 g_assert_cmpint(qos_graph_get_node_availability(full_name), ==, TRUE); 139 139 qos_graph_node_set_availability(full_name, FALSE); 140 140 g_assert_cmpint(qos_graph_get_node_availability(full_name), ==, FALSE); 141 141 + g_free(full_name); 141 142 } 142 143 143 144 static void count_each_test(QOSGraphNode *path, int len)

+2 -2

trace/Makefile.objs

··· 36 36 37 37 $(obj)/generated-helpers.o: $(obj)/generated-helpers.c 38 38 39 39 - target-obj-y += generated-helpers.o 39 39 + obj-y += generated-helpers.o 40 40 41 41 42 42 $(obj)/generated-tcg-tracers.h: $(obj)/generated-tcg-tracers.h-timestamp ··· 55 55 util-obj-$(CONFIG_TRACE_SIMPLE) += simple.o 56 56 util-obj-$(CONFIG_TRACE_FTRACE) += ftrace.o 57 57 util-obj-y += control.o 58 58 - target-obj-y += control-target.o 58 58 + obj-y += control-target.o 59 59 util-obj-y += qmp.o

+12

util/oslib-posix.c

··· 244 244 f = fcntl(fd, F_GETFL); 245 245 assert(f != -1); 246 246 f = fcntl(fd, F_SETFL, f | O_NONBLOCK); 247 247 + #ifdef __OpenBSD__ 248 248 + if (f == -1) { 249 249 + /* 250 250 + * Previous to OpenBSD 6.3, fcntl(F_SETFL) is not permitted on 251 251 + * memory devices and sets errno to ENODEV. 252 252 + * It's OK if we fail to set O_NONBLOCK on devices like /dev/null, 253 253 + * because they will never block anyway. 254 254 + */ 255 255 + assert(errno == ENODEV); 256 256 + } 257 257 + #else 247 258 assert(f != -1); 259 259 + #endif 248 260 } 249 261 250 262 int socket_set_fast_reuse(int fd)