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hw/pci/pci_bridge: Correct pci_bridge_io memory region size

memory_region_set_size() handle the 16 Exabytes limit by
special-casing the UINT64_MAX value. This is not a problem
for the 32-bit maximum, 4 GiB.
By using the UINT32_MAX value, the pci_bridge_io MemoryRegion
ends up missing 1 byte:

(qemu) info mtree
memory-region: pci_bridge_io
0000000000000000-00000000fffffffe (prio 0, i/o): pci_bridge_io
0000000000000060-0000000000000060 (prio 0, i/o): i8042-data
0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd
00000000000001ce-00000000000001d1 (prio 0, i/o): vbe
0000000000000378-000000000000037f (prio 0, i/o): parallel
00000000000003b4-00000000000003b5 (prio 0, i/o): vga
...

Fix by using the correct value. We now have:

memory-region: pci_bridge_io
0000000000000000-00000000ffffffff (prio 0, i/o): pci_bridge_io
0000000000000060-0000000000000060 (prio 0, i/o): i8042-data
0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd
...

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200601142930.29408-4-f4bug@amsat.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

authored by

Philippe Mathieu-Daudé and committed by
Michael S. Tsirkin 2dc48da2 ea2fe4df

+2 -1
+2 -1
hw/pci/pci_bridge.c
··· 30 30 */ 31 31 32 32 #include "qemu/osdep.h" 33 + #include "qemu/units.h" 33 34 #include "hw/pci/pci_bridge.h" 34 35 #include "hw/pci/pci_bus.h" 35 36 #include "qemu/module.h" ··· 381 382 memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", UINT64_MAX); 382 383 sec_bus->address_space_io = &br->address_space_io; 383 384 memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io", 384 - UINT32_MAX); 385 + 4 * GiB); 385 386 br->windows = pci_bridge_region_init(br); 386 387 QLIST_INIT(&sec_bus->child); 387 388 QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling);