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qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio
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ati-vga: Add dummy MEM_SDRAM_MODE_REG

Radeon chips have an SDRAM mode reg that is accessed by some drivers.
We don't emulate the memory controller but provide some default value
to prevent drivers getting unexpected 0.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-id: cc1324b9ef06beb8ae233ddc77dedd8bab9b8624.1592737958.git.balaton@eik.bme.hu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>

authored by

BALATON Zoltan and committed by
Gerd Hoffmann 2bbcaa7c 41977c65

+7
+5
hw/display/ati.c
··· 361 361 case MC_STATUS: 362 362 val = 5; 363 363 break; 364 + case MEM_SDRAM_MODE_REG: 365 + if (s->dev_id != PCI_DEVICE_ID_ATI_RAGE128_PF) { 366 + val = BIT(28) | BIT(20); 367 + } 368 + break; 364 369 case RBBM_STATUS: 365 370 case GUI_STAT: 366 371 val = 64; /* free CMDFIFO entries */
+1
hw/display/ati_dbg.c
··· 42 42 {"MC_FB_LOCATION", 0x0148}, 43 43 {"MC_AGP_LOCATION", 0x014C}, 44 44 {"MC_STATUS", 0x0150}, 45 + {"MEM_SDRAM_MODE_REG", 0x0158}, 45 46 {"MEM_POWER_MISC", 0x015c}, 46 47 {"AGP_BASE", 0x0170}, 47 48 {"AGP_CNTL", 0x0174},
+1
hw/display/ati_regs.h
··· 60 60 #define MC_FB_LOCATION 0x0148 61 61 #define MC_AGP_LOCATION 0x014C 62 62 #define MC_STATUS 0x0150 63 + #define MEM_SDRAM_MODE_REG 0x0158 63 64 #define MEM_POWER_MISC 0x015c 64 65 #define AGP_BASE 0x0170 65 66 #define AGP_CNTL 0x0174