qemu with hax to log dma reads & writes jcs.org/2018/11/12/vfio

target-ppc: gdbstub: Add VSX support

Add the XML and functions to get and set VSX registers.

Signed-off-by: Anton Blanchard <anton@samba.org>
(fixed little-endian guests)
Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

authored by

Anton Blanchard and committed by
David Gibson
1438eff3 95f5b540

+71 -3
+3 -3
configure
··· 5702 5702 ppc64) 5703 5703 TARGET_BASE_ARCH=ppc 5704 5704 TARGET_ABI_DIR=ppc 5705 - gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml" 5705 + gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml" 5706 5706 ;; 5707 5707 ppc64le) 5708 5708 TARGET_ARCH=ppc64 5709 5709 TARGET_BASE_ARCH=ppc 5710 5710 TARGET_ABI_DIR=ppc 5711 - gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml" 5711 + gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml" 5712 5712 ;; 5713 5713 ppc64abi32) 5714 5714 TARGET_ARCH=ppc64 5715 5715 TARGET_BASE_ARCH=ppc 5716 5716 TARGET_ABI_DIR=ppc 5717 5717 echo "TARGET_ABI32=y" >> $config_target_mak 5718 - gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml" 5718 + gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml" 5719 5719 ;; 5720 5720 sh4|sh4eb) 5721 5721 TARGET_ARCH=sh4
+44
gdb-xml/power-vsx.xml
··· 1 + <?xml version="1.0"?> 2 + <!-- Copyright (C) 2008-2015 Free Software Foundation, Inc. 3 + 4 + Copying and distribution of this file, with or without modification, 5 + are permitted in any medium without royalty provided the copyright 6 + notice and this notice are preserved. --> 7 + 8 + <!-- POWER7 VSX registers that do not overlap existing FP and VMX 9 + registers. --> 10 + <!DOCTYPE feature SYSTEM "gdb-target.dtd"> 11 + <feature name="org.gnu.gdb.power.vsx"> 12 + <reg name="vs0h" bitsize="64" type="uint64"/> 13 + <reg name="vs1h" bitsize="64" type="uint64"/> 14 + <reg name="vs2h" bitsize="64" type="uint64"/> 15 + <reg name="vs3h" bitsize="64" type="uint64"/> 16 + <reg name="vs4h" bitsize="64" type="uint64"/> 17 + <reg name="vs5h" bitsize="64" type="uint64"/> 18 + <reg name="vs6h" bitsize="64" type="uint64"/> 19 + <reg name="vs7h" bitsize="64" type="uint64"/> 20 + <reg name="vs8h" bitsize="64" type="uint64"/> 21 + <reg name="vs9h" bitsize="64" type="uint64"/> 22 + <reg name="vs10h" bitsize="64" type="uint64"/> 23 + <reg name="vs11h" bitsize="64" type="uint64"/> 24 + <reg name="vs12h" bitsize="64" type="uint64"/> 25 + <reg name="vs13h" bitsize="64" type="uint64"/> 26 + <reg name="vs14h" bitsize="64" type="uint64"/> 27 + <reg name="vs15h" bitsize="64" type="uint64"/> 28 + <reg name="vs16h" bitsize="64" type="uint64"/> 29 + <reg name="vs17h" bitsize="64" type="uint64"/> 30 + <reg name="vs18h" bitsize="64" type="uint64"/> 31 + <reg name="vs19h" bitsize="64" type="uint64"/> 32 + <reg name="vs20h" bitsize="64" type="uint64"/> 33 + <reg name="vs21h" bitsize="64" type="uint64"/> 34 + <reg name="vs22h" bitsize="64" type="uint64"/> 35 + <reg name="vs23h" bitsize="64" type="uint64"/> 36 + <reg name="vs24h" bitsize="64" type="uint64"/> 37 + <reg name="vs25h" bitsize="64" type="uint64"/> 38 + <reg name="vs26h" bitsize="64" type="uint64"/> 39 + <reg name="vs27h" bitsize="64" type="uint64"/> 40 + <reg name="vs28h" bitsize="64" type="uint64"/> 41 + <reg name="vs29h" bitsize="64" type="uint64"/> 42 + <reg name="vs30h" bitsize="64" type="uint64"/> 43 + <reg name="vs31h" bitsize="64" type="uint64"/> 44 + </feature>
+24
target-ppc/translate_init.c
··· 8896 8896 return 0; 8897 8897 } 8898 8898 8899 + static int gdb_get_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n) 8900 + { 8901 + if (n < 32) { 8902 + stq_p(mem_buf, env->vsr[n]); 8903 + ppc_maybe_bswap_register(env, mem_buf, 8); 8904 + return 8; 8905 + } 8906 + return 0; 8907 + } 8908 + 8909 + static int gdb_set_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n) 8910 + { 8911 + if (n < 32) { 8912 + ppc_maybe_bswap_register(env, mem_buf, 8); 8913 + env->vsr[n] = ldq_p(mem_buf); 8914 + return 8; 8915 + } 8916 + return 0; 8917 + } 8918 + 8899 8919 static int ppc_fixup_cpu(PowerPCCPU *cpu) 8900 8920 { 8901 8921 CPUPPCState *env = &cpu->env; ··· 9000 9020 if (pcc->insns_flags & PPC_SPE) { 9001 9021 gdb_register_coprocessor(cs, gdb_get_spe_reg, gdb_set_spe_reg, 9002 9022 34, "power-spe.xml", 0); 9023 + } 9024 + if (pcc->insns_flags2 & PPC2_VSX) { 9025 + gdb_register_coprocessor(cs, gdb_get_vsx_reg, gdb_set_vsx_reg, 9026 + 32, "power-vsx.xml", 0); 9003 9027 } 9004 9028 9005 9029 qemu_init_vcpu(cs);