jcs.org
qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
omap-i2c: remove PROP_PTR
Since clocks are not QOM objects, replace PROP_PTR of clocks with
setters methods.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Corey Minyard <cminyard@mvista.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+30
-12
+1
-1
hw/arm/omap1.c
+1
-1
hw/arm/omap1.c
···
4030
4030
4031
4031
s->i2c[0] = qdev_create(NULL, "omap_i2c");
4032
4032
qdev_prop_set_uint8(s->i2c[0], "revision", 0x11);
4033
-
qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "mpuper_ck"));
4033
+
omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "mpuper_ck"));
4034
4034
qdev_init_nofail(s->i2c[0]);
4035
4035
busdev = SYS_BUS_DEVICE(s->i2c[0]);
4036
4036
sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C));
+4
-4
hw/arm/omap2.c
+4
-4
hw/arm/omap2.c
···
2425
2425
2426
2426
s->i2c[0] = qdev_create(NULL, "omap_i2c");
2427
2427
qdev_prop_set_uint8(s->i2c[0], "revision", 0x34);
2428
-
qdev_prop_set_ptr(s->i2c[0], "iclk", omap_findclk(s, "i2c1.iclk"));
2429
-
qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "i2c1.fclk"));
2428
+
omap_i2c_set_iclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.iclk"));
2429
+
omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.fclk"));
2430
2430
qdev_init_nofail(s->i2c[0]);
2431
2431
busdev = SYS_BUS_DEVICE(s->i2c[0]);
2432
2432
sysbus_connect_irq(busdev, 0,
···
2437
2437
2438
2438
s->i2c[1] = qdev_create(NULL, "omap_i2c");
2439
2439
qdev_prop_set_uint8(s->i2c[1], "revision", 0x34);
2440
-
qdev_prop_set_ptr(s->i2c[1], "iclk", omap_findclk(s, "i2c2.iclk"));
2441
-
qdev_prop_set_ptr(s->i2c[1], "fclk", omap_findclk(s, "i2c2.fclk"));
2440
+
omap_i2c_set_iclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.iclk"));
2441
+
omap_i2c_set_fclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.fclk"));
2442
2442
qdev_init_nofail(s->i2c[1]);
2443
2443
busdev = SYS_BUS_DEVICE(s->i2c[1]);
2444
2444
sysbus_connect_irq(busdev, 0,
+12
-7
hw/i2c/omap_i2c.c
+12
-7
hw/i2c/omap_i2c.c
···
28
28
#include "qemu/error-report.h"
29
29
#include "qapi/error.h"
30
30
31
-
#define TYPE_OMAP_I2C "omap_i2c"
32
-
#define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C)
33
-
34
-
typedef struct OMAPI2CState {
31
+
struct OMAPI2CState {
35
32
SysBusDevice parent_obj;
36
33
37
34
MemoryRegion iomem;
···
56
53
uint8_t divider;
57
54
uint8_t times[2];
58
55
uint16_t test;
59
-
} OMAPI2CState;
56
+
};
60
57
61
58
#define OMAP2_INTR_REV 0x34
62
59
#define OMAP2_GC_REV 0x34
···
504
501
}
505
502
}
506
503
504
+
void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk)
505
+
{
506
+
i2c->iclk = clk;
507
+
}
508
+
509
+
void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk)
510
+
{
511
+
i2c->fclk = clk;
512
+
}
513
+
507
514
static Property omap_i2c_properties[] = {
508
515
DEFINE_PROP_UINT8("revision", OMAPI2CState, revision, 0),
509
-
DEFINE_PROP_PTR("iclk", OMAPI2CState, iclk),
510
-
DEFINE_PROP_PTR("fclk", OMAPI2CState, fclk),
511
516
DEFINE_PROP_END_OF_LIST(),
512
517
};
513
518
+13
include/hw/arm/omap.h
+13
include/hw/arm/omap.h
···
81
81
void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk);
82
82
void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk);
83
83
84
+
/* omap_i2c.c */
85
+
#define TYPE_OMAP_I2C "omap_i2c"
86
+
#define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C)
87
+
88
+
typedef struct OMAPI2CState OMAPI2CState;
89
+
90
+
/*
91
+
* TODO: Ideally we should have a clock framework that
92
+
* let us wire these clocks up with QOM properties or links.
93
+
*/
94
+
void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk);
95
+
void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk);
96
+
84
97
/* OMAP2 l4 Interconnect */
85
98
struct omap_l4_s;
86
99
struct omap_l4_region_s {