jcs.org
qemu with hax to log dma reads & writes
jcs.org/2018/11/12/vfio
acpi: factor out fw_cfg_add_acpi_dsdt()
Add helper function to add fw_cfg device,
also move code to hw/i386/fw_cfg.c.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200619091905.21676-8-kraxel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
authored by
Gerd Hoffmann
and committed by
Michael S. Tsirkin
0575c2fd
df0f3d13
+30
-23
+1
-23
hw/i386/acpi-build.c
+1
-23
hw/i386/acpi-build.c
···
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/* create fw_cfg node, unconditionally */
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{
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-
/* when using port i/o, the 8-bit data register *always* overlaps
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* with half of the 16-bit control register. Hence, the total size
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* of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the
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* DMA control register is located at FW_CFG_DMA_IO_BASE + 4 */
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uint8_t io_size = object_property_get_bool(OBJECT(x86ms->fw_cfg),
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"dma_enabled", NULL) ?
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ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) :
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FW_CFG_CTL_SIZE;
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-
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scope = aml_scope("\\_SB.PCI0");
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dev = aml_device("FWCF");
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aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002")));
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-
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/* device present, functioning, decoding, not shown in UI */
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aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
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crs = aml_resource_template();
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aml_append(crs,
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aml_io(AML_DECODE16, FW_CFG_IO_BASE, FW_CFG_IO_BASE, 0x01, io_size)
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);
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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fw_cfg_add_acpi_dsdt(scope, x86ms->fw_cfg);
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aml_append(dsdt, scope);
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}
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+28
hw/i386/fw_cfg.c
+28
hw/i386/fw_cfg.c
···
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#include "qemu/osdep.h"
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#include "sysemu/numa.h"
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#include "hw/acpi/acpi.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/firmware/smbios.h"
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#include "hw/i386/fw_cfg.h"
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#include "hw/timer/hpet.h"
···
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*val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
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fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
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}
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+
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void fw_cfg_add_acpi_dsdt(Aml *scope, FWCfgState *fw_cfg)
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{
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/*
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* when using port i/o, the 8-bit data register *always* overlaps
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* with half of the 16-bit control register. Hence, the total size
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* of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the
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* DMA control register is located at FW_CFG_DMA_IO_BASE + 4
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*/
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Object *obj = OBJECT(fw_cfg);
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uint8_t io_size = object_property_get_bool(obj, "dma_enabled", NULL) ?
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ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) :
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FW_CFG_CTL_SIZE;
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Aml *dev = aml_device("FWCF");
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Aml *crs = aml_resource_template();
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aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002")));
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/* device present, functioning, decoding, not shown in UI */
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aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
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aml_append(crs,
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aml_io(AML_DECODE16, FW_CFG_IO_BASE, FW_CFG_IO_BASE, 0x01, io_size));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}