dunkirk.sh
optimizing a gate level bcm to the end of the earth and back
1"""Command-line interface for BCD to 7-segment optimization."""
2
3import argparse
4import sys
5
6from .solver import BCDTo7SegmentSolver
7from .truth_tables import print_truth_table
8from .export import to_verilog, to_c_code, to_equations
9
10
11def main():
12 parser = argparse.ArgumentParser(
13 description="Optimize BCD to 7-segment decoder gate inputs",
14 formatter_class=argparse.RawDescriptionHelpFormatter,
15 epilog="""
16Examples:
17 bcd-optimize Run with default settings
18 bcd-optimize --target 20 Try to beat 20 gate inputs
19 bcd-optimize --exact Use SAT-based exact synthesis
20 bcd-optimize --truth-table Show the BCD truth table
21 bcd-optimize --format verilog Output as Verilog module
22 bcd-optimize --format c Output as C function
23 """,
24 )
25
26 parser.add_argument(
27 "--target",
28 type=int,
29 default=23,
30 help="Target gate input count to beat (default: 23)",
31 )
32 parser.add_argument(
33 "--exact",
34 action="store_true",
35 help="Use SAT-based exact synthesis (slower but optimal)",
36 )
37 parser.add_argument(
38 "--truth-table",
39 action="store_true",
40 help="Print the BCD to 7-segment truth table and exit",
41 )
42 parser.add_argument(
43 "--format", "-f",
44 choices=["text", "verilog", "c", "equations"],
45 default="text",
46 help="Output format (default: text)",
47 )
48 parser.add_argument(
49 "--verbose", "-v",
50 action="store_true",
51 help="Verbose output",
52 )
53
54 args = parser.parse_args()
55
56 if args.truth_table:
57 print_truth_table()
58 return 0
59
60 # Suppress progress output for non-text formats
61 quiet = args.format != "text"
62
63 if not quiet:
64 print("BCD to 7-Segment Decoder Optimizer")
65 print("=" * 40)
66 print(f"Target: < {args.target} gate inputs")
67 print()
68
69 solver = BCDTo7SegmentSolver()
70
71 try:
72 # Temporarily redirect stdout for quiet mode
73 if quiet:
74 import io
75 old_stdout = sys.stdout
76 sys.stdout = io.StringIO()
77
78 result = solver.solve(target_cost=args.target, use_exact=args.exact)
79
80 if quiet:
81 sys.stdout = old_stdout
82
83 # Output in requested format
84 if args.format == "verilog":
85 print(to_verilog(result))
86 elif args.format == "c":
87 print(to_c_code(result))
88 elif args.format == "equations":
89 print(to_equations(result))
90 else:
91 print()
92 solver.print_result(result)
93
94 if result.cost < args.target:
95 print(f"\n✓ SUCCESS: Beat target by {args.target - result.cost} gate inputs!")
96 else:
97 print(f"\n✗ Did not beat target (need {result.cost - args.target + 1} more reduction)")
98
99 return 0 if result.cost < args.target else 1
100
101 except Exception as e:
102 if quiet:
103 sys.stdout = old_stdout
104 print(f"Error: {e}", file=sys.stderr)
105 if args.verbose:
106 import traceback
107 traceback.print_exc()
108 return 1
109
110
111if __name__ == "__main__":
112 sys.exit(main())