tsiry-sandratraina.com
A modern Music Player Daemon based on Rockbox open source high quality audio player
libadwaita
audio
rust
zig
deno
mpris
rockbox
mpd
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Alan Korr
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22//#define LOGF_ENABLE
23
24#include <stdbool.h>
25#include <inttypes.h>
26#include "led.h"
27#include "cpu.h"
28#include "system.h"
29#include "debug.h"
30#include "panic.h"
31#include "power.h"
32#include "string.h"
33#include "ata-driver.h"
34#include "ata-defines.h"
35#include "fs_defines.h"
36#include "storage.h"
37#include "logf.h"
38
39#define SELECT_DEVICE1 0x10
40#define SELECT_LBA 0x40
41
42#define CONTROL_nIEN 0x02
43#define CONTROL_SRST 0x04
44
45#define CMD_READ_SECTORS 0x20
46#define CMD_WRITE_SECTORS 0x30
47#define CMD_WRITE_SECTORS_EXT 0x34
48#define CMD_READ_MULTIPLE 0xC4
49#define CMD_READ_MULTIPLE_EXT 0x29
50#define CMD_WRITE_MULTIPLE 0xC5
51#define CMD_WRITE_MULTIPLE_EXT 0x39
52#define CMD_SET_MULTIPLE_MODE 0xC6
53#ifdef HAVE_ATA_SMART
54#define CMD_SMART 0xB0
55#endif
56#define CMD_STANDBY_IMMEDIATE 0xE0
57#define CMD_STANDBY 0xE2
58#define CMD_IDENTIFY 0xEC
59#define CMD_SLEEP 0xE6
60#define CMD_FLUSH_CACHE 0xE7
61#define CMD_FLUSH_CACHE_EXT 0xEA
62#define CMD_SET_FEATURES 0xEF
63#define CMD_SECURITY_FREEZE_LOCK 0xF5
64#ifdef HAVE_ATA_DMA
65#define CMD_READ_DMA 0xC8
66#define CMD_READ_DMA_EXT 0x25
67#define CMD_WRITE_DMA 0xCA
68#define CMD_WRITE_DMA_EXT 0x35
69#endif
70
71#define READWRITE_TIMEOUT 5*HZ
72
73#ifdef HAVE_ATA_POWER_OFF
74#define ATA_POWER_OFF_TIMEOUT 2*HZ
75#endif
76
77#if defined(HAVE_USBSTACK)
78#define ATA_ACTIVE_IN_USB 1
79#else
80#define ATA_ACTIVE_IN_USB 0
81#endif
82
83enum {
84 ATA_BOOT = -1,
85 ATA_OFF,
86 ATA_SLEEPING,
87 ATA_SPINUP,
88 ATA_ON,
89};
90
91static int ata_state = ATA_BOOT;
92
93static int ata_device; /* device 0 (master) or 1 (slave) */
94
95#if (CONFIG_LED == LED_REAL)
96static bool ata_led_enabled = true;
97static bool ata_led_on = false;
98#endif
99
100static long sleep_timeout = 5*HZ;
101
102static long last_disk_activity = -1;
103#ifdef HAVE_ATA_POWER_OFF
104static long power_off_tick = 0;
105#endif
106
107static uint8_t multisectors; /* number of supported multisectors */
108
109#ifdef HAVE_ATA_DMA
110static int dma_mode = 0;
111#endif
112
113#ifdef HAVE_ATA_POWER_OFF
114static int ata_power_on(void);
115#endif
116static int perform_soft_reset(void);
117static int set_multiple_mode(int sectors);
118static int set_features(void);
119
120static inline void keep_ata_active(void)
121{
122 last_disk_activity = current_tick;
123}
124
125static inline bool ata_sleep_timed_out(void)
126{
127 return sleep_timeout &&
128 TIME_AFTER(current_tick, last_disk_activity + sleep_timeout);
129}
130
131static inline bool ata_power_off_timed_out(void)
132{
133#ifdef HAVE_ATA_POWER_OFF
134 return power_off_tick && TIME_AFTER(current_tick, power_off_tick);
135#else
136 return false;
137#endif
138}
139
140#include "ata-common.c"
141
142#ifndef ATA_TARGET_POLLING
143static ICODE_ATTR int wait_for_bsy(void)
144{
145 long timeout = current_tick + HZ*30;
146
147 do
148 {
149 if (!(ATA_IN8(ATA_STATUS) & STATUS_BSY))
150 return 1;
151 keep_ata_active();
152 yield();
153 } while (TIME_BEFORE(current_tick, timeout));
154
155 return 0; /* timeout */
156}
157
158static ICODE_ATTR int wait_for_rdy(void)
159{
160 long timeout;
161
162 if (!wait_for_bsy())
163 return 0;
164
165 timeout = current_tick + HZ*10;
166
167 do
168 {
169 if (ATA_IN8(ATA_ALT_STATUS) & STATUS_RDY)
170 return 1;
171 keep_ata_active();
172 yield();
173 } while (TIME_BEFORE(current_tick, timeout));
174
175 return 0; /* timeout */
176}
177#else
178#define wait_for_bsy ata_wait_for_bsy
179#define wait_for_rdy ata_wait_for_rdy
180#endif
181
182static int ata_perform_wakeup(int state)
183{
184 logf("ata WAKE %ld", current_tick);
185 if (state > ATA_OFF) {
186 if (perform_soft_reset()) {
187 return -1;
188 }
189 }
190#ifdef HAVE_ATA_POWER_OFF
191 else {
192 if (ata_power_on()) {
193 return -2;
194 }
195 }
196#endif
197
198 return 0;
199}
200
201static int ata_perform_sleep(void)
202{
203 /* If device doesn't support PM features, don't try to sleep. */
204 if (!ata_disk_can_sleep())
205 return 0; // XXX or return a failure?
206
207 logf("ata SLEEP %ld", current_tick);
208
209 ATA_OUT8(ATA_SELECT, ata_device);
210
211 if(!wait_for_rdy()) {
212 DEBUGF("ata_perform_sleep() - not RDY\n");
213 return -1;
214 }
215
216 /* STANDBY IMMEDIATE
217 - writes all cached data
218 - transitions to PM2:Standby
219 - enters Standby_z power condition
220
221 This places the device into a state where power-off is safe. We
222 will cut power at a later time.
223 */
224 ATA_OUT8(ATA_COMMAND, CMD_STANDBY_IMMEDIATE);
225
226 if (!wait_for_rdy()) {
227 DEBUGF("ata_perform_sleep() - CMD failed\n");
228 return -2;
229 }
230
231 return 0;
232}
233
234static int ata_perform_flush_cache(void)
235{
236 uint8_t cmd;
237
238 if (!canflush) {
239 return 0;
240#ifdef HAVE_LBA48
241 } else if (ata_lba48 && identify_info[83] & (1 << 13)) {
242 cmd = CMD_FLUSH_CACHE_EXT; /* Flag, optional, ATA-6 and up, for use with LBA48 devices */
243#endif
244 } else if (identify_info[83] & (1 << 12)) {
245 cmd = CMD_FLUSH_CACHE; /* Flag, mandatory, ATA-6 and up */
246 } else if (identify_info[80] >= (1 << 5)) { /* Use >= instead of '&' because bits lower than the latest standard we support don't have to be set */
247 cmd = CMD_FLUSH_CACHE; /* No flag, mandatory, ATA-5 (Optional for ATA-4) */
248 } else {
249 /* If neither (mandatory!) command is supported
250 then don't issue it. */
251 canflush = 0;
252 return 0;
253 }
254
255 logf("ata FLUSH CACHE %ld", current_tick);
256
257 ATA_OUT8(ATA_SELECT, ata_device);
258
259 if(!wait_for_rdy()) {
260 DEBUGF("ata_perform_flush_cache() - not RDY\n");
261 return -1;
262 }
263
264 ATA_OUT8(ATA_COMMAND, cmd);
265
266 if (!wait_for_rdy()) {
267 DEBUGF("ata_perform_flush_cache() - CMD failed\n");
268 return -2;
269 }
270
271 return 0;
272}
273
274int ata_flush(void)
275{
276 if (ata_state >= ATA_SPINUP) {
277 mutex_lock(&ata_mutex);
278 ata_perform_flush_cache();
279 mutex_unlock(&ata_mutex);
280 }
281 return 0;
282}
283
284static ICODE_ATTR int wait_for_start_of_transfer(void)
285{
286 if (!wait_for_bsy())
287 return 0;
288
289 return (ATA_IN8(ATA_ALT_STATUS) & (STATUS_BSY|STATUS_DRQ)) == STATUS_DRQ;
290}
291
292static ICODE_ATTR int wait_for_end_of_transfer(void)
293{
294 if (!wait_for_bsy())
295 return 0;
296 return (ATA_IN8(ATA_ALT_STATUS) &
297 (STATUS_BSY|STATUS_RDY|STATUS_DF|STATUS_DRQ|STATUS_ERR))
298 == STATUS_RDY;
299}
300
301#if (CONFIG_LED == LED_REAL)
302/* Conditionally block LED access for the ATA driver, so the LED can be
303 * (mis)used for other purposes */
304static void ata_led(bool on)
305{
306 ata_led_on = on;
307 if (ata_led_enabled)
308 led(ata_led_on);
309}
310#else
311#define ata_led(on) led(on)
312#endif
313
314#ifndef ATA_OPTIMIZED_READING
315static ICODE_ATTR void copy_read_sectors(unsigned char* buf, int wordcount)
316{
317 unsigned short tmp = 0;
318
319 if ( (unsigned long)buf & 1)
320 { /* not 16-bit aligned, copy byte by byte */
321 unsigned char* bufend = buf + wordcount*2;
322 do
323 {
324 tmp = ATA_IN16(ATA_DATA);
325#if defined(ROCKBOX_LITTLE_ENDIAN)
326 *buf++ = tmp & 0xff; /* I assume big endian */
327 *buf++ = tmp >> 8; /* and don't use the SWAB16 macro */
328#else
329 *buf++ = tmp >> 8;
330 *buf++ = tmp & 0xff;
331#endif
332 } while (buf < bufend); /* tail loop is faster */
333 }
334 else
335 { /* 16-bit aligned, can do faster copy */
336 unsigned short* wbuf = (unsigned short*)buf;
337 unsigned short* wbufend = wbuf + wordcount;
338 do
339 {
340 *wbuf = ATA_IN16(ATA_DATA);
341 } while (++wbuf < wbufend); /* tail loop is faster */
342 }
343}
344#endif /* !ATA_OPTIMIZED_READING */
345
346#ifndef ATA_OPTIMIZED_WRITING
347static ICODE_ATTR void copy_write_sectors(const unsigned char* buf,
348 int wordcount)
349{
350 if ( (unsigned long)buf & 1)
351 { /* not 16-bit aligned, copy byte by byte */
352 unsigned short tmp = 0;
353 const unsigned char* bufend = buf + wordcount*2;
354 do
355 {
356#if defined(ROCKBOX_LITTLE_ENDIAN)
357 tmp = (unsigned short) *buf++;
358 tmp |= (unsigned short) *buf++ << 8;
359#else
360 tmp = (unsigned short) *buf++ << 8;
361 tmp |= (unsigned short) *buf++;
362#endif
363 ATA_OUT16(ATA_DATA, tmp);
364 } while (buf < bufend); /* tail loop is faster */
365 }
366 else
367 { /* 16-bit aligned, can do faster copy */
368 unsigned short* wbuf = (unsigned short*)buf;
369 unsigned short* wbufend = wbuf + wordcount;
370 do
371 {
372 ATA_OUT16(ATA_DATA, *wbuf);
373 } while (++wbuf < wbufend); /* tail loop is faster */
374 }
375}
376#endif /* !ATA_OPTIMIZED_WRITING */
377
378static int ata_transfer_sectors(uint64_t start,
379 int incount,
380 void* inbuf,
381 int write)
382{
383 int ret = 0;
384 long timeout;
385 int count;
386 void* buf;
387 long spinup_start = spinup_start;
388#ifdef HAVE_ATA_DMA
389 bool usedma = false;
390#endif
391
392 if (start + incount > total_sectors) {
393 ret = -1;
394 goto error;
395 }
396
397 keep_ata_active();
398
399 ata_led(true);
400
401 if (ata_state < ATA_ON) {
402 spinup_start = current_tick;
403 int state = ata_state;
404 ata_state = ATA_SPINUP;
405 if (ata_perform_wakeup(state)) {
406 ret = -2;
407 goto error;
408 }
409 }
410
411 logf("ata XFER (%d) %d @ %llu", write, incount, start);
412
413 timeout = current_tick + READWRITE_TIMEOUT;
414
415 ATA_OUT8(ATA_SELECT, ata_device);
416 if (!wait_for_rdy())
417 {
418 ret = -3;
419 goto error;
420 }
421
422 retry:
423 buf = inbuf;
424 count = incount;
425 while (TIME_BEFORE(current_tick, timeout)) {
426 ret = 0;
427 keep_ata_active();
428
429#ifdef HAVE_ATA_DMA
430 /* If DMA is supported and parameters are ok for DMA, use it */
431 if (dma_mode && ata_dma_setup(inbuf, incount * log_sector_size, write))
432 usedma = true;
433#endif
434
435#ifdef HAVE_LBA48
436 if (ata_lba48)
437 {
438 ATA_OUT8(ATA_NSECTOR, count >> 8);
439 ATA_OUT8(ATA_NSECTOR, count & 0xff);
440 ATA_OUT8(ATA_SECTOR, (start >> 24) & 0xff); /* 31:24 */
441 ATA_OUT8(ATA_SECTOR, start & 0xff); /* 7:0 */
442 ATA_OUT8(ATA_LCYL, (start >> 32) & 0xff); /* 39:32 */
443 ATA_OUT8(ATA_LCYL, (start >> 8) & 0xff); /* 15:8 */
444 ATA_OUT8(ATA_HCYL, (start >> 40) & 0xff); /* 47:40 */
445 ATA_OUT8(ATA_HCYL, (start >> 16) & 0xff); /* 23:16 */
446 ATA_OUT8(ATA_SELECT, SELECT_LBA | ata_device);
447#ifdef HAVE_ATA_DMA
448 if (write)
449 ATA_OUT8(ATA_COMMAND, usedma ? CMD_WRITE_DMA_EXT : CMD_WRITE_MULTIPLE_EXT);
450 else
451 ATA_OUT8(ATA_COMMAND, usedma ? CMD_READ_DMA_EXT : CMD_READ_MULTIPLE_EXT);
452#else
453 ATA_OUT8(ATA_COMMAND, write ? CMD_WRITE_MULTIPLE_EXT : CMD_READ_MULTIPLE_EXT);
454#endif
455 }
456 else
457#endif
458 {
459 ATA_OUT8(ATA_NSECTOR, count & 0xff); /* 0 means 256 sectors */
460 ATA_OUT8(ATA_SECTOR, start & 0xff);
461 ATA_OUT8(ATA_LCYL, (start >> 8) & 0xff);
462 ATA_OUT8(ATA_HCYL, (start >> 16) & 0xff);
463 ATA_OUT8(ATA_SELECT, ((start >> 24) & 0xf) | SELECT_LBA | ata_device); /* LBA28, mask off upper 4 bits of 32-bit sector address */
464#ifdef HAVE_ATA_DMA
465 if (write)
466 ATA_OUT8(ATA_COMMAND, usedma ? CMD_WRITE_DMA : CMD_WRITE_MULTIPLE);
467 else
468 ATA_OUT8(ATA_COMMAND, usedma ? CMD_READ_DMA : CMD_READ_MULTIPLE);
469#else
470 ATA_OUT8(ATA_COMMAND, write ? CMD_WRITE_MULTIPLE : CMD_READ_MULTIPLE);
471#endif
472 }
473
474 /* wait at least 400ns between writing command and reading status */
475 __asm__ volatile ("nop");
476 __asm__ volatile ("nop");
477 __asm__ volatile ("nop");
478 __asm__ volatile ("nop");
479 __asm__ volatile ("nop");
480
481#ifdef HAVE_ATA_DMA
482 if (usedma) {
483 if (!ata_dma_finish())
484 ret = -7;
485
486 if (ret != 0) {
487 perform_soft_reset();
488 goto retry;
489 }
490
491 if (ata_state == ATA_SPINUP) {
492 ata_state = ATA_ON;
493 spinup_time = current_tick - spinup_start;
494 }
495 }
496 else
497#endif /* HAVE_ATA_DMA */
498 {
499 while (count) {
500 int sectors;
501 int wordcount;
502 int status;
503 int error;
504
505 if (!wait_for_start_of_transfer()) {
506 /* We have timed out waiting for RDY and/or DRQ, possibly
507 because the hard drive is shaking and has problems
508 reading the data. We have two options:
509 1) Wait some more
510 2) Perform a soft reset and try again.
511
512 We choose alternative 2.
513 */
514 perform_soft_reset();
515 ret = -5;
516 goto retry;
517 }
518
519 if (ata_state == ATA_SPINUP) {
520 ata_state = ATA_ON;
521 spinup_time = current_tick - spinup_start;
522 }
523
524 /* read the status register exactly once per loop */
525 status = ATA_IN8(ATA_STATUS);
526 error = ATA_IN8(ATA_ERROR);
527
528 if (count >= multisectors)
529 sectors = multisectors;
530 else
531 sectors = count;
532
533 wordcount = sectors * log_sector_size / 2;
534
535 if (write)
536 copy_write_sectors(buf, wordcount);
537 else
538 copy_read_sectors(buf, wordcount);
539
540 /*
541 "Device errors encountered during READ MULTIPLE commands
542 are posted at the beginning of the block or partial block
543 transfer, but the DRQ bit is still set to one and the data
544 transfer shall take place, including transfer of corrupted
545 data, if any."
546 -- ATA specification
547 */
548 if ( status & (STATUS_BSY | STATUS_ERR | STATUS_DF) ) {
549 perform_soft_reset();
550 ret = -6;
551 /* no point retrying IDNF, sector no. was invalid */
552 if (error & ERROR_IDNF)
553 break;
554 goto retry;
555 }
556
557 buf += sectors * log_sector_size; /* Advance one chunk of sectors */
558 count -= sectors;
559
560 keep_ata_active();
561 }
562 }
563
564 if(!ret && !wait_for_end_of_transfer()) {
565 int error;
566
567 error = ATA_IN8(ATA_ERROR);
568 perform_soft_reset();
569 ret = -4;
570 /* no point retrying IDNF, sector no. was invalid */
571 if (error & ERROR_IDNF)
572 break;
573 goto retry;
574 }
575 break;
576 }
577
578 error:
579 ata_led(false);
580
581 if (ret < 0 && ata_state == ATA_SPINUP) {
582 /* bailed out before updating */
583 ata_state = ATA_ON;
584 }
585
586 return ret;
587}
588
589#ifndef MAX_PHYS_SECTOR_SIZE
590int ata_read_sectors(IF_MD(int drive,)
591 sector_t start,
592 int incount,
593 void* inbuf)
594{
595#ifdef HAVE_MULTIDRIVE
596 (void)drive; /* unused for now */
597#endif
598
599 mutex_lock(&ata_mutex);
600 int rc = ata_transfer_sectors(start, incount, inbuf, false);
601 mutex_unlock(&ata_mutex);
602 return rc;
603}
604
605int ata_write_sectors(IF_MD(int drive,)
606 sector_t start,
607 int count,
608 const void* buf)
609{
610#ifdef HAVE_MULTIDRIVE
611 (void)drive; /* unused for now */
612#endif
613
614 mutex_lock(&ata_mutex);
615 int rc = ata_transfer_sectors(start, count, (void*)buf, true);
616 mutex_unlock(&ata_mutex);
617 return rc;
618}
619#endif /* ndef MAX_PHYS_SECTOR_SIZE */
620
621static int STORAGE_INIT_ATTR check_registers(void)
622{
623 int i;
624 wait_for_bsy();
625 if (ATA_IN8(ATA_STATUS) & STATUS_BSY)
626 return -1;
627
628 for (i = 0; i<64; i++) {
629 ATA_OUT8(ATA_NSECTOR, TEST_PATTERN1);
630 ATA_OUT8(ATA_SECTOR, TEST_PATTERN2);
631 ATA_OUT8(ATA_LCYL, TEST_PATTERN3);
632 ATA_OUT8(ATA_HCYL, TEST_PATTERN4);
633
634 if (((ATA_IN8(ATA_NSECTOR) & 0xff) == TEST_PATTERN1) &&
635 ((ATA_IN8(ATA_SECTOR) & 0xff) == TEST_PATTERN2) &&
636 ((ATA_IN8(ATA_LCYL) & 0xff) == TEST_PATTERN3) &&
637 ((ATA_IN8(ATA_HCYL) & 0xff) == TEST_PATTERN4))
638 return 0;
639
640 sleep(1);
641 }
642 return -2;
643}
644
645static int freeze_lock(void)
646{
647 /* does the disk support Security Mode feature set? */
648 if (identify_info[82] & 2)
649 {
650 ATA_OUT8(ATA_SELECT, ata_device);
651
652 if (!wait_for_rdy())
653 return -1;
654
655 ATA_OUT8(ATA_COMMAND, CMD_SECURITY_FREEZE_LOCK);
656
657 if (!wait_for_rdy())
658 return -2;
659 }
660
661 return 0;
662}
663
664void ata_spindown(int seconds)
665{
666 sleep_timeout = seconds * HZ;
667}
668
669bool ata_disk_is_active(void)
670{
671 return (ata_state >= ATA_SPINUP);
672}
673
674void ata_sleepnow(void)
675{
676 if (ata_state >= ATA_SPINUP) {
677 logf("ata SLEEPNOW %ld", current_tick);
678 mutex_lock(&ata_mutex);
679 if (ata_state == ATA_ON) {
680 if (!ata_perform_flush_cache() && !ata_perform_sleep()) {
681 ata_state = ATA_SLEEPING;
682#ifdef HAVE_ATA_POWER_OFF
683 if (ata_disk_can_sleep() || canflush) {
684 power_off_tick = current_tick + ATA_POWER_OFF_TIMEOUT;
685 }
686#endif
687 }
688 }
689 mutex_unlock(&ata_mutex);
690 }
691}
692
693void ata_spin(void)
694{
695 keep_ata_active();
696}
697
698/* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
699#ifdef HAVE_ATA_POWER_OFF
700static int ata_hard_reset(void)
701#else
702static int STORAGE_INIT_ATTR ata_hard_reset(void)
703#endif
704{
705 int ret;
706
707 mutex_lock(&ata_mutex);
708
709 ata_reset();
710
711 /* state HRR2 */
712 ATA_OUT8(ATA_SELECT, ata_device); /* select the right device */
713 ret = wait_for_bsy();
714
715 /* Massage the return code so it is 0 on success and -1 on failure */
716 ret = ret?0:-1;
717
718 mutex_unlock(&ata_mutex);
719
720 return ret;
721}
722
723#ifdef HAVE_ATA_SMART
724static int ata_smart(uint16_t *buf, uint8_t cmd)
725{
726 int i;
727
728 ATA_OUT8(ATA_SELECT, ata_device);
729
730 if(!wait_for_rdy()) {
731 DEBUGF("identify() - not RDY\n");
732 return -1;
733 }
734
735 ATA_OUT8(ATA_FEATURE, cmd);
736 ATA_OUT8(ATA_HCYL, 0xc2);
737 ATA_OUT8(ATA_LCYL, 0x4f);
738 ATA_OUT8(ATA_SELECT, SELECT_LBA | ata_device);
739 ATA_OUT8(ATA_COMMAND, CMD_SMART);
740
741 if (!wait_for_start_of_transfer())
742 {
743 DEBUGF("identify() - CMD failed\n");
744 return -2;
745 }
746
747 for (i = 0 ; i < 256 ; i++) {
748 /* The SMART words are already swapped, so we need to treat
749 this info differently that normal sector data */
750 buf[i] = ATA_SWAP_IDENTIFY(ATA_IN16(ATA_DATA));
751 }
752 return 0;
753}
754int ata_read_smart(struct ata_smart_values* smart_data, uint8_t cmd)
755{
756 mutex_lock(&ata_mutex);
757 int rc = ata_smart((uint16_t*)smart_data, cmd);
758 mutex_unlock(&ata_mutex);
759 return rc;
760}
761#endif /* HAVE_ATA_SMART */
762
763// not putting this into STORAGE_INIT_ATTR, as ATA spec recommends to
764// re-read identify_info after soft reset. So we'll do that.
765static int identify(void)
766{
767 int i;
768
769 ATA_OUT8(ATA_SELECT, ata_device);
770
771 if(!wait_for_rdy()) {
772 DEBUGF("identify() - not RDY\n");
773 return -1;
774 }
775 ATA_OUT8(ATA_COMMAND, CMD_IDENTIFY);
776
777 if (!wait_for_start_of_transfer())
778 {
779 DEBUGF("identify() - CMD failed\n");
780 return -2;
781 }
782
783 for (i=0; i<ATA_IDENTIFY_WORDS; i++) {
784 /* the IDENTIFY words are already swapped, so we need to treat
785 this info differently that normal sector data */
786 identify_info[i] = ATA_SWAP_IDENTIFY(ATA_IN16(ATA_DATA));
787 }
788
789 return 0;
790}
791
792static int perform_soft_reset(void)
793{
794/* If this code is allowed to run on a Nano, the next reads from the flash will
795 * time out, so we disable it. It shouldn't be necessary anyway, since the
796 * ATA -> Flash interface automatically sleeps almost immediately after the
797 * last command.
798 */
799 int ret;
800 int retry_count;
801
802 logf("ata SOFT RESET %ld", current_tick);
803
804 ATA_OUT8(ATA_SELECT, SELECT_LBA | ata_device );
805 ATA_OUT8(ATA_CONTROL, CONTROL_nIEN|CONTROL_SRST );
806 sleep(1); /* >= 5us */
807
808#ifdef HAVE_ATA_DMA
809 /* DMA requires INTRQ be enabled */
810 ATA_OUT8(ATA_CONTROL, 0);
811#else
812 ATA_OUT8(ATA_CONTROL, CONTROL_nIEN);
813#endif
814 sleep(1); /* >2ms */
815
816 /* This little sucker can take up to 30 seconds */
817 retry_count = 8;
818 do
819 {
820 ret = wait_for_rdy();
821 } while(!ret && retry_count--);
822
823 if (!ret)
824 return -1;
825
826 if (identify())
827 return -5;
828
829 if ((ret = set_features()))
830 return -60 + ret;
831
832 if (set_multiple_mode(multisectors))
833 return -3;
834
835 if (identify())
836 return -2;
837
838 if (freeze_lock())
839 return -4;
840
841 return 0;
842}
843
844int ata_soft_reset(void)
845{
846 int ret = -6;
847
848 mutex_lock(&ata_mutex);
849
850 if (ata_state > ATA_OFF) {
851 ret = perform_soft_reset();
852 }
853
854 mutex_unlock(&ata_mutex);
855 return ret;
856}
857
858#ifdef HAVE_ATA_POWER_OFF
859static int ata_power_on(void)
860{
861 int rc;
862
863 logf("ata ON %ld", current_tick);
864
865 ide_power_enable(true);
866 sleep(HZ/4); /* allow voltage to build up */
867
868 /* Accessing the PP IDE controller too early after powering up the disk
869 * makes the core hang for a short time, causing an audio dropout. This
870 * also depends on the disk; iPod Mini G2 needs at least HZ/5 to get rid
871 * of the dropout. Since this time isn't additive (the wait_for_bsy() in
872 * ata_hard_reset() will shortened by the same amount), it's a good idea
873 * to do this on all HDD based targets. */
874
875 if( ata_hard_reset() )
876 return -1;
877
878 if (identify())
879 return -5;
880
881 rc = set_features();
882 if (rc)
883 return -60 + rc;
884
885 if (set_multiple_mode(multisectors))
886 return -3;
887
888 if (identify())
889 return -2;
890
891 if (freeze_lock())
892 return -4;
893
894 return 0;
895}
896#endif /* HAVE_ATA_POWER_OFF */
897
898static int STORAGE_INIT_ATTR master_slave_detect(void)
899{
900 /* master? */
901 ATA_OUT8(ATA_SELECT, 0);
902 if (ATA_IN8(ATA_STATUS) & (STATUS_RDY|STATUS_BSY)) {
903 ata_device = 0;
904 DEBUGF("Found master harddisk\n");
905 }
906 else {
907 /* slave? */
908 ATA_OUT8(ATA_SELECT, SELECT_DEVICE1);
909 if (ATA_IN8(ATA_STATUS) & (STATUS_RDY|STATUS_BSY)) {
910 ata_device = SELECT_DEVICE1;
911 DEBUGF("Found slave harddisk\n");
912 }
913 else
914 return -1;
915 }
916 return 0;
917}
918
919static int set_multiple_mode(int sectors)
920{
921 ATA_OUT8(ATA_SELECT, ata_device);
922
923 if(!wait_for_rdy()) {
924 DEBUGF("set_multiple_mode() - not RDY\n");
925 return -1;
926 }
927
928 ATA_OUT8(ATA_NSECTOR, sectors);
929 ATA_OUT8(ATA_COMMAND, CMD_SET_MULTIPLE_MODE);
930
931 if (!wait_for_rdy())
932 {
933 DEBUGF("set_multiple_mode() - CMD failed\n");
934 return -2;
935 }
936
937 return 0;
938}
939
940#ifdef HAVE_ATA_DMA
941static int ata_get_best_mode(unsigned short identword, int max, int modetype)
942{
943 unsigned short testbit = BIT_N(max);
944
945 while (1) {
946 if (identword & testbit)
947 return max | modetype;
948 testbit >>= 1;
949 if (!testbit)
950 return 0;
951 max--;
952 }
953}
954#endif
955
956static int set_features(void)
957{
958 static struct {
959 unsigned char id_word;
960 unsigned char id_bit;
961 unsigned char subcommand;
962 unsigned char parameter;
963 } features[] = {
964 { 83, 14, 0x03, 0 }, /* force PIO mode by default */
965#ifdef HAVE_ATA_DMA
966 { 0, 0, 0x03, 0 }, /* DMA mode */
967#endif
968 /* NOTE: Above two MUST come first! */
969 { 83, 3, 0x05, 0x80 }, /* adv. power management: lowest w/o standby */
970 { 83, 9, 0x42, 0x80 }, /* acoustic management: lowest noise */
971 { 82, 5, 0x02, 0 }, /* enable volatile write cache */
972 { 82, 6, 0xaa, 0 }, /* enable read look-ahead */
973 };
974 int i;
975 int pio_mode = 2; /* Lowest */
976
977 /* Find out the highest supported PIO mode */
978 if (identify_info[53] & (1<<1)) { /* Is word 64 valid? */
979 if (identify_info[64] & 2)
980 pio_mode = 4;
981 else if(identify_info[64] & 1)
982 pio_mode = 3;
983 }
984
985 /* Update the table: set highest supported pio mode that we also support */
986 features[0].parameter = 8 + pio_mode;
987
988#ifdef HAVE_ATA_DMA
989 if (identify_info[53] & (1<<2)) {
990 int max_udma = ATA_MAX_UDMA;
991#if ATA_MAX_UDMA > 2
992 if (!identify_info[76] && !(identify_info[93] & (1<<13))) /* w93b13 is only valid for PATA, w76 is 0 PATA */
993 max_udma = 2;
994#endif
995 /* Ultra DMA mode info present, find a mode */
996 dma_mode = ata_get_best_mode(identify_info[88], max_udma, 0x40);
997 }
998
999 if (!dma_mode) {
1000 /* No UDMA mode found, try to find a multi-word DMA mode */
1001 dma_mode = ata_get_best_mode(identify_info[63], ATA_MAX_MWDMA, 0x20);
1002 features[1].id_word = 63;
1003 } else {
1004 features[1].id_word = 88;
1005 }
1006
1007 features[1].id_bit = dma_mode & 7;
1008 features[1].parameter = dma_mode;
1009#endif /* HAVE_ATA_DMA */
1010
1011 ATA_OUT8(ATA_SELECT, ata_device);
1012
1013 if (!wait_for_rdy()) {
1014 DEBUGF("set_features() - not RDY\n");
1015 return -1;
1016 }
1017
1018 for (i=0; i < (int)(sizeof(features)/sizeof(features[0])); i++) {
1019 if (identify_info[features[i].id_word] & BIT_N(features[i].id_bit)) {
1020 ATA_OUT8(ATA_FEATURE, features[i].subcommand);
1021 ATA_OUT8(ATA_NSECTOR, features[i].parameter);
1022 ATA_OUT8(ATA_COMMAND, CMD_SET_FEATURES);
1023
1024 if (!wait_for_rdy()) {
1025 DEBUGF("set_features() - CMD failed\n");
1026 return -10 - i;
1027 }
1028
1029 if((ATA_IN8(ATA_ALT_STATUS) & STATUS_ERR) && (features[i].subcommand != 0x05)) {
1030 /* some CF cards don't like advanced powermanagement
1031 even if they mark it as supported - go figure... */
1032 if(ATA_IN8(ATA_ERROR) & ERROR_ABRT) {
1033 return -20 - i;
1034 }
1035 }
1036 }
1037 }
1038
1039#ifdef ATA_SET_PIO_TIMING
1040 ata_set_pio_timings(pio_mode);
1041#endif
1042
1043#ifdef HAVE_ATA_DMA
1044 ata_dma_set_mode(dma_mode);
1045#endif
1046
1047 return 0;
1048}
1049
1050unsigned short* ata_get_identify(void)
1051{
1052 return identify_info;
1053}
1054
1055static int STORAGE_INIT_ATTR init_and_check(bool hard_reset)
1056{
1057 int rc;
1058
1059 if (hard_reset)
1060 {
1061 /* This should reset both master and slave, we don't yet know what's in */
1062 ata_device = 0;
1063 if (ata_hard_reset())
1064 return -1;
1065 }
1066
1067 rc = master_slave_detect();
1068 if (rc)
1069 return -10 + rc;
1070
1071 /* symptom fix: else check_registers() below may fail */
1072 if (hard_reset && !wait_for_bsy())
1073 return -20;
1074
1075 rc = check_registers();
1076 if (rc)
1077 return -30 + rc;
1078
1079 return 0;
1080}
1081
1082int STORAGE_INIT_ATTR ata_init(void)
1083{
1084 int rc = 0;
1085 bool coldstart;
1086
1087 if (ata_state == ATA_BOOT) {
1088 mutex_init(&ata_mutex);
1089 }
1090
1091 mutex_lock(&ata_mutex);
1092
1093 /* must be called before ata_device_init() */
1094 coldstart = ata_is_coldstart();
1095 ata_led(false);
1096 ata_device_init();
1097 ata_enable(true);
1098
1099 if (ata_state == ATA_BOOT) {
1100 ata_state = ATA_OFF;
1101
1102 if (!ide_powered()) /* somebody has switched it off */
1103 {
1104 ide_power_enable(true);
1105 sleep(HZ/4); /* allow voltage to build up */
1106 }
1107
1108#ifdef HAVE_ATA_DMA
1109 /* DMA requires INTRQ be enabled */
1110 ATA_OUT8(ATA_CONTROL, 0);
1111#endif
1112
1113 /* first try, hard reset at cold start only */
1114 rc = init_and_check(coldstart);
1115
1116 if (rc)
1117 { /* failed? -> second try, always with hard reset */
1118 DEBUGF("ata: init failed, retrying...\n");
1119 rc = init_and_check(true);
1120 if (rc) {
1121 goto error;
1122 }
1123 }
1124
1125 rc = identify();
1126 if (rc) {
1127 rc = -40 + rc;
1128 goto error;
1129 }
1130
1131 multisectors = identify_info[47] & 0xff;
1132 if (!multisectors && (identify_info[59] & 0x100) == 0x100)
1133 multisectors = identify_info[59] & 0xff;
1134 if (!multisectors)
1135 multisectors = 1; /* One transfer per REQ */
1136
1137 DEBUGF("ata: max %d sectors per DRQ\n", multisectors);
1138
1139 total_sectors = (identify_info[61] << 16) | identify_info[60];
1140
1141#ifdef HAVE_LBA48
1142 if (identify_info[83] & 0x0400 && total_sectors == 0x0FFFFFFF) {
1143 total_sectors = ((uint64_t)identify_info[103] << 48) |
1144 ((uint64_t)identify_info[102] << 32) |
1145 ((uint64_t)identify_info[101] << 16) |
1146 identify_info[100];
1147 ata_lba48 = true; /* use BigLBA */
1148 }
1149#endif /* HAVE_LBA48 */
1150
1151 /* Logical sector size > 512B ? */
1152 if ((identify_info[106] & 0xd000) == 0x5000) /* B14, B12 */
1153 log_sector_size = (identify_info[117] | (identify_info[118] << 16)) * 2;
1154 else
1155 log_sector_size = 512;
1156
1157 rc = freeze_lock();
1158 if (rc) {
1159 rc = -50 + rc;
1160 goto error;
1161 }
1162
1163 rc = set_features(); // error codes are between -1 and -49
1164 if (rc) {
1165 rc = -60 + rc;
1166 goto error;
1167 }
1168
1169#ifdef MAX_PHYS_SECTOR_SIZE
1170 rc = ata_get_phys_sector_mult();
1171 if (rc) {
1172 rc = -70 + rc;
1173 goto error;
1174 }
1175#endif
1176 ata_state = ATA_ON;
1177 keep_ata_active();
1178 }
1179
1180 rc = set_multiple_mode(multisectors);
1181 if (rc)
1182 rc = -100 + rc;
1183
1184 rc = identify();
1185 if (rc) {
1186 rc = -40 + rc;
1187 goto error;
1188 }
1189
1190error:
1191 mutex_unlock(&ata_mutex);
1192 return rc;
1193}
1194
1195#if (CONFIG_LED == LED_REAL)
1196void ata_set_led_enabled(bool enabled)
1197{
1198 ata_led_enabled = enabled;
1199 if (ata_led_enabled)
1200 led(ata_led_on);
1201 else
1202 led(false);
1203}
1204#endif
1205
1206long ata_last_disk_activity(void)
1207{
1208 return last_disk_activity;
1209}
1210
1211#ifdef HAVE_ATA_DMA
1212/* Returns last DMA mode as set by set_features() */
1213int ata_get_dma_mode(void)
1214{
1215 return dma_mode;
1216}
1217
1218/* Needed to allow updating while waiting for DMA to complete */
1219void ata_keep_active(void)
1220 __attribute__((alias("ata_spin")));
1221#endif
1222
1223#ifdef CONFIG_STORAGE_MULTI
1224int ata_num_drives(int first_drive)
1225{
1226 /* We don't care which logical drive number(s) we have been assigned */
1227 (void)first_drive;
1228
1229 return 1;
1230}
1231#endif
1232
1233int ata_event(long id, intptr_t data)
1234{
1235 int rc = 0;
1236
1237 /* GCC does a lousy job culling unreachable cases in the default handler
1238 if statements are in a switch statement, so we'll do it this way. Only
1239 the first case is frequently hit anyway. */
1240 if (LIKELY(id == Q_STORAGE_TICK)) {
1241 /* won't see ATA_BOOT in here */
1242 if (ata_state != ATA_ON || !ata_sleep_timed_out()) {
1243#ifdef HAVE_ATA_POWER_OFF
1244 if (ata_state == ATA_SLEEPING && ata_power_off_timed_out()) {
1245 power_off_tick = 0;
1246 mutex_lock(&ata_mutex);
1247 logf("ata OFF %ld", current_tick);
1248 ide_power_enable(false);
1249 ata_state = ATA_OFF;
1250 mutex_unlock(&ata_mutex);
1251 }
1252#endif
1253 STG_EVENT_ASSERT_ACTIVE(STORAGE_ATA);
1254 }
1255 }
1256 else if (id == Q_STORAGE_SLEEPNOW) {
1257 ata_sleepnow();
1258 }
1259 else if (id == Q_STORAGE_SLEEP) {
1260 last_disk_activity = current_tick - sleep_timeout + HZ / 5;
1261 }
1262#ifndef USB_NONE
1263 else if (id == SYS_USB_CONNECTED) {
1264 logf("deq USB %ld", current_tick);
1265 if (ATA_ACTIVE_IN_USB) {
1266 /* There is no need to force ATA power on */
1267 STG_EVENT_ASSERT_ACTIVE(STORAGE_ATA);
1268 }
1269 else {
1270 mutex_lock(&ata_mutex);
1271 if (ata_state < ATA_ON) {
1272 ata_led(true);
1273 if (!(rc = ata_perform_wakeup(ata_state))) {
1274 ata_state = ATA_ON;
1275 }
1276 ata_led(false);
1277 }
1278 mutex_unlock(&ata_mutex);
1279 }
1280 }
1281#endif /* ndef USB_NONE */
1282 else {
1283 rc = storage_event_default_handler(id, data, last_disk_activity,
1284 STORAGE_ATA);
1285 }
1286
1287 return rc;
1288}