use core::sync::atomic::{AtomicBool, Ordering};

pub static BREAKPOINT_HIT: AtomicBool = AtomicBool::new(false);

crate::kernel_test!(
    fn breakpoint_fires_and_returns() {
        BREAKPOINT_HIT.store(false, Ordering::SeqCst);
        x86_64::instructions::interrupts::int3();
        assert!(
            BREAKPOINT_HIT.load(Ordering::SeqCst),
            "breakpoint handler did not set flag"
        );
    }
);

crate::kernel_test!(
    fn apic_timer_ticks_increment() {
        let before = crate::arch::apic::tick_count();
        x86_64::instructions::interrupts::enable();
        let start = crate::wcet::tsc::read_tsc();
        let freq = crate::wcet::tsc::freq_hz();
        let target_cycles = freq / 20;
        let mut spins: u64 = 0;
        #[allow(clippy::while_immutable_condition)]
        while crate::wcet::tsc::read_tsc() - start < target_cycles {
            x86_64::instructions::hlt();
            spins += 1;
            assert!(spins < 1_000_000, "spin bound exceeded waiting for timer");
        }
        let after = crate::arch::apic::tick_count();
        assert!(
            after > before,
            "tick count did not increase: before={}, after={}",
            before,
            after
        );
    }
);

crate::kernel_test!(
    fn tsc_calibration_sanity() {
        let freq = crate::wcet::tsc::freq_hz();
        let cycles_for_1ms = freq / 1000;
        let ns = crate::wcet::tsc::cycles_to_ns(cycles_for_1ms);
        assert!(
            (900_000..=1_100_000).contains(&ns),
            "1ms worth of cycles converted to {}ns (expected ~1_000_000)",
            ns
        );
    }
);

crate::kernel_test!(
    fn reserved_vector_validation() {
        use crate::arch::x86_64::idt::IrqVector;

        assert!(
            crate::syscall::irq::is_reserved_vector(crate::arch::x86_64::idt::TIMER_VECTOR),
            "TIMER_VECTOR must be reserved"
        );
        assert!(
            crate::syscall::irq::is_reserved_vector(crate::arch::x86_64::idt::ERROR_VECTOR),
            "ERROR_VECTOR must be reserved"
        );
        assert!(
            crate::syscall::irq::is_reserved_vector(crate::arch::x86_64::idt::COM1_VECTOR),
            "COM1_VECTOR must be reserved"
        );
        assert!(
            crate::syscall::irq::is_reserved_vector(crate::arch::x86_64::idt::SPURIOUS_VECTOR),
            "SPURIOUS_VECTOR must be reserved"
        );

        assert!(
            !crate::syscall::irq::is_reserved_vector(IrqVector::new(48)),
            "vector 48 should not be reserved"
        );
        assert!(
            !crate::syscall::irq::is_reserved_vector(IrqVector::new(64)),
            "vector 64 should not be reserved"
        );
        assert!(
            !crate::syscall::irq::is_reserved_vector(IrqVector::new(128)),
            "vector 128 should not be reserved"
        );
    }
);