Adding Hello World · cass.cityboundforest.com/pathdelver@8f6cfd7

cass.cityboundforest.com / pathdelver

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A dungeon delver roguelike using Pathfinder 2nd edition rules

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Adding Hello World

cass.cityboundforest.com 1 year ago 8f6cfd7f 7803ee4d

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hardware.inc

hello-world.asm

+922

gb/hardware.inc

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··· 1 + ;* 2 + ;* Gameboy Hardware definitions 3 + ;* 4 + ;* Based on Jones' hardware.inc 5 + ;* And based on Carsten Sorensen's ideas. 6 + ;* 7 + ;* Rev 1.1 - 15-Jul-97 : Added define check 8 + ;* Rev 1.2 - 18-Jul-97 : Added revision check macro 9 + ;* Rev 1.3 - 19-Jul-97 : Modified for RGBASM V1.05 10 + ;* Rev 1.4 - 27-Jul-97 : Modified for new subroutine prefixes 11 + ;* Rev 1.5 - 15-Aug-97 : Added _HRAM, PAD, CART defines 12 + ;* : and Nintendo Logo 13 + ;* Rev 1.6 - 30-Nov-97 : Added rDIV, rTIMA, rTMA, & rTAC 14 + ;* Rev 1.7 - 31-Jan-98 : Added _SCRN0, _SCRN1 15 + ;* Rev 1.8 - 15-Feb-98 : Added rSB, rSC 16 + ;* Rev 1.9 - 16-Feb-98 : Converted I/O registers to $FFXX format 17 + ;* Rev 2.0 - : Added GBC registers 18 + ;* Rev 2.1 - : Added MBC5 & cart RAM enable/disable defines 19 + ;* Rev 2.2 - : Fixed NR42,NR43, & NR44 equates 20 + ;* Rev 2.3 - : Fixed incorrect _HRAM equate 21 + ;* Rev 2.4 - 27-Apr-13 : Added some cart defines (AntonioND) 22 + ;* Rev 2.5 - 03-May-15 : Fixed format (AntonioND) 23 + ;* Rev 2.6 - 09-Apr-16 : Added GBC OAM and cart defines (AntonioND) 24 + ;* Rev 2.7 - 19-Jan-19 : Added rPCMXX (ISSOtm) 25 + ;* Rev 2.8 - 03-Feb-19 : Added audio registers flags (Álvaro Cuesta) 26 + ;* Rev 2.9 - 28-Feb-20 : Added utility rP1 constants 27 + ;* Rev 3.0 - 27-Aug-20 : Register ordering, byte-based sizes, OAM additions, general cleanup (Blitter Object) 28 + ;* Rev 4.0 - 03-May-21 : Updated to use RGBDS 0.5.0 syntax, changed IEF_LCDC to IEF_STAT (Eievui) 29 + 30 + IF __RGBDS_MAJOR__ == 0 && __RGBDS_MINOR__ < 5 31 + FAIL "This version of 'hardware.inc' requires RGBDS version 0.5.0 or later." 32 + ENDC 33 + 34 + ; If all of these are already defined, don't do it again. 35 + 36 + IF !DEF(HARDWARE_INC) 37 + DEF HARDWARE_INC EQU 1 38 + 39 + MACRO rev_Check_hardware_inc 40 + ;NOTE: REVISION NUMBER CHANGES MUST BE ADDED 41 + ;TO SECOND PARAMETER IN FOLLOWING LINE. 42 + IF \1 > 4.0 ;PUT REVISION NUMBER HERE 43 + WARN "Version \1 or later of 'hardware.inc' is required." 44 + ENDC 45 + ENDM 46 + 47 + DEF _VRAM EQU $8000 ; $8000->$9FFF 48 + DEF _VRAM8000 EQU _VRAM 49 + DEF _VRAM8800 EQU _VRAM+$800 50 + DEF _VRAM9000 EQU _VRAM+$1000 51 + DEF _SCRN0 EQU $9800 ; $9800->$9BFF 52 + DEF _SCRN1 EQU $9C00 ; $9C00->$9FFF 53 + DEF _SRAM EQU $A000 ; $A000->$BFFF 54 + DEF _RAM EQU $C000 ; $C000->$CFFF / $C000->$DFFF 55 + DEF _RAMBANK EQU $D000 ; $D000->$DFFF 56 + DEF _OAMRAM EQU $FE00 ; $FE00->$FE9F 57 + DEF _IO EQU $FF00 ; $FF00->$FF7F,$FFFF 58 + DEF _AUD3WAVERAM EQU $FF30 ; $FF30->$FF3F 59 + DEF _HRAM EQU $FF80 ; $FF80->$FFFE 60 + 61 + ; *** MBC5 Equates *** 62 + 63 + DEF rRAMG EQU $0000 ; $0000->$1fff 64 + DEF rROMB0 EQU $2000 ; $2000->$2fff 65 + DEF rROMB1 EQU $3000 ; $3000->$3fff - If more than 256 ROM banks are present. 66 + DEF rRAMB EQU $4000 ; $4000->$5fff - Bit 3 enables rumble (if present) 67 + 68 + 69 + ;*************************************************************************** 70 + ;* 71 + ;* Custom registers 72 + ;* 73 + ;*************************************************************************** 74 + 75 + ; -- 76 + ; -- P1 ($FF00) 77 + ; -- Register for reading joy pad info. (R/W) 78 + ; -- 79 + DEF rP1 EQU $FF00 80 + 81 + DEF P1F_5 EQU %00100000 ; P15 out port, set to 0 to get buttons 82 + DEF P1F_4 EQU %00010000 ; P14 out port, set to 0 to get dpad 83 + DEF P1F_3 EQU %00001000 ; P13 in port 84 + DEF P1F_2 EQU %00000100 ; P12 in port 85 + DEF P1F_1 EQU %00000010 ; P11 in port 86 + DEF P1F_0 EQU %00000001 ; P10 in port 87 + 88 + DEF P1F_GET_DPAD EQU P1F_5 89 + DEF P1F_GET_BTN EQU P1F_4 90 + DEF P1F_GET_NONE EQU P1F_4 | P1F_5 91 + 92 + 93 + ; -- 94 + ; -- SB ($FF01) 95 + ; -- Serial Transfer Data (R/W) 96 + ; -- 97 + DEF rSB EQU $FF01 98 + 99 + 100 + ; -- 101 + ; -- SC ($FF02) 102 + ; -- Serial I/O Control (R/W) 103 + ; -- 104 + DEF rSC EQU $FF02 105 + 106 + 107 + ; -- 108 + ; -- DIV ($FF04) 109 + ; -- Divider register (R/W) 110 + ; -- 111 + DEF rDIV EQU $FF04 112 + 113 + 114 + ; -- 115 + ; -- TIMA ($FF05) 116 + ; -- Timer counter (R/W) 117 + ; -- 118 + DEF rTIMA EQU $FF05 119 + 120 + 121 + ; -- 122 + ; -- TMA ($FF06) 123 + ; -- Timer modulo (R/W) 124 + ; -- 125 + DEF rTMA EQU $FF06 126 + 127 + 128 + ; -- 129 + ; -- TAC ($FF07) 130 + ; -- Timer control (R/W) 131 + ; -- 132 + DEF rTAC EQU $FF07 133 + 134 + DEF TACF_START EQU %00000100 135 + DEF TACF_STOP EQU %00000000 136 + DEF TACF_4KHZ EQU %00000000 137 + DEF TACF_16KHZ EQU %00000011 138 + DEF TACF_65KHZ EQU %00000010 139 + DEF TACF_262KHZ EQU %00000001 140 + 141 + 142 + ; -- 143 + ; -- IF ($FF0F) 144 + ; -- Interrupt Flag (R/W) 145 + ; -- 146 + DEF rIF EQU $FF0F 147 + 148 + 149 + ; -- 150 + ; -- AUD1SWEEP/NR10 ($FF10) 151 + ; -- Sweep register (R/W) 152 + ; -- 153 + ; -- Bit 6-4 - Sweep Time 154 + ; -- Bit 3 - Sweep Increase/Decrease 155 + ; -- 0: Addition (frequency increases???) 156 + ; -- 1: Subtraction (frequency increases???) 157 + ; -- Bit 2-0 - Number of sweep shift (# 0-7) 158 + ; -- Sweep Time: (n*7.8ms) 159 + ; -- 160 + DEF rNR10 EQU $FF10 161 + DEF rAUD1SWEEP EQU rNR10 162 + 163 + DEF AUD1SWEEP_UP EQU %00000000 164 + DEF AUD1SWEEP_DOWN EQU %00001000 165 + 166 + 167 + ; -- 168 + ; -- AUD1LEN/NR11 ($FF11) 169 + ; -- Sound length/Wave pattern duty (R/W) 170 + ; -- 171 + ; -- Bit 7-6 - Wave Pattern Duty (00:12.5% 01:25% 10:50% 11:75%) 172 + ; -- Bit 5-0 - Sound length data (# 0-63) 173 + ; -- 174 + DEF rNR11 EQU $FF11 175 + DEF rAUD1LEN EQU rNR11 176 + 177 + 178 + ; -- 179 + ; -- AUD1ENV/NR12 ($FF12) 180 + ; -- Envelope (R/W) 181 + ; -- 182 + ; -- Bit 7-4 - Initial value of envelope 183 + ; -- Bit 3 - Envelope UP/DOWN 184 + ; -- 0: Decrease 185 + ; -- 1: Range of increase 186 + ; -- Bit 2-0 - Number of envelope sweep (# 0-7) 187 + ; -- 188 + DEF rNR12 EQU $FF12 189 + DEF rAUD1ENV EQU rNR12 190 + 191 + 192 + ; -- 193 + ; -- AUD1LOW/NR13 ($FF13) 194 + ; -- Frequency low byte (W) 195 + ; -- 196 + DEF rNR13 EQU $FF13 197 + DEF rAUD1LOW EQU rNR13 198 + 199 + 200 + ; -- 201 + ; -- AUD1HIGH/NR14 ($FF14) 202 + ; -- Frequency high byte (W) 203 + ; -- 204 + ; -- Bit 7 - Initial (when set, sound restarts) 205 + ; -- Bit 6 - Counter/consecutive selection 206 + ; -- Bit 2-0 - Frequency's higher 3 bits 207 + ; -- 208 + DEF rNR14 EQU $FF14 209 + DEF rAUD1HIGH EQU rNR14 210 + 211 + 212 + ; -- 213 + ; -- AUD2LEN/NR21 ($FF16) 214 + ; -- Sound Length; Wave Pattern Duty (R/W) 215 + ; -- 216 + ; -- see AUD1LEN for info 217 + ; -- 218 + DEF rNR21 EQU $FF16 219 + DEF rAUD2LEN EQU rNR21 220 + 221 + 222 + ; -- 223 + ; -- AUD2ENV/NR22 ($FF17) 224 + ; -- Envelope (R/W) 225 + ; -- 226 + ; -- see AUD1ENV for info 227 + ; -- 228 + DEF rNR22 EQU $FF17 229 + DEF rAUD2ENV EQU rNR22 230 + 231 + 232 + ; -- 233 + ; -- AUD2LOW/NR23 ($FF18) 234 + ; -- Frequency low byte (W) 235 + ; -- 236 + DEF rNR23 EQU $FF18 237 + DEF rAUD2LOW EQU rNR23 238 + 239 + 240 + ; -- 241 + ; -- AUD2HIGH/NR24 ($FF19) 242 + ; -- Frequency high byte (W) 243 + ; -- 244 + ; -- see AUD1HIGH for info 245 + ; -- 246 + DEF rNR24 EQU $FF19 247 + DEF rAUD2HIGH EQU rNR24 248 + 249 + 250 + ; -- 251 + ; -- AUD3ENA/NR30 ($FF1A) 252 + ; -- Sound on/off (R/W) 253 + ; -- 254 + ; -- Bit 7 - Sound ON/OFF (1=ON,0=OFF) 255 + ; -- 256 + DEF rNR30 EQU $FF1A 257 + DEF rAUD3ENA EQU rNR30 258 + 259 + 260 + ; -- 261 + ; -- AUD3LEN/NR31 ($FF1B) 262 + ; -- Sound length (R/W) 263 + ; -- 264 + ; -- Bit 7-0 - Sound length 265 + ; -- 266 + DEF rNR31 EQU $FF1B 267 + DEF rAUD3LEN EQU rNR31 268 + 269 + 270 + ; -- 271 + ; -- AUD3LEVEL/NR32 ($FF1C) 272 + ; -- Select output level 273 + ; -- 274 + ; -- Bit 6-5 - Select output level 275 + ; -- 00: 0/1 (mute) 276 + ; -- 01: 1/1 277 + ; -- 10: 1/2 278 + ; -- 11: 1/4 279 + ; -- 280 + DEF rNR32 EQU $FF1C 281 + DEF rAUD3LEVEL EQU rNR32 282 + 283 + 284 + ; -- 285 + ; -- AUD3LOW/NR33 ($FF1D) 286 + ; -- Frequency low byte (W) 287 + ; -- 288 + ; -- see AUD1LOW for info 289 + ; -- 290 + DEF rNR33 EQU $FF1D 291 + DEF rAUD3LOW EQU rNR33 292 + 293 + 294 + ; -- 295 + ; -- AUD3HIGH/NR34 ($FF1E) 296 + ; -- Frequency high byte (W) 297 + ; -- 298 + ; -- see AUD1HIGH for info 299 + ; -- 300 + DEF rNR34 EQU $FF1E 301 + DEF rAUD3HIGH EQU rNR34 302 + 303 + 304 + ; -- 305 + ; -- AUD4LEN/NR41 ($FF20) 306 + ; -- Sound length (R/W) 307 + ; -- 308 + ; -- Bit 5-0 - Sound length data (# 0-63) 309 + ; -- 310 + DEF rNR41 EQU $FF20 311 + DEF rAUD4LEN EQU rNR41 312 + 313 + 314 + ; -- 315 + ; -- AUD4ENV/NR42 ($FF21) 316 + ; -- Envelope (R/W) 317 + ; -- 318 + ; -- see AUD1ENV for info 319 + ; -- 320 + DEF rNR42 EQU $FF21 321 + DEF rAUD4ENV EQU rNR42 322 + 323 + 324 + ; -- 325 + ; -- AUD4POLY/NR43 ($FF22) 326 + ; -- Polynomial counter (R/W) 327 + ; -- 328 + ; -- Bit 7-4 - Selection of the shift clock frequency of the (scf) 329 + ; -- polynomial counter (0000-1101) 330 + ; -- freq=drf*1/2^scf (not sure) 331 + ; -- Bit 3 - Selection of the polynomial counter's step 332 + ; -- 0: 15 steps 333 + ; -- 1: 7 steps 334 + ; -- Bit 2-0 - Selection of the dividing ratio of frequencies (drf) 335 + ; -- 000: f/4 001: f/8 010: f/16 011: f/24 336 + ; -- 100: f/32 101: f/40 110: f/48 111: f/56 (f=4.194304 Mhz) 337 + ; -- 338 + DEF rNR43 EQU $FF22 339 + DEF rAUD4POLY EQU rNR43 340 + 341 + 342 + ; -- 343 + ; -- AUD4GO/NR44 ($FF23) 344 + ; -- 345 + ; -- Bit 7 - Inital 346 + ; -- Bit 6 - Counter/consecutive selection 347 + ; -- 348 + DEF rNR44 EQU $FF23 349 + DEF rAUD4GO EQU rNR44 350 + 351 + 352 + ; -- 353 + ; -- AUDVOL/NR50 ($FF24) 354 + ; -- Channel control / ON-OFF / Volume (R/W) 355 + ; -- 356 + ; -- Bit 7 - Vin->SO2 ON/OFF (Vin??) 357 + ; -- Bit 6-4 - SO2 output level (volume) (# 0-7) 358 + ; -- Bit 3 - Vin->SO1 ON/OFF (Vin??) 359 + ; -- Bit 2-0 - SO1 output level (volume) (# 0-7) 360 + ; -- 361 + DEF rNR50 EQU $FF24 362 + DEF rAUDVOL EQU rNR50 363 + 364 + DEF AUDVOL_VIN_LEFT EQU %10000000 ; SO2 365 + DEF AUDVOL_VIN_RIGHT EQU %00001000 ; SO1 366 + 367 + 368 + ; -- 369 + ; -- AUDTERM/NR51 ($FF25) 370 + ; -- Selection of Sound output terminal (R/W) 371 + ; -- 372 + ; -- Bit 7 - Output sound 4 to SO2 terminal 373 + ; -- Bit 6 - Output sound 3 to SO2 terminal 374 + ; -- Bit 5 - Output sound 2 to SO2 terminal 375 + ; -- Bit 4 - Output sound 1 to SO2 terminal 376 + ; -- Bit 3 - Output sound 4 to SO1 terminal 377 + ; -- Bit 2 - Output sound 3 to SO1 terminal 378 + ; -- Bit 1 - Output sound 2 to SO1 terminal 379 + ; -- Bit 0 - Output sound 0 to SO1 terminal 380 + ; -- 381 + DEF rNR51 EQU $FF25 382 + DEF rAUDTERM EQU rNR51 383 + 384 + ; SO2 385 + DEF AUDTERM_4_LEFT EQU %10000000 386 + DEF AUDTERM_3_LEFT EQU %01000000 387 + DEF AUDTERM_2_LEFT EQU %00100000 388 + DEF AUDTERM_1_LEFT EQU %00010000 389 + ; SO1 390 + DEF AUDTERM_4_RIGHT EQU %00001000 391 + DEF AUDTERM_3_RIGHT EQU %00000100 392 + DEF AUDTERM_2_RIGHT EQU %00000010 393 + DEF AUDTERM_1_RIGHT EQU %00000001 394 + 395 + 396 + ; -- 397 + ; -- AUDENA/NR52 ($FF26) 398 + ; -- Sound on/off (R/W) 399 + ; -- 400 + ; -- Bit 7 - All sound on/off (sets all audio regs to 0!) 401 + ; -- Bit 3 - Sound 4 ON flag (read only) 402 + ; -- Bit 2 - Sound 3 ON flag (read only) 403 + ; -- Bit 1 - Sound 2 ON flag (read only) 404 + ; -- Bit 0 - Sound 1 ON flag (read only) 405 + ; -- 406 + DEF rNR52 EQU $FF26 407 + DEF rAUDENA EQU rNR52 408 + 409 + DEF AUDENA_ON EQU %10000000 410 + DEF AUDENA_OFF EQU %00000000 ; sets all audio regs to 0! 411 + 412 + 413 + ; -- 414 + ; -- LCDC ($FF40) 415 + ; -- LCD Control (R/W) 416 + ; -- 417 + DEF rLCDC EQU $FF40 418 + 419 + DEF LCDCF_OFF EQU %00000000 ; LCD Control Operation 420 + DEF LCDCF_ON EQU %10000000 ; LCD Control Operation 421 + DEF LCDCF_WIN9800 EQU %00000000 ; Window Tile Map Display Select 422 + DEF LCDCF_WIN9C00 EQU %01000000 ; Window Tile Map Display Select 423 + DEF LCDCF_WINOFF EQU %00000000 ; Window Display 424 + DEF LCDCF_WINON EQU %00100000 ; Window Display 425 + DEF LCDCF_BG8800 EQU %00000000 ; BG & Window Tile Data Select 426 + DEF LCDCF_BG8000 EQU %00010000 ; BG & Window Tile Data Select 427 + DEF LCDCF_BG9800 EQU %00000000 ; BG Tile Map Display Select 428 + DEF LCDCF_BG9C00 EQU %00001000 ; BG Tile Map Display Select 429 + DEF LCDCF_OBJ8 EQU %00000000 ; OBJ Construction 430 + DEF LCDCF_OBJ16 EQU %00000100 ; OBJ Construction 431 + DEF LCDCF_OBJOFF EQU %00000000 ; OBJ Display 432 + DEF LCDCF_OBJON EQU %00000010 ; OBJ Display 433 + DEF LCDCF_BGOFF EQU %00000000 ; BG Display 434 + DEF LCDCF_BGON EQU %00000001 ; BG Display 435 + ; "Window Character Data Select" follows BG 436 + 437 + 438 + ; -- 439 + ; -- STAT ($FF41) 440 + ; -- LCDC Status (R/W) 441 + ; -- 442 + DEF rSTAT EQU $FF41 443 + 444 + DEF STATF_LYC EQU %01000000 ; LYC=LY Coincidence (Selectable) 445 + DEF STATF_MODE10 EQU %00100000 ; Mode 10 446 + DEF STATF_MODE01 EQU %00010000 ; Mode 01 (V-Blank) 447 + DEF STATF_MODE00 EQU %00001000 ; Mode 00 (H-Blank) 448 + DEF STATF_LYCF EQU %00000100 ; Coincidence Flag 449 + DEF STATF_HBL EQU %00000000 ; H-Blank 450 + DEF STATF_VBL EQU %00000001 ; V-Blank 451 + DEF STATF_OAM EQU %00000010 ; OAM-RAM is used by system 452 + DEF STATF_LCD EQU %00000011 ; Both OAM and VRAM used by system 453 + DEF STATF_BUSY EQU %00000010 ; When set, VRAM access is unsafe 454 + 455 + 456 + ; -- 457 + ; -- SCY ($FF42) 458 + ; -- Scroll Y (R/W) 459 + ; -- 460 + DEF rSCY EQU $FF42 461 + 462 + 463 + ; -- 464 + ; -- SCX ($FF43) 465 + ; -- Scroll X (R/W) 466 + ; -- 467 + DEF rSCX EQU $FF43 468 + 469 + 470 + ; -- 471 + ; -- LY ($FF44) 472 + ; -- LCDC Y-Coordinate (R) 473 + ; -- 474 + ; -- Values range from 0->153. 144->153 is the VBlank period. 475 + ; -- 476 + DEF rLY EQU $FF44 477 + 478 + 479 + ; -- 480 + ; -- LYC ($FF45) 481 + ; -- LY Compare (R/W) 482 + ; -- 483 + ; -- When LY==LYC, STATF_LYCF will be set in STAT 484 + ; -- 485 + DEF rLYC EQU $FF45 486 + 487 + 488 + ; -- 489 + ; -- DMA ($FF46) 490 + ; -- DMA Transfer and Start Address (W) 491 + ; -- 492 + DEF rDMA EQU $FF46 493 + 494 + 495 + ; -- 496 + ; -- BGP ($FF47) 497 + ; -- BG Palette Data (W) 498 + ; -- 499 + ; -- Bit 7-6 - Intensity for %11 500 + ; -- Bit 5-4 - Intensity for %10 501 + ; -- Bit 3-2 - Intensity for %01 502 + ; -- Bit 1-0 - Intensity for %00 503 + ; -- 504 + DEF rBGP EQU $FF47 505 + 506 + 507 + ; -- 508 + ; -- OBP0 ($FF48) 509 + ; -- Object Palette 0 Data (W) 510 + ; -- 511 + ; -- See BGP for info 512 + ; -- 513 + DEF rOBP0 EQU $FF48 514 + 515 + 516 + ; -- 517 + ; -- OBP1 ($FF49) 518 + ; -- Object Palette 1 Data (W) 519 + ; -- 520 + ; -- See BGP for info 521 + ; -- 522 + DEF rOBP1 EQU $FF49 523 + 524 + 525 + ; -- 526 + ; -- WY ($FF4A) 527 + ; -- Window Y Position (R/W) 528 + ; -- 529 + ; -- 0 <= WY <= 143 530 + ; -- When WY = 0, the window is displayed from the top edge of the LCD screen. 531 + ; -- 532 + DEF rWY EQU $FF4A 533 + 534 + 535 + ; -- 536 + ; -- WX ($FF4B) 537 + ; -- Window X Position (R/W) 538 + ; -- 539 + ; -- 7 <= WX <= 166 540 + ; -- When WX = 7, the window is displayed from the left edge of the LCD screen. 541 + ; -- Values of 0-6 and 166 are unreliable due to hardware bugs. 542 + ; -- 543 + DEF rWX EQU $FF4B 544 + 545 + 546 + ; -- 547 + ; -- SPEED ($FF4D) 548 + ; -- Select CPU Speed (R/W) 549 + ; -- 550 + DEF rKEY1 EQU $FF4D 551 + DEF rSPD EQU rKEY1 552 + 553 + DEF KEY1F_DBLSPEED EQU %10000000 ; 0=Normal Speed, 1=Double Speed (R) 554 + DEF KEY1F_PREPARE EQU %00000001 ; 0=No, 1=Prepare (R/W) 555 + 556 + 557 + ; -- 558 + ; -- VBK ($FF4F) 559 + ; -- Select Video RAM Bank (R/W) 560 + ; -- 561 + ; -- Bit 0 - Bank Specification (0: Specify Bank 0; 1: Specify Bank 1) 562 + ; -- 563 + DEF rVBK EQU $FF4F 564 + 565 + 566 + ; -- 567 + ; -- HDMA1 ($FF51) 568 + ; -- High byte for Horizontal Blanking/General Purpose DMA source address (W) 569 + ; -- CGB Mode Only 570 + ; -- 571 + DEF rHDMA1 EQU $FF51 572 + 573 + 574 + ; -- 575 + ; -- HDMA2 ($FF52) 576 + ; -- Low byte for Horizontal Blanking/General Purpose DMA source address (W) 577 + ; -- CGB Mode Only 578 + ; -- 579 + DEF rHDMA2 EQU $FF52 580 + 581 + 582 + ; -- 583 + ; -- HDMA3 ($FF53) 584 + ; -- High byte for Horizontal Blanking/General Purpose DMA destination address (W) 585 + ; -- CGB Mode Only 586 + ; -- 587 + DEF rHDMA3 EQU $FF53 588 + 589 + 590 + ; -- 591 + ; -- HDMA4 ($FF54) 592 + ; -- Low byte for Horizontal Blanking/General Purpose DMA destination address (W) 593 + ; -- CGB Mode Only 594 + ; -- 595 + DEF rHDMA4 EQU $FF54 596 + 597 + 598 + ; -- 599 + ; -- HDMA5 ($FF55) 600 + ; -- Transfer length (in tiles minus 1)/mode/start for Horizontal Blanking, General Purpose DMA (R/W) 601 + ; -- CGB Mode Only 602 + ; -- 603 + DEF rHDMA5 EQU $FF55 604 + 605 + DEF HDMA5F_MODE_GP EQU %00000000 ; General Purpose DMA (W) 606 + DEF HDMA5F_MODE_HBL EQU %10000000 ; HBlank DMA (W) 607 + 608 + ; -- Once DMA has started, use HDMA5F_BUSY to check when the transfer is complete 609 + DEF HDMA5F_BUSY EQU %10000000 ; 0=Busy (DMA still in progress), 1=Transfer complete (R) 610 + 611 + 612 + ; -- 613 + ; -- RP ($FF56) 614 + ; -- Infrared Communications Port (R/W) 615 + ; -- CGB Mode Only 616 + ; -- 617 + DEF rRP EQU $FF56 618 + 619 + DEF RPF_ENREAD EQU %11000000 620 + DEF RPF_DATAIN EQU %00000010 ; 0=Receiving IR Signal, 1=Normal 621 + DEF RPF_WRITE_HI EQU %00000001 622 + DEF RPF_WRITE_LO EQU %00000000 623 + 624 + 625 + ; -- 626 + ; -- BCPS ($FF68) 627 + ; -- Background Color Palette Specification (R/W) 628 + ; -- 629 + DEF rBCPS EQU $FF68 630 + 631 + DEF BCPSF_AUTOINC EQU %10000000 ; Auto Increment (0=Disabled, 1=Increment after Writing) 632 + 633 + 634 + ; -- 635 + ; -- BCPD ($FF69) 636 + ; -- Background Color Palette Data (R/W) 637 + ; -- 638 + DEF rBCPD EQU $FF69 639 + 640 + 641 + ; -- 642 + ; -- OCPS ($FF6A) 643 + ; -- Object Color Palette Specification (R/W) 644 + ; -- 645 + DEF rOCPS EQU $FF6A 646 + 647 + DEF OCPSF_AUTOINC EQU %10000000 ; Auto Increment (0=Disabled, 1=Increment after Writing) 648 + 649 + 650 + ; -- 651 + ; -- OCPD ($FF6B) 652 + ; -- Object Color Palette Data (R/W) 653 + ; -- 654 + DEF rOCPD EQU $FF6B 655 + 656 + 657 + ; -- 658 + ; -- SMBK/SVBK ($FF70) 659 + ; -- Select Main RAM Bank (R/W) 660 + ; -- 661 + ; -- Bit 2-0 - Bank Specification (0,1: Specify Bank 1; 2-7: Specify Banks 2-7) 662 + ; -- 663 + DEF rSVBK EQU $FF70 664 + DEF rSMBK EQU rSVBK 665 + 666 + 667 + ; -- 668 + ; -- PCM12 ($FF76) 669 + ; -- Sound channel 1&2 PCM amplitude (R) 670 + ; -- 671 + ; -- Bit 7-4 - Copy of sound channel 2's PCM amplitude 672 + ; -- Bit 3-0 - Copy of sound channel 1's PCM amplitude 673 + ; -- 674 + DEF rPCM12 EQU $FF76 675 + 676 + 677 + ; -- 678 + ; -- PCM34 ($FF77) 679 + ; -- Sound channel 3&4 PCM amplitude (R) 680 + ; -- 681 + ; -- Bit 7-4 - Copy of sound channel 4's PCM amplitude 682 + ; -- Bit 3-0 - Copy of sound channel 3's PCM amplitude 683 + ; -- 684 + DEF rPCM34 EQU $FF77 685 + 686 + 687 + ; -- 688 + ; -- IE ($FFFF) 689 + ; -- Interrupt Enable (R/W) 690 + ; -- 691 + DEF rIE EQU $FFFF 692 + 693 + DEF IEF_HILO EQU %00010000 ; Transition from High to Low of Pin number P10-P13 694 + DEF IEF_SERIAL EQU %00001000 ; Serial I/O transfer end 695 + DEF IEF_TIMER EQU %00000100 ; Timer Overflow 696 + DEF IEF_STAT EQU %00000010 ; STAT 697 + DEF IEF_VBLANK EQU %00000001 ; V-Blank 698 + 699 + 700 + ;*************************************************************************** 701 + ;* 702 + ;* Flags common to multiple sound channels 703 + ;* 704 + ;*************************************************************************** 705 + 706 + ; -- 707 + ; -- Square wave duty cycle 708 + ; -- 709 + ; -- Can be used with AUD1LEN and AUD2LEN 710 + ; -- See AUD1LEN for more info 711 + ; -- 712 + DEF AUDLEN_DUTY_12_5 EQU %00000000 ; 12.5% 713 + DEF AUDLEN_DUTY_25 EQU %01000000 ; 25% 714 + DEF AUDLEN_DUTY_50 EQU %10000000 ; 50% 715 + DEF AUDLEN_DUTY_75 EQU %11000000 ; 75% 716 + 717 + 718 + ; -- 719 + ; -- Audio envelope flags 720 + ; -- 721 + ; -- Can be used with AUD1ENV, AUD2ENV, AUD4ENV 722 + ; -- See AUD1ENV for more info 723 + ; -- 724 + DEF AUDENV_UP EQU %00001000 725 + DEF AUDENV_DOWN EQU %00000000 726 + 727 + 728 + ; -- 729 + ; -- Audio trigger flags 730 + ; -- 731 + ; -- Can be used with AUD1HIGH, AUD2HIGH, AUD3HIGH 732 + ; -- See AUD1HIGH for more info 733 + ; -- 734 + 735 + DEF AUDHIGH_RESTART EQU %10000000 736 + DEF AUDHIGH_LENGTH_ON EQU %01000000 737 + DEF AUDHIGH_LENGTH_OFF EQU %00000000 738 + 739 + 740 + ;*************************************************************************** 741 + ;* 742 + ;* CPU values on bootup (a=type, b=qualifier) 743 + ;* 744 + ;*************************************************************************** 745 + 746 + DEF BOOTUP_A_DMG EQU $01 ; Dot Matrix Game 747 + DEF BOOTUP_A_CGB EQU $11 ; Color GameBoy 748 + DEF BOOTUP_A_MGB EQU $FF ; Mini GameBoy (Pocket GameBoy) 749 + 750 + ; if a=BOOTUP_A_CGB, bit 0 in b can be checked to determine if real CGB or 751 + ; other system running in GBC mode 752 + DEF BOOTUP_B_CGB EQU %00000000 753 + DEF BOOTUP_B_AGB EQU %00000001 ; GBA, GBA SP, Game Boy Player, or New GBA SP 754 + 755 + 756 + ;*************************************************************************** 757 + ;* 758 + ;* Cart related 759 + ;* 760 + ;*************************************************************************** 761 + 762 + ; $0143 Color GameBoy compatibility code 763 + DEF CART_COMPATIBLE_DMG EQU $00 764 + DEF CART_COMPATIBLE_DMG_GBC EQU $80 765 + DEF CART_COMPATIBLE_GBC EQU $C0 766 + 767 + ; $0146 GameBoy/Super GameBoy indicator 768 + DEF CART_INDICATOR_GB EQU $00 769 + DEF CART_INDICATOR_SGB EQU $03 770 + 771 + ; $0147 Cartridge type 772 + DEF CART_ROM EQU $00 773 + DEF CART_ROM_MBC1 EQU $01 774 + DEF CART_ROM_MBC1_RAM EQU $02 775 + DEF CART_ROM_MBC1_RAM_BAT EQU $03 776 + DEF CART_ROM_MBC2 EQU $05 777 + DEF CART_ROM_MBC2_BAT EQU $06 778 + DEF CART_ROM_RAM EQU $08 779 + DEF CART_ROM_RAM_BAT EQU $09 780 + DEF CART_ROM_MMM01 EQU $0B 781 + DEF CART_ROM_MMM01_RAM EQU $0C 782 + DEF CART_ROM_MMM01_RAM_BAT EQU $0D 783 + DEF CART_ROM_MBC3_BAT_RTC EQU $0F 784 + DEF CART_ROM_MBC3_RAM_BAT_RTC EQU $10 785 + DEF CART_ROM_MBC3 EQU $11 786 + DEF CART_ROM_MBC3_RAM EQU $12 787 + DEF CART_ROM_MBC3_RAM_BAT EQU $13 788 + DEF CART_ROM_MBC5 EQU $19 789 + DEF CART_ROM_MBC5_BAT EQU $1A 790 + DEF CART_ROM_MBC5_RAM_BAT EQU $1B 791 + DEF CART_ROM_MBC5_RUMBLE EQU $1C 792 + DEF CART_ROM_MBC5_RAM_RUMBLE EQU $1D 793 + DEF CART_ROM_MBC5_RAM_BAT_RUMBLE EQU $1E 794 + DEF CART_ROM_MBC7_RAM_BAT_GYRO EQU $22 795 + DEF CART_ROM_POCKET_CAMERA EQU $FC 796 + DEF CART_ROM_BANDAI_TAMA5 EQU $FD 797 + DEF CART_ROM_HUDSON_HUC3 EQU $FE 798 + DEF CART_ROM_HUDSON_HUC1 EQU $FF 799 + 800 + ; $0148 ROM size 801 + ; these are kilobytes 802 + DEF CART_ROM_32KB EQU $00 ; 2 banks 803 + DEF CART_ROM_64KB EQU $01 ; 4 banks 804 + DEF CART_ROM_128KB EQU $02 ; 8 banks 805 + DEF CART_ROM_256KB EQU $03 ; 16 banks 806 + DEF CART_ROM_512KB EQU $04 ; 32 banks 807 + DEF CART_ROM_1024KB EQU $05 ; 64 banks 808 + DEF CART_ROM_2048KB EQU $06 ; 128 banks 809 + DEF CART_ROM_4096KB EQU $07 ; 256 banks 810 + DEF CART_ROM_8192KB EQU $08 ; 512 banks 811 + DEF CART_ROM_1152KB EQU $52 ; 72 banks 812 + DEF CART_ROM_1280KB EQU $53 ; 80 banks 813 + DEF CART_ROM_1536KB EQU $54 ; 96 banks 814 + 815 + ; $0149 SRAM size 816 + ; these are kilobytes 817 + DEF CART_SRAM_NONE EQU 0 818 + DEF CART_SRAM_2KB EQU 1 ; 1 incomplete bank 819 + DEF CART_SRAM_8KB EQU 2 ; 1 bank 820 + DEF CART_SRAM_32KB EQU 3 ; 4 banks 821 + DEF CART_SRAM_128KB EQU 4 ; 16 banks 822 + 823 + DEF CART_SRAM_ENABLE EQU $0A 824 + DEF CART_SRAM_DISABLE EQU $00 825 + 826 + ; $014A Destination code 827 + DEF CART_DEST_JAPANESE EQU $00 828 + DEF CART_DEST_NON_JAPANESE EQU $01 829 + 830 + 831 + ;*************************************************************************** 832 + ;* 833 + ;* Keypad related 834 + ;* 835 + ;*************************************************************************** 836 + 837 + DEF PADF_DOWN EQU $80 838 + DEF PADF_UP EQU $40 839 + DEF PADF_LEFT EQU $20 840 + DEF PADF_RIGHT EQU $10 841 + DEF PADF_START EQU $08 842 + DEF PADF_SELECT EQU $04 843 + DEF PADF_B EQU $02 844 + DEF PADF_A EQU $01 845 + 846 + DEF PADB_DOWN EQU $7 847 + DEF PADB_UP EQU $6 848 + DEF PADB_LEFT EQU $5 849 + DEF PADB_RIGHT EQU $4 850 + DEF PADB_START EQU $3 851 + DEF PADB_SELECT EQU $2 852 + DEF PADB_B EQU $1 853 + DEF PADB_A EQU $0 854 + 855 + 856 + ;*************************************************************************** 857 + ;* 858 + ;* Screen related 859 + ;* 860 + ;*************************************************************************** 861 + 862 + DEF SCRN_X EQU 160 ; Width of screen in pixels 863 + DEF SCRN_Y EQU 144 ; Height of screen in pixels 864 + DEF SCRN_X_B EQU 20 ; Width of screen in bytes 865 + DEF SCRN_Y_B EQU 18 ; Height of screen in bytes 866 + 867 + DEF SCRN_VX EQU 256 ; Virtual width of screen in pixels 868 + DEF SCRN_VY EQU 256 ; Virtual height of screen in pixels 869 + DEF SCRN_VX_B EQU 32 ; Virtual width of screen in bytes 870 + DEF SCRN_VY_B EQU 32 ; Virtual height of screen in bytes 871 + 872 + 873 + ;*************************************************************************** 874 + ;* 875 + ;* OAM related 876 + ;* 877 + ;*************************************************************************** 878 + 879 + ; OAM attributes 880 + ; each entry in OAM RAM is 4 bytes (sizeof_OAM_ATTRS) 881 + RSRESET 882 + DEF OAMA_Y RB 1 ; y pos 883 + DEF OAMA_X RB 1 ; x pos 884 + DEF OAMA_TILEID RB 1 ; tile id 885 + DEF OAMA_FLAGS RB 1 ; flags (see below) 886 + DEF sizeof_OAM_ATTRS RB 0 887 + 888 + DEF OAM_COUNT EQU 40 ; number of OAM entries in OAM RAM 889 + 890 + ; flags 891 + DEF OAMF_PRI EQU %10000000 ; Priority 892 + DEF OAMF_YFLIP EQU %01000000 ; Y flip 893 + DEF OAMF_XFLIP EQU %00100000 ; X flip 894 + DEF OAMF_PAL0 EQU %00000000 ; Palette number; 0,1 (DMG) 895 + DEF OAMF_PAL1 EQU %00010000 ; Palette number; 0,1 (DMG) 896 + DEF OAMF_BANK0 EQU %00000000 ; Bank number; 0,1 (GBC) 897 + DEF OAMF_BANK1 EQU %00001000 ; Bank number; 0,1 (GBC) 898 + 899 + DEF OAMF_PALMASK EQU %00000111 ; Palette (GBC) 900 + 901 + DEF OAMB_PRI EQU 7 ; Priority 902 + DEF OAMB_YFLIP EQU 6 ; Y flip 903 + DEF OAMB_XFLIP EQU 5 ; X flip 904 + DEF OAMB_PAL1 EQU 4 ; Palette number; 0,1 (DMG) 905 + DEF OAMB_BANK1 EQU 3 ; Bank number; 0,1 (GBC) 906 + 907 + 908 + ;* 909 + ;* Nintendo scrolling logo 910 + ;* (Code won't work on a real GameBoy) 911 + ;* (if next lines are altered.) 912 + MACRO NINTENDO_LOGO 913 + DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D 914 + DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99 915 + DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E 916 + ENDM 917 + 918 + ; Deprecated constants. Please avoid using. 919 + 920 + DEF IEF_LCDC EQU %00000010 ; LCDC (see STAT) 921 + 922 + ENDC ;HARDWARE_INC

+158

gb/hello-world.asm

···

··· 1 + INCLUDE "hardware.inc" 2 + 3 + SECTION "Header", ROM0[$100] 4 + 5 + jp EntryPoint 6 + 7 + ds $150 - @, 0 ; Make room for the header 8 + 9 + EntryPoint: 10 + ; Shut down audio circuitry 11 + ld a, 0 12 + ld [rNR52], a 13 + 14 + ; Do not turn the LCD off outside of VBlank 15 + WaitVBlank: 16 + ld a, [rLY] 17 + cp 144 18 + jp c, WaitVBlank 19 + 20 + ; Turn the LCD off 21 + ld a, 0 22 + ld [rLCDC], a 23 + 24 + ; Copy the tile data 25 + ld de, Tiles 26 + ld hl, $9000 27 + ld bc, TilesEnd - Tiles 28 + CopyTiles: 29 + ld a, [de] 30 + ld [hli], a 31 + inc de 32 + dec bc 33 + ld a, b 34 + or a, c 35 + jp nz, CopyTiles 36 + 37 + ; Copy the tilemap 38 + ld de, Tilemap 39 + ld hl, $9800 40 + ld bc, TilemapEnd - Tilemap 41 + CopyTilemap: 42 + ld a, [de] 43 + ld [hli], a 44 + inc de 45 + dec bc 46 + ld a, b 47 + or a, c 48 + jp nz, CopyTilemap 49 + 50 + ; Turn the LCD on 51 + ld a, LCDCF_ON | LCDCF_BGON 52 + ld [rLCDC], a 53 + 54 + ; During the first (blank) frame, initialize display registers 55 + ld a, %11100100 56 + ld [rBGP], a 57 + 58 + Done: 59 + jp Done 60 + 61 + 62 + SECTION "Tile data", ROM0 63 + 64 + Tiles: 65 + db $00,$ff, $00,$ff, $00,$ff, $00,$ff, $00,$ff, $00,$ff, $00,$ff, $00,$ff 66 + db $00,$ff, $00,$80, $00,$80, $00,$80, $00,$80, $00,$80, $00,$80, $00,$80 67 + db $00,$ff, $00,$7e, $00,$7e, $00,$7e, $00,$7e, $00,$7e, $00,$7e, $00,$7e 68 + db $00,$ff, $00,$01, $00,$01, $00,$01, $00,$01, $00,$01, $00,$01, $00,$01 69 + db $00,$ff, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00 70 + db $00,$ff, $00,$7f, $00,$7f, $00,$7f, $00,$7f, $00,$7f, $00,$7f, $00,$7f 71 + db $00,$ff, $03,$fc, $00,$f8, $00,$f0, $00,$e0, $20,$c0, $00,$c0, $40,$80 72 + db $00,$ff, $c0,$3f, $00,$1f, $00,$0f, $00,$07, $04,$03, $00,$03, $02,$01 73 + db $00,$80, $00,$80, $7f,$80, $00,$80, $00,$80, $7f,$80, $7f,$80, $00,$80 74 + db $00,$7e, $2a,$7e, $d5,$7e, $2a,$7e, $54,$7e, $ff,$00, $ff,$00, $00,$00 75 + db $00,$01, $00,$01, $ff,$01, $00,$01, $01,$01, $fe,$01, $ff,$01, $00,$01 76 + db $00,$80, $80,$80, $7f,$80, $80,$80, $00,$80, $ff,$80, $7f,$80, $80,$80 77 + db $00,$7f, $2a,$7f, $d5,$7f, $2a,$7f, $55,$7f, $ff,$00, $ff,$00, $00,$00 78 + db $00,$ff, $aa,$ff, $55,$ff, $aa,$ff, $55,$ff, $fa,$07, $fd,$07, $02,$07 79 + db $00,$7f, $2a,$7f, $d5,$7f, $2a,$7f, $55,$7f, $aa,$7f, $d5,$7f, $2a,$7f 80 + db $00,$ff, $80,$ff, $00,$ff, $80,$ff, $00,$ff, $80,$ff, $00,$ff, $80,$ff 81 + db $40,$80, $00,$80, $7f,$80, $00,$80, $00,$80, $7f,$80, $7f,$80, $00,$80 82 + db $00,$3c, $02,$7e, $85,$7e, $0a,$7e, $14,$7e, $ab,$7e, $95,$7e, $2a,$7e 83 + db $02,$01, $00,$01, $ff,$01, $00,$01, $01,$01, $fe,$01, $ff,$01, $00,$01 84 + db $00,$ff, $80,$ff, $50,$ff, $a8,$ff, $50,$ff, $a8,$ff, $54,$ff, $a8,$ff 85 + db $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80 86 + db $ff,$00, $ff,$00, $ff,$00, $ab,$7e, $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7e 87 + db $ff,$01, $fe,$01, $ff,$01, $fe,$01, $ff,$01, $fe,$01, $ff,$01, $fe,$01 88 + db $7f,$80, $ff,$80, $7f,$80, $ff,$80, $7f,$80, $ff,$80, $7f,$80, $ff,$80 89 + db $ff,$00, $ff,$00, $ff,$00, $aa,$7f, $d5,$7f, $aa,$7f, $d5,$7f, $aa,$7f 90 + db $f8,$07, $f8,$07, $f8,$07, $80,$ff, $00,$ff, $aa,$ff, $55,$ff, $aa,$ff 91 + db $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $ff,$80, $7f,$80, $ff,$80 92 + db $d5,$7f, $aa,$7f, $d5,$7f, $aa,$7f, $d5,$7f, $aa,$7f, $d5,$7f, $aa,$7f 93 + db $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7e, $d5,$7e, $eb,$3c 94 + db $54,$ff, $aa,$ff, $54,$ff, $aa,$ff, $54,$ff, $aa,$ff, $54,$ff, $aa,$ff 95 + db $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $00,$ff 96 + db $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7e, $d5,$7e, $2a,$ff 97 + db $ff,$01, $fe,$01, $ff,$01, $fe,$01, $ff,$01, $fe,$01, $ff,$01, $80,$ff 98 + db $7f,$80, $ff,$80, $7f,$80, $ff,$80, $7f,$80, $ff,$80, $7f,$80, $aa,$ff 99 + db $ff,$00, $ff,$00, $ff,$00, $ff,$00, $ff,$00, $ff,$00, $ff,$00, $2a,$ff 100 + db $ff,$01, $fe,$01, $ff,$01, $fe,$01, $fe,$01, $fe,$01, $fe,$01, $80,$ff 101 + db $7f,$80, $ff,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $7f,$80, $00,$ff 102 + db $fe,$01, $fe,$01, $fe,$01, $fe,$01, $fe,$01, $fe,$01, $fe,$01, $80,$ff 103 + db $3f,$c0, $3f,$c0, $3f,$c0, $1f,$e0, $1f,$e0, $0f,$f0, $03,$fc, $00,$ff 104 + db $fd,$03, $fc,$03, $fd,$03, $f8,$07, $f9,$07, $f0,$0f, $c1,$3f, $82,$ff 105 + db $55,$ff, $2a,$7e, $54,$7e, $2a,$7e, $54,$7e, $2a,$7e, $54,$7e, $00,$7e 106 + db $01,$ff, $00,$01, $01,$01, $00,$01, $01,$01, $00,$01, $01,$01, $00,$01 107 + db $54,$ff, $ae,$f8, $50,$f0, $a0,$e0, $60,$c0, $80,$c0, $40,$80, $40,$80 108 + db $55,$ff, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00 109 + db $55,$ff, $6a,$1f, $05,$0f, $02,$07, $05,$07, $02,$03, $03,$01, $02,$01 110 + db $54,$ff, $80,$80, $00,$80, $80,$80, $00,$80, $80,$80, $00,$80, $00,$80 111 + db $55,$ff, $2a,$1f, $0d,$07, $06,$03, $01,$03, $02,$01, $01,$01, $00,$01 112 + db $55,$ff, $2a,$7f, $55,$7f, $2a,$7f, $55,$7f, $2a,$7f, $55,$7f, $00,$7f 113 + db $55,$ff, $aa,$ff, $55,$ff, $aa,$ff, $55,$ff, $aa,$ff, $55,$ff, $00,$ff 114 + db $15,$ff, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00, $00,$00 115 + db $55,$ff, $6a,$1f, $0d,$07, $06,$03, $01,$03, $02,$01, $03,$01, $00,$01 116 + db $54,$ff, $a8,$ff, $54,$ff, $a8,$ff, $50,$ff, $a0,$ff, $40,$ff, $00,$ff 117 + db $00,$7e, $2a,$7e, $d5,$7e, $2a,$7e, $54,$7e, $ab,$76, $dd,$66, $22,$66 118 + db $00,$7c, $2a,$7e, $d5,$7e, $2a,$7e, $54,$7c, $ff,$00, $ff,$00, $00,$00 119 + db $00,$01, $00,$01, $ff,$01, $02,$01, $07,$01, $fe,$03, $fd,$07, $0a,$0f 120 + db $00,$7c, $2a,$7e, $d5,$7e, $2a,$7e, $54,$7e, $ab,$7e, $d5,$7e, $2a,$7e 121 + db $00,$ff, $a0,$ff, $50,$ff, $a8,$ff, $54,$ff, $a8,$ff, $54,$ff, $aa,$ff 122 + db $dd,$62, $bf,$42, $fd,$42, $bf,$40, $ff,$00, $ff,$00, $f7,$08, $ef,$18 123 + db $ff,$00, $ff,$00, $ff,$00, $ab,$7c, $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7e 124 + db $f9,$07, $fc,$03, $fd,$03, $fe,$01, $ff,$01, $fe,$01, $ff,$01, $fe,$01 125 + db $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7e, $d5,$7e, $ab,$7c 126 + db $f7,$18, $eb,$1c, $d7,$3c, $eb,$3c, $d5,$3e, $ab,$7e, $d5,$7e, $2a,$ff 127 + db $ff,$01, $fe,$01, $ff,$01, $fe,$01, $ff,$01, $fe,$01, $ff,$01, $a2,$ff 128 + db $7f,$c0, $bf,$c0, $7f,$c0, $bf,$e0, $5f,$e0, $af,$f0, $57,$fc, $aa,$ff 129 + db $ff,$01, $fc,$03, $fd,$03, $fc,$03, $f9,$07, $f0,$0f, $c1,$3f, $82,$ff 130 + db $55,$ff, $2a,$ff, $55,$ff, $2a,$ff, $55,$ff, $2a,$ff, $55,$ff, $00,$ff 131 + db $45,$ff, $a2,$ff, $41,$ff, $82,$ff, $41,$ff, $80,$ff, $01,$ff, $00,$ff 132 + db $54,$ff, $aa,$ff, $54,$ff, $aa,$ff, $54,$ff, $aa,$ff, $54,$ff, $00,$ff 133 + db $15,$ff, $2a,$ff, $15,$ff, $0a,$ff, $15,$ff, $0a,$ff, $01,$ff, $00,$ff 134 + db $01,$ff, $80,$ff, $01,$ff, $80,$ff, $01,$ff, $80,$ff, $01,$ff, $00,$ff 135 + TilesEnd: 136 + 137 + SECTION "Tilemap", ROM0 138 + 139 + Tilemap: 140 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 141 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 142 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 143 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 144 + db $00, $00, $01, $02, $03, $01, $04, $03, $01, $05, $00, $01, $05, $00, $06, $04, $07, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 145 + db $00, $00, $08, $09, $0a, $0b, $0c, $0d, $0b, $0e, $0f, $08, $0e, $0f, $10, $11, $12, $13, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 146 + db $00, $00, $14, $15, $16, $17, $18, $19, $1a, $1b, $0f, $14, $1b, $0f, $14, $1c, $16, $1d, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 147 + db $00, $00, $1e, $1f, $20, $21, $22, $23, $24, $22, $25, $1e, $22, $25, $26, $22, $27, $1d, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 148 + db $00, $00, $01, $28, $29, $2a, $2b, $2c, $2d, $2b, $2e, $2d, $2f, $30, $2d, $31, $32, $33, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 149 + db $00, $00, $08, $34, $0a, $0b, $11, $0a, $0b, $35, $36, $0b, $0e, $0f, $08, $37, $0a, $38, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 150 + db $00, $00, $14, $39, $16, $17, $1c, $16, $17, $3a, $3b, $17, $1b, $0f, $14, $3c, $16, $1d, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 151 + db $00, $00, $1e, $3d, $3e, $3f, $22, $27, $21, $1f, $20, $21, $22, $25, $1e, $22, $40, $1d, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 152 + db $00, $00, $00, $41, $42, $43, $44, $30, $33, $41, $45, $43, $41, $30, $43, $41, $30, $33, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 153 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 154 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 155 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 156 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 157 + db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, 0,0,0,0,0,0,0,0,0,0,0,0 158 + TilemapEnd: